479 lines
13 KiB
C
479 lines
13 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Based on arch/arm/include/asm/uaccess.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_UACCESS_H
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#define __ASM_UACCESS_H
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#include <asm/alternative.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/sysreg.h>
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/*
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* User space memory access functions
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*/
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#include <linux/bitops.h>
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#include <linux/kasan-checks.h>
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#include <linux/string.h>
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#include <asm/asm-extable.h>
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#include <asm/cpufeature.h>
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#include <asm/mmu.h>
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#include <asm/mte.h>
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#include <asm/ptrace.h>
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#include <asm/memory.h>
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#include <asm/extable.h>
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static inline int __access_ok(const void __user *ptr, unsigned long size);
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/*
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* Test whether a block of memory is a valid user space address.
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* Returns 1 if the range is valid, 0 otherwise.
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*
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* This is equivalent to the following test:
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* (u65)addr + (u65)size <= (u65)TASK_SIZE_MAX
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*/
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static inline int access_ok(const void __user *addr, unsigned long size)
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{
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/*
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* Asynchronous I/O running in a kernel thread does not have the
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* TIF_TAGGED_ADDR flag of the process owning the mm, so always untag
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* the user address before checking.
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*/
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if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI) &&
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(current->flags & PF_KTHREAD || test_thread_flag(TIF_TAGGED_ADDR)))
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addr = untagged_addr(addr);
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return likely(__access_ok(addr, size));
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}
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#define access_ok access_ok
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#include <asm-generic/access_ok.h>
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/*
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* User access enabling/disabling.
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*/
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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static inline void __uaccess_ttbr0_disable(void)
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{
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unsigned long flags, ttbr;
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local_irq_save(flags);
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ttbr = read_sysreg(ttbr1_el1);
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ttbr &= ~TTBR_ASID_MASK;
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/* reserved_pg_dir placed before swapper_pg_dir */
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write_sysreg(ttbr - RESERVED_SWAPPER_OFFSET, ttbr0_el1);
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isb();
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/* Set reserved ASID */
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write_sysreg(ttbr, ttbr1_el1);
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isb();
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local_irq_restore(flags);
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}
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static inline void __uaccess_ttbr0_enable(void)
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{
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unsigned long flags, ttbr0, ttbr1;
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/*
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* Disable interrupts to avoid preemption between reading the 'ttbr0'
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* variable and the MSR. A context switch could trigger an ASID
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* roll-over and an update of 'ttbr0'.
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*/
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local_irq_save(flags);
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ttbr0 = READ_ONCE(current_thread_info()->ttbr0);
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/* Restore active ASID */
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ttbr1 = read_sysreg(ttbr1_el1);
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ttbr1 &= ~TTBR_ASID_MASK; /* safety measure */
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ttbr1 |= ttbr0 & TTBR_ASID_MASK;
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write_sysreg(ttbr1, ttbr1_el1);
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isb();
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/* Restore user page table */
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write_sysreg(ttbr0, ttbr0_el1);
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isb();
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local_irq_restore(flags);
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}
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static inline bool uaccess_ttbr0_disable(void)
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{
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if (!system_uses_ttbr0_pan())
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return false;
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__uaccess_ttbr0_disable();
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return true;
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}
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static inline bool uaccess_ttbr0_enable(void)
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{
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if (!system_uses_ttbr0_pan())
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return false;
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__uaccess_ttbr0_enable();
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return true;
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}
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#else
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static inline bool uaccess_ttbr0_disable(void)
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{
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return false;
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}
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static inline bool uaccess_ttbr0_enable(void)
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{
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return false;
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}
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#endif
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static inline void __uaccess_disable_hw_pan(void)
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{
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN,
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CONFIG_ARM64_PAN));
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}
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static inline void __uaccess_enable_hw_pan(void)
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{
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asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN,
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CONFIG_ARM64_PAN));
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}
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/*
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* The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0
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* affects EL0 and TCF affects EL1 irrespective of which TTBR is
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* used.
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* The kernel accesses TTBR0 usually with LDTR/STTR instructions
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* when UAO is available, so these would act as EL0 accesses using
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* TCF0.
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* However futex.h code uses exclusives which would be executed as
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* EL1, this can potentially cause a tag check fault even if the
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* user disables TCF0.
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*
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* To address the problem we set the PSTATE.TCO bit in uaccess_enable()
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* and reset it in uaccess_disable().
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*
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* The Tag check override (TCO) bit disables temporarily the tag checking
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* preventing the issue.
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*/
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static inline void __uaccess_disable_tco(void)
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{
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asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0),
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ARM64_MTE, CONFIG_KASAN_HW_TAGS));
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}
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static inline void __uaccess_enable_tco(void)
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{
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asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1),
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ARM64_MTE, CONFIG_KASAN_HW_TAGS));
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}
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/*
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* These functions disable tag checking only if in MTE async mode
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* since the sync mode generates exceptions synchronously and the
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* nofault or load_unaligned_zeropad can handle them.
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*/
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static inline void __uaccess_disable_tco_async(void)
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{
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if (system_uses_mte_async_or_asymm_mode())
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__uaccess_disable_tco();
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}
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static inline void __uaccess_enable_tco_async(void)
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{
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if (system_uses_mte_async_or_asymm_mode())
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__uaccess_enable_tco();
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}
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static inline void uaccess_disable_privileged(void)
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{
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__uaccess_disable_tco();
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if (uaccess_ttbr0_disable())
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return;
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__uaccess_enable_hw_pan();
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}
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static inline void uaccess_enable_privileged(void)
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{
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__uaccess_enable_tco();
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if (uaccess_ttbr0_enable())
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return;
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__uaccess_disable_hw_pan();
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}
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/*
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* Sanitize a uaccess pointer such that it cannot reach any kernel address.
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*
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* Clearing bit 55 ensures the pointer cannot address any portion of the TTBR1
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* address range (i.e. any kernel address), and either the pointer falls within
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* the TTBR0 address range or must cause a fault.
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*/
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#define uaccess_mask_ptr(ptr) (__typeof__(ptr))__uaccess_mask_ptr(ptr)
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static inline void __user *__uaccess_mask_ptr(const void __user *ptr)
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{
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void __user *safe_ptr;
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asm volatile(
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" bic %0, %1, %2\n"
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: "=r" (safe_ptr)
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: "r" (ptr),
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"i" (BIT(55))
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);
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return safe_ptr;
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}
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/*
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* The "__xxx" versions of the user access functions do not verify the address
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* space - it must have been done previously with a separate "access_ok()"
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* call.
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*
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* The "__xxx_error" versions set the third argument to -EFAULT if an error
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* occurs, and leave it unchanged on success.
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*/
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#define __get_mem_asm(load, reg, x, addr, err, type) \
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asm volatile( \
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"1: " load " " reg "1, [%2]\n" \
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"2:\n" \
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_ASM_EXTABLE_##type##ACCESS_ERR_ZERO(1b, 2b, %w0, %w1) \
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: "+r" (err), "=&r" (x) \
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: "r" (addr))
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#define __raw_get_mem(ldr, x, ptr, err, type) \
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do { \
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unsigned long __gu_val; \
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switch (sizeof(*(ptr))) { \
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case 1: \
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__get_mem_asm(ldr "b", "%w", __gu_val, (ptr), (err), type); \
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break; \
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case 2: \
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__get_mem_asm(ldr "h", "%w", __gu_val, (ptr), (err), type); \
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break; \
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case 4: \
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__get_mem_asm(ldr, "%w", __gu_val, (ptr), (err), type); \
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break; \
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case 8: \
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__get_mem_asm(ldr, "%x", __gu_val, (ptr), (err), type); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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(x) = (__force __typeof__(*(ptr)))__gu_val; \
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} while (0)
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/*
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* We must not call into the scheduler between uaccess_ttbr0_enable() and
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* uaccess_ttbr0_disable(). As `x` and `ptr` could contain blocking functions,
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* we must evaluate these outside of the critical section.
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*/
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#define __raw_get_user(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__rgu_ptr = (ptr); \
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__typeof__(x) __rgu_val; \
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__chk_user_ptr(ptr); \
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\
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uaccess_ttbr0_enable(); \
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__raw_get_mem("ldtr", __rgu_val, __rgu_ptr, err, U); \
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uaccess_ttbr0_disable(); \
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\
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(x) = __rgu_val; \
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} while (0)
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#define __get_user_error(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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if (access_ok(__p, sizeof(*__p))) { \
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__p = uaccess_mask_ptr(__p); \
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__raw_get_user((x), __p, (err)); \
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} else { \
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(x) = (__force __typeof__(x))0; (err) = -EFAULT; \
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} \
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} while (0)
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#define __get_user(x, ptr) \
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({ \
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int __gu_err = 0; \
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__get_user_error((x), (ptr), __gu_err); \
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__gu_err; \
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})
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#define get_user __get_user
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/*
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* We must not call into the scheduler between __uaccess_enable_tco_async() and
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* __uaccess_disable_tco_async(). As `dst` and `src` may contain blocking
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* functions, we must evaluate these outside of the critical section.
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*/
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#define __get_kernel_nofault(dst, src, type, err_label) \
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do { \
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__typeof__(dst) __gkn_dst = (dst); \
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__typeof__(src) __gkn_src = (src); \
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int __gkn_err = 0; \
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\
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__uaccess_enable_tco_async(); \
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__raw_get_mem("ldr", *((type *)(__gkn_dst)), \
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(__force type *)(__gkn_src), __gkn_err, K); \
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__uaccess_disable_tco_async(); \
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\
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if (unlikely(__gkn_err)) \
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goto err_label; \
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} while (0)
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#define __put_mem_asm(store, reg, x, addr, err, type) \
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asm volatile( \
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"1: " store " " reg "1, [%2]\n" \
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"2:\n" \
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_ASM_EXTABLE_##type##ACCESS_ERR(1b, 2b, %w0) \
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: "+r" (err) \
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: "r" (x), "r" (addr))
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#define __raw_put_mem(str, x, ptr, err, type) \
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do { \
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__typeof__(*(ptr)) __pu_val = (x); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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__put_mem_asm(str "b", "%w", __pu_val, (ptr), (err), type); \
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break; \
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case 2: \
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__put_mem_asm(str "h", "%w", __pu_val, (ptr), (err), type); \
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break; \
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case 4: \
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__put_mem_asm(str, "%w", __pu_val, (ptr), (err), type); \
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break; \
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case 8: \
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__put_mem_asm(str, "%x", __pu_val, (ptr), (err), type); \
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break; \
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default: \
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BUILD_BUG(); \
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} \
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} while (0)
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/*
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* We must not call into the scheduler between uaccess_ttbr0_enable() and
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* uaccess_ttbr0_disable(). As `x` and `ptr` could contain blocking functions,
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* we must evaluate these outside of the critical section.
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*/
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#define __raw_put_user(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__rpu_ptr = (ptr); \
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__typeof__(*(ptr)) __rpu_val = (x); \
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__chk_user_ptr(__rpu_ptr); \
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\
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uaccess_ttbr0_enable(); \
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__raw_put_mem("sttr", __rpu_val, __rpu_ptr, err, U); \
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uaccess_ttbr0_disable(); \
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} while (0)
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#define __put_user_error(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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if (access_ok(__p, sizeof(*__p))) { \
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__p = uaccess_mask_ptr(__p); \
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__raw_put_user((x), __p, (err)); \
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} else { \
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(err) = -EFAULT; \
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} \
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} while (0)
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#define __put_user(x, ptr) \
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({ \
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int __pu_err = 0; \
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__put_user_error((x), (ptr), __pu_err); \
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__pu_err; \
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})
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#define put_user __put_user
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/*
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* We must not call into the scheduler between __uaccess_enable_tco_async() and
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* __uaccess_disable_tco_async(). As `dst` and `src` may contain blocking
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* functions, we must evaluate these outside of the critical section.
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*/
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#define __put_kernel_nofault(dst, src, type, err_label) \
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do { \
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__typeof__(dst) __pkn_dst = (dst); \
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__typeof__(src) __pkn_src = (src); \
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int __pkn_err = 0; \
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\
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__uaccess_enable_tco_async(); \
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__raw_put_mem("str", *((type *)(__pkn_src)), \
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(__force type *)(__pkn_dst), __pkn_err, K); \
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__uaccess_disable_tco_async(); \
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\
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if (unlikely(__pkn_err)) \
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goto err_label; \
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} while(0)
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extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
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#define raw_copy_from_user(to, from, n) \
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({ \
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unsigned long __acfu_ret; \
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uaccess_ttbr0_enable(); \
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__acfu_ret = __arch_copy_from_user((to), \
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__uaccess_mask_ptr(from), (n)); \
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uaccess_ttbr0_disable(); \
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__acfu_ret; \
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})
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extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
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#define raw_copy_to_user(to, from, n) \
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({ \
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unsigned long __actu_ret; \
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uaccess_ttbr0_enable(); \
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__actu_ret = __arch_copy_to_user(__uaccess_mask_ptr(to), \
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(from), (n)); \
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uaccess_ttbr0_disable(); \
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__actu_ret; \
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})
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#define INLINE_COPY_TO_USER
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#define INLINE_COPY_FROM_USER
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extern unsigned long __must_check __arch_clear_user(void __user *to, unsigned long n);
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static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n)
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{
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if (access_ok(to, n)) {
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uaccess_ttbr0_enable();
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n = __arch_clear_user(__uaccess_mask_ptr(to), n);
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uaccess_ttbr0_disable();
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}
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return n;
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}
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#define clear_user __clear_user
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extern long strncpy_from_user(char *dest, const char __user *src, long count);
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extern __must_check long strnlen_user(const char __user *str, long n);
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#ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
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struct page;
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void memcpy_page_flushcache(char *to, struct page *page, size_t offset, size_t len);
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extern unsigned long __must_check __copy_user_flushcache(void *to, const void __user *from, unsigned long n);
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static inline int __copy_from_user_flushcache(void *dst, const void __user *src, unsigned size)
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{
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kasan_check_write(dst, size);
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return __copy_user_flushcache(dst, __uaccess_mask_ptr(src), size);
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}
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#endif
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#ifdef CONFIG_ARCH_HAS_SUBPAGE_FAULTS
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/*
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* Return 0 on success, the number of bytes not probed otherwise.
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*/
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static inline size_t probe_subpage_writeable(const char __user *uaddr,
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size_t size)
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{
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if (!system_supports_mte())
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return 0;
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return mte_probe_user_range(uaddr, size);
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}
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#endif /* CONFIG_ARCH_HAS_SUBPAGE_FAULTS */
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#endif /* __ASM_UACCESS_H */
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