140 lines
2.1 KiB
C
140 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CSKY_CKMMUV2_H
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#define __ASM_CSKY_CKMMUV2_H
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#include <abi/reg_ops.h>
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#include <asm/barrier.h>
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static inline int read_mmu_index(void)
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{
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return mfcr("cr<0, 15>");
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}
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static inline void write_mmu_index(int value)
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{
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mtcr("cr<0, 15>", value);
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}
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static inline int read_mmu_entrylo0(void)
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{
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return mfcr("cr<2, 15>");
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}
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static inline int read_mmu_entrylo1(void)
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{
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return mfcr("cr<3, 15>");
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}
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static inline void write_mmu_pagemask(int value)
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{
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mtcr("cr<6, 15>", value);
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}
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static inline int read_mmu_entryhi(void)
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{
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return mfcr("cr<4, 15>");
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}
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static inline void write_mmu_entryhi(int value)
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{
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mtcr("cr<4, 15>", value);
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}
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static inline unsigned long read_mmu_msa0(void)
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{
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return mfcr("cr<30, 15>");
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}
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static inline void write_mmu_msa0(unsigned long value)
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{
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mtcr("cr<30, 15>", value);
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}
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static inline unsigned long read_mmu_msa1(void)
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{
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return mfcr("cr<31, 15>");
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}
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static inline void write_mmu_msa1(unsigned long value)
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{
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mtcr("cr<31, 15>", value);
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}
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/*
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* TLB operations.
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*/
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static inline void tlb_probe(void)
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{
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mtcr("cr<8, 15>", 0x80000000);
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}
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static inline void tlb_read(void)
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{
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mtcr("cr<8, 15>", 0x40000000);
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}
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static inline void tlb_invalid_all(void)
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{
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#ifdef CONFIG_CPU_HAS_TLBI
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sync_is();
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asm volatile(
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"tlbi.alls \n"
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"sync.i \n"
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:
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:
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: "memory");
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#else
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mtcr("cr<8, 15>", 0x04000000);
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#endif
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}
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static inline void local_tlb_invalid_all(void)
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{
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#ifdef CONFIG_CPU_HAS_TLBI
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sync_is();
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asm volatile(
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"tlbi.all \n"
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"sync.i \n"
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:
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:
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: "memory");
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#else
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tlb_invalid_all();
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#endif
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}
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static inline void tlb_invalid_indexed(void)
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{
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mtcr("cr<8, 15>", 0x02000000);
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}
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#define NOP32 ".long 0x4820c400\n"
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static inline void setup_pgd(pgd_t *pgd, int asid)
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{
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#ifdef CONFIG_CPU_HAS_TLBI
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sync_is();
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#else
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mb();
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#endif
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asm volatile(
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#ifdef CONFIG_CPU_HAS_TLBI
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"mtcr %1, cr<28, 15> \n"
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#endif
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"mtcr %1, cr<29, 15> \n"
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"mtcr %0, cr< 4, 15> \n"
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".rept 64 \n"
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NOP32
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".endr \n"
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:
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:"r"(asid), "r"(__pa(pgd) | BIT(0))
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:"memory");
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}
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static inline pgd_t *get_pgd(void)
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{
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return __va(mfcr("cr<29, 15>") & ~BIT(0));
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}
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#endif /* __ASM_CSKY_CKMMUV2_H */
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