148 lines
4.7 KiB
C
148 lines
4.7 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
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* Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_CACHEFLUSH_H
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#define _ASM_CACHEFLUSH_H
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/* Keep includes the same across arches. */
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#include <linux/mm.h>
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#include <asm/cpu-features.h>
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/* Cache flushing:
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*
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* - flush_cache_all() flushes entire cache
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* - flush_cache_mm(mm) flushes the specified mm context's cache lines
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* - flush_cache_dup mm(mm) handles cache flushing when forking
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* - flush_cache_page(mm, vmaddr, pfn) flushes a single page
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* - flush_cache_range(vma, start, end) flushes a range of pages
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* - flush_icache_range(start, end) flush a range of instructions
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* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
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*
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* MIPS specific flush operations:
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*
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* - flush_icache_all() flush the entire instruction cache
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* - flush_data_cache_page() flushes a page from the data cache
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* - __flush_icache_user_range(start, end) flushes range of user instructions
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*/
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/*
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* This flag is used to indicate that the page pointed to by a pte
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* is dirty and requires cleaning before returning it to the user.
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*/
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#define PG_dcache_dirty PG_arch_1
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#define Page_dcache_dirty(page) \
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test_bit(PG_dcache_dirty, &(page)->flags)
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#define SetPageDcacheDirty(page) \
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set_bit(PG_dcache_dirty, &(page)->flags)
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#define ClearPageDcacheDirty(page) \
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clear_bit(PG_dcache_dirty, &(page)->flags)
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extern void (*flush_cache_all)(void);
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extern void (*__flush_cache_all)(void);
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extern void (*flush_cache_mm)(struct mm_struct *mm);
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#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
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extern void (*flush_cache_range)(struct vm_area_struct *vma,
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unsigned long start, unsigned long end);
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extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
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extern void __flush_dcache_page(struct page *page);
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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static inline void flush_dcache_page(struct page *page)
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{
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if (cpu_has_dc_aliases)
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__flush_dcache_page(page);
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else if (!cpu_has_ic_fills_f_dc)
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SetPageDcacheDirty(page);
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}
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define ARCH_HAS_FLUSH_ANON_PAGE
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extern void __flush_anon_page(struct page *, unsigned long);
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static inline void flush_anon_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vmaddr)
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{
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if (cpu_has_dc_aliases && PageAnon(page))
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__flush_anon_page(page, vmaddr);
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}
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static inline void flush_icache_page(struct vm_area_struct *vma,
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struct page *page)
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{
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}
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extern void (*flush_icache_range)(unsigned long start, unsigned long end);
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extern void (*local_flush_icache_range)(unsigned long start, unsigned long end);
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extern void (*__flush_icache_user_range)(unsigned long start,
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unsigned long end);
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extern void (*__local_flush_icache_user_range)(unsigned long start,
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unsigned long end);
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extern void (*__flush_cache_vmap)(void);
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static inline void flush_cache_vmap(unsigned long start, unsigned long end)
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{
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if (cpu_has_dc_aliases)
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__flush_cache_vmap();
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}
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extern void (*__flush_cache_vunmap)(void);
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static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
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{
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if (cpu_has_dc_aliases)
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__flush_cache_vunmap();
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}
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extern void copy_to_user_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vaddr, void *dst, const void *src,
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unsigned long len);
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extern void copy_from_user_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vaddr, void *dst, const void *src,
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unsigned long len);
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extern void (*flush_icache_all)(void);
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extern void (*local_flush_data_cache_page)(void * addr);
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extern void (*flush_data_cache_page)(unsigned long addr);
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/* Run kernel code uncached, useful for cache probing functions. */
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unsigned long run_uncached(void *func);
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extern void *kmap_coherent(struct page *page, unsigned long addr);
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extern void kunmap_coherent(void);
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extern void *kmap_noncoherent(struct page *page, unsigned long addr);
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static inline void kunmap_noncoherent(void)
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{
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kunmap_coherent();
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}
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#define ARCH_IMPLEMENTS_FLUSH_KERNEL_VMAP_RANGE 1
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/*
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* For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a
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* cache writeback and invalidate operation.
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*/
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extern void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
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static inline void flush_kernel_vmap_range(void *vaddr, int size)
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{
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if (cpu_has_dc_aliases)
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__flush_kernel_vmap_range((unsigned long) vaddr, size);
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}
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static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
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{
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if (cpu_has_dc_aliases)
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__flush_kernel_vmap_range((unsigned long) vaddr, size);
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}
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#endif /* _ASM_CACHEFLUSH_H */
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