230 lines
5.6 KiB
C
230 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* x86 FPU boot time init code:
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*/
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#include <asm/fpu/api.h>
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#include <asm/tlbflush.h>
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#include <asm/setup.h>
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#include <linux/sched.h>
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#include <linux/sched/task.h>
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#include <linux/init.h>
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#include "internal.h"
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#include "legacy.h"
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#include "xstate.h"
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/*
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* Initialize the registers found in all CPUs, CR0 and CR4:
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*/
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static void fpu__init_cpu_generic(void)
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{
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unsigned long cr0;
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unsigned long cr4_mask = 0;
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if (boot_cpu_has(X86_FEATURE_FXSR))
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cr4_mask |= X86_CR4_OSFXSR;
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if (boot_cpu_has(X86_FEATURE_XMM))
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cr4_mask |= X86_CR4_OSXMMEXCPT;
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if (cr4_mask)
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cr4_set_bits(cr4_mask);
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
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if (!boot_cpu_has(X86_FEATURE_FPU))
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cr0 |= X86_CR0_EM;
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write_cr0(cr0);
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/* Flush out any pending x87 state: */
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#ifdef CONFIG_MATH_EMULATION
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if (!boot_cpu_has(X86_FEATURE_FPU))
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fpstate_init_soft(¤t->thread.fpu.fpstate->regs.soft);
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else
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#endif
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asm volatile ("fninit");
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}
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/*
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* Enable all supported FPU features. Called when a CPU is brought online:
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*/
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void fpu__init_cpu(void)
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{
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fpu__init_cpu_generic();
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fpu__init_cpu_xstate();
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}
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static bool fpu__probe_without_cpuid(void)
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{
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unsigned long cr0;
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u16 fsw, fcw;
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fsw = fcw = 0xffff;
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
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write_cr0(cr0);
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asm volatile("fninit ; fnstsw %0 ; fnstcw %1" : "+m" (fsw), "+m" (fcw));
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pr_info("x86/fpu: Probing for FPU: FSW=0x%04hx FCW=0x%04hx\n", fsw, fcw);
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return fsw == 0 && (fcw & 0x103f) == 0x003f;
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}
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static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
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{
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if (!boot_cpu_has(X86_FEATURE_CPUID) &&
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!test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
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if (fpu__probe_without_cpuid())
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setup_force_cpu_cap(X86_FEATURE_FPU);
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else
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setup_clear_cpu_cap(X86_FEATURE_FPU);
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}
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#ifndef CONFIG_MATH_EMULATION
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if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_FPU)) {
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pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
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for (;;)
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asm volatile("hlt");
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}
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#endif
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}
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/*
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* Boot time FPU feature detection code:
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*/
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unsigned int mxcsr_feature_mask __ro_after_init = 0xffffffffu;
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EXPORT_SYMBOL_GPL(mxcsr_feature_mask);
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static void __init fpu__init_system_mxcsr(void)
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{
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unsigned int mask = 0;
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if (boot_cpu_has(X86_FEATURE_FXSR)) {
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/* Static because GCC does not get 16-byte stack alignment right: */
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static struct fxregs_state fxregs __initdata;
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asm volatile("fxsave %0" : "+m" (fxregs));
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mask = fxregs.mxcsr_mask;
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/*
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* If zero then use the default features mask,
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* which has all features set, except the
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* denormals-are-zero feature bit:
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*/
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if (mask == 0)
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mask = 0x0000ffbf;
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}
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mxcsr_feature_mask &= mask;
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}
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/*
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* Once per bootup FPU initialization sequences that will run on most x86 CPUs:
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*/
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static void __init fpu__init_system_generic(void)
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{
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/*
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* Set up the legacy init FPU context. Will be updated when the
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* CPU supports XSAVE[S].
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*/
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fpstate_init_user(&init_fpstate);
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fpu__init_system_mxcsr();
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}
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/*
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* Enforce that 'MEMBER' is the last field of 'TYPE'.
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*
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* Align the computed size with alignment of the TYPE,
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* because that's how C aligns structs.
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*/
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#define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
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BUILD_BUG_ON(sizeof(TYPE) != \
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ALIGN(offsetofend(TYPE, MEMBER), _Alignof(TYPE)))
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/*
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* We append the 'struct fpu' to the task_struct:
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*/
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static void __init fpu__init_task_struct_size(void)
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{
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int task_size = sizeof(struct task_struct);
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/*
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* Subtract off the static size of the register state.
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* It potentially has a bunch of padding.
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*/
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task_size -= sizeof(current->thread.fpu.__fpstate.regs);
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/*
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* Add back the dynamically-calculated register state
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* size.
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*/
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task_size += fpu_kernel_cfg.default_size;
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/*
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* We dynamically size 'struct fpu', so we require that
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* it be at the end of 'thread_struct' and that
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* 'thread_struct' be at the end of 'task_struct'. If
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* you hit a compile error here, check the structure to
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* see if something got added to the end.
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*/
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CHECK_MEMBER_AT_END_OF(struct fpu, __fpstate);
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CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);
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CHECK_MEMBER_AT_END_OF(struct task_struct, thread);
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arch_task_struct_size = task_size;
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}
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/*
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* Set up the user and kernel xstate sizes based on the legacy FPU context size.
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*
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* We set this up first, and later it will be overwritten by
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* fpu__init_system_xstate() if the CPU knows about xstates.
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*/
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static void __init fpu__init_system_xstate_size_legacy(void)
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{
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unsigned int size;
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/*
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* Note that the size configuration might be overwritten later
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* during fpu__init_system_xstate().
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*/
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if (!cpu_feature_enabled(X86_FEATURE_FPU)) {
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size = sizeof(struct swregs_state);
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} else if (cpu_feature_enabled(X86_FEATURE_FXSR)) {
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size = sizeof(struct fxregs_state);
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fpu_user_cfg.legacy_features = XFEATURE_MASK_FPSSE;
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} else {
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size = sizeof(struct fregs_state);
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fpu_user_cfg.legacy_features = XFEATURE_MASK_FP;
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}
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fpu_kernel_cfg.max_size = size;
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fpu_kernel_cfg.default_size = size;
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fpu_user_cfg.max_size = size;
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fpu_user_cfg.default_size = size;
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fpstate_reset(¤t->thread.fpu);
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}
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/*
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* Called on the boot CPU once per system bootup, to set up the initial
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* FPU state that is later cloned into all processes:
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*/
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void __init fpu__init_system(struct cpuinfo_x86 *c)
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{
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fpstate_reset(¤t->thread.fpu);
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fpu__init_system_early_generic(c);
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/*
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* The FPU has to be operational for some of the
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* later FPU init activities:
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*/
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fpu__init_cpu();
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fpu__init_system_generic();
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fpu__init_system_xstate_size_legacy();
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fpu__init_system_xstate(fpu_kernel_cfg.max_size);
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fpu__init_task_struct_size();
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}
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