121 lines
3.4 KiB
C
121 lines
3.4 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2016-2019 Intel Corporation
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*/
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#ifndef _INTEL_GUC_CT_H_
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#define _INTEL_GUC_CT_H_
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/ktime.h>
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#include <linux/wait.h>
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#include "intel_guc_fwif.h"
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struct i915_vma;
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struct intel_guc;
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struct drm_printer;
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/**
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* DOC: Command Transport (CT).
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*
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* Buffer based command transport is a replacement for MMIO based mechanism.
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* It can be used to perform both host-2-guc and guc-to-host communication.
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*/
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/** Represents single command transport buffer.
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*
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* A single command transport buffer consists of two parts, the header
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* record (command transport buffer descriptor) and the actual buffer which
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* holds the commands.
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*
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* @lock: protects access to the commands buffer and buffer descriptor
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* @desc: pointer to the buffer descriptor
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* @cmds: pointer to the commands buffer
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* @size: size of the commands buffer in dwords
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* @resv_space: reserved space in buffer in dwords
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* @head: local shadow copy of head in dwords
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* @tail: local shadow copy of tail in dwords
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* @space: local shadow copy of space in dwords
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* @broken: flag to indicate if descriptor data is broken
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*/
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struct intel_guc_ct_buffer {
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spinlock_t lock;
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struct guc_ct_buffer_desc *desc;
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u32 *cmds;
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u32 size;
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u32 resv_space;
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u32 tail;
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u32 head;
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atomic_t space;
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bool broken;
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};
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/** Top-level structure for Command Transport related data
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*
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* Includes a pair of CT buffers for bi-directional communication and tracking
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* for the H2G and G2H requests sent and received through the buffers.
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*/
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struct intel_guc_ct {
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struct i915_vma *vma;
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bool enabled;
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/* buffers for sending and receiving commands */
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struct {
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struct intel_guc_ct_buffer send;
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struct intel_guc_ct_buffer recv;
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} ctbs;
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struct tasklet_struct receive_tasklet;
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/** @wq: wait queue for g2h chanenl */
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wait_queue_head_t wq;
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struct {
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u16 last_fence; /* last fence used to send request */
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spinlock_t lock; /* protects pending requests list */
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struct list_head pending; /* requests waiting for response */
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struct list_head incoming; /* incoming requests */
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struct work_struct worker; /* handler for incoming requests */
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} requests;
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/** @stall_time: time of first time a CTB submission is stalled */
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ktime_t stall_time;
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};
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void intel_guc_ct_init_early(struct intel_guc_ct *ct);
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int intel_guc_ct_init(struct intel_guc_ct *ct);
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void intel_guc_ct_fini(struct intel_guc_ct *ct);
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int intel_guc_ct_enable(struct intel_guc_ct *ct);
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void intel_guc_ct_disable(struct intel_guc_ct *ct);
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static inline void intel_guc_ct_sanitize(struct intel_guc_ct *ct)
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{
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ct->enabled = false;
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}
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static inline bool intel_guc_ct_enabled(struct intel_guc_ct *ct)
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{
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return ct->enabled;
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}
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#define INTEL_GUC_CT_SEND_NB BIT(31)
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#define INTEL_GUC_CT_SEND_G2H_DW_SHIFT 0
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#define INTEL_GUC_CT_SEND_G2H_DW_MASK (0xff << INTEL_GUC_CT_SEND_G2H_DW_SHIFT)
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#define MAKE_SEND_FLAGS(len) ({ \
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typeof(len) len_ = (len); \
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GEM_BUG_ON(!FIELD_FIT(INTEL_GUC_CT_SEND_G2H_DW_MASK, len_)); \
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(FIELD_PREP(INTEL_GUC_CT_SEND_G2H_DW_MASK, len_) | INTEL_GUC_CT_SEND_NB); \
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})
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int intel_guc_ct_send(struct intel_guc_ct *ct, const u32 *action, u32 len,
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u32 *response_buf, u32 response_buf_size, u32 flags);
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void intel_guc_ct_event_handler(struct intel_guc_ct *ct);
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void intel_guc_ct_print_info(struct intel_guc_ct *ct, struct drm_printer *p);
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#endif /* _INTEL_GUC_CT_H_ */
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