162 lines
3.6 KiB
C
162 lines
3.6 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "selftests/igt_spinner.h"
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#include "selftests/igt_reset.h"
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#include "selftests/intel_scheduler_helpers.h"
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#include "gt/intel_engine_heartbeat.h"
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#include "gem/selftests/mock_context.h"
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#define BEAT_INTERVAL 100
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static struct i915_request *nop_request(struct intel_engine_cs *engine)
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{
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struct i915_request *rq;
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rq = intel_engine_create_kernel_request(engine);
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if (IS_ERR(rq))
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return rq;
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i915_request_get(rq);
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i915_request_add(rq);
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return rq;
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}
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static int intel_hang_guc(void *arg)
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{
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struct intel_gt *gt = arg;
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int ret = 0;
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struct i915_gem_context *ctx;
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struct intel_context *ce;
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struct igt_spinner spin;
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struct i915_request *rq;
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intel_wakeref_t wakeref;
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struct i915_gpu_error *global = >->i915->gpu_error;
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struct intel_engine_cs *engine = intel_selftest_find_any_engine(gt);
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unsigned int reset_count;
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u32 guc_status;
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u32 old_beat;
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if (!engine)
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return 0;
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ctx = kernel_context(gt->i915, NULL);
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if (IS_ERR(ctx)) {
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drm_err(>->i915->drm, "Failed get kernel context: %ld\n", PTR_ERR(ctx));
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return PTR_ERR(ctx);
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}
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wakeref = intel_runtime_pm_get(gt->uncore->rpm);
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ce = intel_context_create(engine);
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if (IS_ERR(ce)) {
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ret = PTR_ERR(ce);
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drm_err(>->i915->drm, "Failed to create spinner request: %d\n", ret);
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goto err;
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}
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reset_count = i915_reset_count(global);
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old_beat = engine->props.heartbeat_interval_ms;
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ret = intel_engine_set_heartbeat(engine, BEAT_INTERVAL);
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if (ret) {
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drm_err(>->i915->drm, "Failed to boost heatbeat interval: %d\n", ret);
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goto err;
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}
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ret = igt_spinner_init(&spin, engine->gt);
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if (ret) {
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drm_err(>->i915->drm, "Failed to create spinner: %d\n", ret);
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goto err;
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}
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rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
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intel_context_put(ce);
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if (IS_ERR(rq)) {
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ret = PTR_ERR(rq);
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drm_err(>->i915->drm, "Failed to create spinner request: %d\n", ret);
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goto err_spin;
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}
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ret = request_add_spin(rq, &spin);
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if (ret) {
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i915_request_put(rq);
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drm_err(>->i915->drm, "Failed to add Spinner request: %d\n", ret);
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goto err_spin;
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}
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ret = intel_reset_guc(gt);
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if (ret) {
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i915_request_put(rq);
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drm_err(>->i915->drm, "Failed to reset GuC, ret = %d\n", ret);
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goto err_spin;
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}
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guc_status = intel_uncore_read(gt->uncore, GUC_STATUS);
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if (!(guc_status & GS_MIA_IN_RESET)) {
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i915_request_put(rq);
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drm_err(>->i915->drm, "GuC failed to reset: status = 0x%08X\n", guc_status);
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ret = -EIO;
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goto err_spin;
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}
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/* Wait for the heartbeat to cause a reset */
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ret = intel_selftest_wait_for_rq(rq);
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i915_request_put(rq);
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if (ret) {
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drm_err(>->i915->drm, "Request failed to complete: %d\n", ret);
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goto err_spin;
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}
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if (i915_reset_count(global) == reset_count) {
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drm_err(>->i915->drm, "Failed to record a GPU reset\n");
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ret = -EINVAL;
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goto err_spin;
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}
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err_spin:
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igt_spinner_end(&spin);
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igt_spinner_fini(&spin);
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intel_engine_set_heartbeat(engine, old_beat);
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if (ret == 0) {
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rq = nop_request(engine);
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if (IS_ERR(rq)) {
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ret = PTR_ERR(rq);
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goto err;
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}
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ret = intel_selftest_wait_for_rq(rq);
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i915_request_put(rq);
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if (ret) {
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drm_err(>->i915->drm, "No-op failed to complete: %d\n", ret);
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goto err;
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}
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}
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err:
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intel_runtime_pm_put(gt->uncore->rpm, wakeref);
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kernel_context_close(ctx);
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return ret;
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}
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int intel_guc_hang_check(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(intel_hang_guc),
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};
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struct intel_gt *gt = to_gt(i915);
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if (intel_gt_is_wedged(gt))
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return 0;
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if (!intel_uc_uses_guc_submission(>->uc))
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return 0;
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return intel_gt_live_subtests(tests, gt);
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}
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