162 lines
3.7 KiB
C
162 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include "mdp4_kms.h"
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struct mdp4_lvds_pll {
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struct clk_hw pll_hw;
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struct drm_device *dev;
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unsigned long pixclk;
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};
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#define to_mdp4_lvds_pll(x) container_of(x, struct mdp4_lvds_pll, pll_hw)
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static struct mdp4_kms *get_kms(struct mdp4_lvds_pll *lvds_pll)
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{
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struct msm_drm_private *priv = lvds_pll->dev->dev_private;
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return to_mdp4_kms(to_mdp_kms(priv->kms));
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}
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struct pll_rate {
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unsigned long rate;
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struct {
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uint32_t val;
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uint32_t reg;
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} conf[32];
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};
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/* NOTE: keep sorted highest freq to lowest: */
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static const struct pll_rate freqtbl[] = {
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{ 72000000, {
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{ 0x8f, REG_MDP4_LVDS_PHY_PLL_CTRL_1 },
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{ 0x30, REG_MDP4_LVDS_PHY_PLL_CTRL_2 },
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{ 0xc6, REG_MDP4_LVDS_PHY_PLL_CTRL_3 },
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{ 0x10, REG_MDP4_LVDS_PHY_PLL_CTRL_5 },
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{ 0x07, REG_MDP4_LVDS_PHY_PLL_CTRL_6 },
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{ 0x62, REG_MDP4_LVDS_PHY_PLL_CTRL_7 },
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{ 0x41, REG_MDP4_LVDS_PHY_PLL_CTRL_8 },
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{ 0x0d, REG_MDP4_LVDS_PHY_PLL_CTRL_9 },
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{ 0, 0 } }
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},
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};
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static const struct pll_rate *find_rate(unsigned long rate)
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{
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int i;
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for (i = 1; i < ARRAY_SIZE(freqtbl); i++)
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if (rate > freqtbl[i].rate)
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return &freqtbl[i-1];
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return &freqtbl[i-1];
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}
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static int mpd4_lvds_pll_enable(struct clk_hw *hw)
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{
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struct mdp4_lvds_pll *lvds_pll = to_mdp4_lvds_pll(hw);
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struct mdp4_kms *mdp4_kms = get_kms(lvds_pll);
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const struct pll_rate *pll_rate = find_rate(lvds_pll->pixclk);
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int i;
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DBG("pixclk=%lu (%lu)", lvds_pll->pixclk, pll_rate->rate);
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if (WARN_ON(!pll_rate))
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return -EINVAL;
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mdp4_write(mdp4_kms, REG_MDP4_LCDC_LVDS_PHY_RESET, 0x33);
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for (i = 0; pll_rate->conf[i].reg; i++)
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mdp4_write(mdp4_kms, pll_rate->conf[i].reg, pll_rate->conf[i].val);
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mdp4_write(mdp4_kms, REG_MDP4_LVDS_PHY_PLL_CTRL_0, 0x01);
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/* Wait until LVDS PLL is locked and ready */
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while (!mdp4_read(mdp4_kms, REG_MDP4_LVDS_PHY_PLL_LOCKED))
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cpu_relax();
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return 0;
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}
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static void mpd4_lvds_pll_disable(struct clk_hw *hw)
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{
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struct mdp4_lvds_pll *lvds_pll = to_mdp4_lvds_pll(hw);
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struct mdp4_kms *mdp4_kms = get_kms(lvds_pll);
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DBG("");
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mdp4_write(mdp4_kms, REG_MDP4_LVDS_PHY_CFG0, 0x0);
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mdp4_write(mdp4_kms, REG_MDP4_LVDS_PHY_PLL_CTRL_0, 0x0);
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}
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static unsigned long mpd4_lvds_pll_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct mdp4_lvds_pll *lvds_pll = to_mdp4_lvds_pll(hw);
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return lvds_pll->pixclk;
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}
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static long mpd4_lvds_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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const struct pll_rate *pll_rate = find_rate(rate);
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return pll_rate->rate;
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}
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static int mpd4_lvds_pll_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct mdp4_lvds_pll *lvds_pll = to_mdp4_lvds_pll(hw);
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lvds_pll->pixclk = rate;
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return 0;
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}
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static const struct clk_ops mpd4_lvds_pll_ops = {
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.enable = mpd4_lvds_pll_enable,
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.disable = mpd4_lvds_pll_disable,
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.recalc_rate = mpd4_lvds_pll_recalc_rate,
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.round_rate = mpd4_lvds_pll_round_rate,
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.set_rate = mpd4_lvds_pll_set_rate,
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};
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static const char *mpd4_lvds_pll_parents[] = {
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"pxo",
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};
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static struct clk_init_data pll_init = {
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.name = "mpd4_lvds_pll",
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.ops = &mpd4_lvds_pll_ops,
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.parent_names = mpd4_lvds_pll_parents,
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.num_parents = ARRAY_SIZE(mpd4_lvds_pll_parents),
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};
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struct clk *mpd4_lvds_pll_init(struct drm_device *dev)
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{
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struct mdp4_lvds_pll *lvds_pll;
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struct clk *clk;
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int ret;
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lvds_pll = devm_kzalloc(dev->dev, sizeof(*lvds_pll), GFP_KERNEL);
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if (!lvds_pll) {
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ret = -ENOMEM;
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goto fail;
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}
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lvds_pll->dev = dev;
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lvds_pll->pll_hw.init = &pll_init;
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clk = devm_clk_register(dev->dev, &lvds_pll->pll_hw);
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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goto fail;
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}
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return clk;
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fail:
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return ERR_PTR(ret);
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}
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