323 lines
8.3 KiB
C
323 lines
8.3 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include <subdev/mc.h>
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#include <subdev/timer.h>
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#include <subdev/top.h>
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static const struct nvkm_falcon_func_dma *
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nvkm_falcon_dma(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)
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{
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switch (*mem_type) {
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case IMEM: return falcon->func->imem_dma;
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case DMEM: return falcon->func->dmem_dma;
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default:
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return NULL;
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}
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}
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int
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nvkm_falcon_dma_wr(struct nvkm_falcon *falcon, const u8 *img, u64 dma_addr, u32 dma_base,
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enum nvkm_falcon_mem mem_type, u32 mem_base, int len, bool sec)
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{
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const struct nvkm_falcon_func_dma *dma = nvkm_falcon_dma(falcon, &mem_type, &mem_base);
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const char *type = nvkm_falcon_mem(mem_type);
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const int dmalen = 256;
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u32 dma_start = 0;
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u32 dst, src, cmd;
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int ret, i;
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if (WARN_ON(!dma->xfer))
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return -EINVAL;
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if (mem_type == DMEM) {
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dma_start = dma_base;
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dma_addr += dma_base;
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}
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FLCN_DBG(falcon, "%s %08x <- %08x bytes at %08x (%010llx %08x)",
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type, mem_base, len, dma_base, dma_addr - dma_base, dma_start);
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if (WARN_ON(!len || (len & (dmalen - 1))))
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return -EINVAL;
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ret = dma->init(falcon, dma_addr, dmalen, mem_type, sec, &cmd);
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if (ret)
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return ret;
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dst = mem_base;
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src = dma_base;
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if (len) {
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while (len >= dmalen) {
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dma->xfer(falcon, dst, src - dma_start, cmd);
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if (img && nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
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for (i = 0; i < dmalen; i += 4, mem_base += 4) {
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const int w = 8, x = (i / 4) % w;
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if (x == 0)
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printk(KERN_INFO "%s %08x <-", type, mem_base);
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printk(KERN_CONT " %08x", *(u32 *)(img + src + i));
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if (x == (w - 1) || ((i + 4) == dmalen))
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printk(KERN_CONT " <- %08x+%08x", dma_base,
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src + i - dma_base - (x * 4));
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if (i == (7 * 4))
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printk(KERN_CONT " *");
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}
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}
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if (nvkm_msec(falcon->owner->device, 2000,
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if (dma->done(falcon))
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break;
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) < 0)
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return -ETIMEDOUT;
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src += dmalen;
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dst += dmalen;
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len -= dmalen;
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}
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WARN_ON(len);
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}
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return 0;
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}
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static const struct nvkm_falcon_func_pio *
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nvkm_falcon_pio(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)
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{
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switch (*mem_type) {
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case IMEM:
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return falcon->func->imem_pio;
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case DMEM:
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if (!falcon->func->emem_addr || *mem_base < falcon->func->emem_addr)
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return falcon->func->dmem_pio;
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*mem_base -= falcon->func->emem_addr;
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fallthrough;
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case EMEM:
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return falcon->func->emem_pio;
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default:
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return NULL;
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}
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}
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int
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nvkm_falcon_pio_rd(struct nvkm_falcon *falcon, u8 port, enum nvkm_falcon_mem mem_type, u32 mem_base,
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const u8 *img, u32 img_base, int len)
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{
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const struct nvkm_falcon_func_pio *pio = nvkm_falcon_pio(falcon, &mem_type, &mem_base);
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const char *type = nvkm_falcon_mem(mem_type);
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int xfer_len;
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if (WARN_ON(!pio || !pio->rd))
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return -EINVAL;
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FLCN_DBG(falcon, "%s %08x -> %08x bytes at %08x", type, mem_base, len, img_base);
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if (WARN_ON(!len || (len & (pio->min - 1))))
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return -EINVAL;
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pio->rd_init(falcon, port, mem_base);
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do {
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xfer_len = min(len, pio->max);
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pio->rd(falcon, port, img, xfer_len);
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if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
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for (img_base = 0; img_base < xfer_len; img_base += 4, mem_base += 4) {
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if (((img_base / 4) % 8) == 0)
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printk(KERN_INFO "%s %08x ->", type, mem_base);
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printk(KERN_CONT " %08x", *(u32 *)(img + img_base));
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}
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}
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img += xfer_len;
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len -= xfer_len;
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} while (len);
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return 0;
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}
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int
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nvkm_falcon_pio_wr(struct nvkm_falcon *falcon, const u8 *img, u32 img_base, u8 port,
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enum nvkm_falcon_mem mem_type, u32 mem_base, int len, u16 tag, bool sec)
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{
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const struct nvkm_falcon_func_pio *pio = nvkm_falcon_pio(falcon, &mem_type, &mem_base);
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const char *type = nvkm_falcon_mem(mem_type);
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int xfer_len;
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if (WARN_ON(!pio || !pio->wr))
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return -EINVAL;
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FLCN_DBG(falcon, "%s %08x <- %08x bytes at %08x", type, mem_base, len, img_base);
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if (WARN_ON(!len || (len & (pio->min - 1))))
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return -EINVAL;
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pio->wr_init(falcon, port, sec, mem_base);
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do {
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xfer_len = min(len, pio->max);
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pio->wr(falcon, port, img, xfer_len, tag++);
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if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
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for (img_base = 0; img_base < xfer_len; img_base += 4, mem_base += 4) {
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if (((img_base / 4) % 8) == 0)
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printk(KERN_INFO "%s %08x <-", type, mem_base);
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printk(KERN_CONT " %08x", *(u32 *)(img + img_base));
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if ((img_base / 4) == 7 && mem_type == IMEM)
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printk(KERN_CONT " %04x", tag - 1);
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}
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}
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img += xfer_len;
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len -= xfer_len;
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} while (len);
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return 0;
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}
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void
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nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,
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u32 size, u16 tag, u8 port, bool secure)
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{
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if (secure && !falcon->secret) {
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nvkm_warn(falcon->user,
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"writing with secure tag on a non-secure falcon!\n");
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return;
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}
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falcon->func->load_imem(falcon, data, start, size, tag, port,
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secure);
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}
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void
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nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,
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u32 size, u8 port)
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{
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mutex_lock(&falcon->dmem_mutex);
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falcon->func->load_dmem(falcon, data, start, size, port);
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mutex_unlock(&falcon->dmem_mutex);
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}
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void
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nvkm_falcon_start(struct nvkm_falcon *falcon)
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{
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falcon->func->start(falcon);
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}
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int
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nvkm_falcon_reset(struct nvkm_falcon *falcon)
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{
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int ret;
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ret = falcon->func->disable(falcon);
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if (WARN_ON(ret))
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return ret;
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return nvkm_falcon_enable(falcon);
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}
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static int
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nvkm_falcon_oneinit(struct nvkm_falcon *falcon)
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{
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const struct nvkm_falcon_func *func = falcon->func;
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const struct nvkm_subdev *subdev = falcon->owner;
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u32 reg;
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if (!falcon->addr) {
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falcon->addr = nvkm_top_addr(subdev->device, subdev->type, subdev->inst);
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if (WARN_ON(!falcon->addr))
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return -ENODEV;
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}
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reg = nvkm_falcon_rd32(falcon, 0x12c);
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falcon->version = reg & 0xf;
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falcon->secret = (reg >> 4) & 0x3;
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falcon->code.ports = (reg >> 8) & 0xf;
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falcon->data.ports = (reg >> 12) & 0xf;
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reg = nvkm_falcon_rd32(falcon, 0x108);
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falcon->code.limit = (reg & 0x1ff) << 8;
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falcon->data.limit = (reg & 0x3fe00) >> 1;
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if (func->debug) {
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u32 val = nvkm_falcon_rd32(falcon, func->debug);
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falcon->debug = (val >> 20) & 0x1;
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}
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return 0;
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}
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void
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nvkm_falcon_put(struct nvkm_falcon *falcon, struct nvkm_subdev *user)
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{
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if (unlikely(!falcon))
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return;
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mutex_lock(&falcon->mutex);
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if (falcon->user == user) {
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nvkm_debug(falcon->user, "released %s falcon\n", falcon->name);
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falcon->user = NULL;
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}
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mutex_unlock(&falcon->mutex);
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}
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int
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nvkm_falcon_get(struct nvkm_falcon *falcon, struct nvkm_subdev *user)
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{
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int ret = 0;
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mutex_lock(&falcon->mutex);
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if (falcon->user) {
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nvkm_error(user, "%s falcon already acquired by %s!\n",
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falcon->name, falcon->user->name);
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mutex_unlock(&falcon->mutex);
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return -EBUSY;
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}
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nvkm_debug(user, "acquired %s falcon\n", falcon->name);
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if (!falcon->oneinit)
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ret = nvkm_falcon_oneinit(falcon);
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falcon->user = user;
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mutex_unlock(&falcon->mutex);
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return ret;
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}
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void
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nvkm_falcon_dtor(struct nvkm_falcon *falcon)
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{
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}
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int
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nvkm_falcon_ctor(const struct nvkm_falcon_func *func,
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struct nvkm_subdev *subdev, const char *name, u32 addr,
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struct nvkm_falcon *falcon)
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{
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falcon->func = func;
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falcon->owner = subdev;
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falcon->name = name;
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falcon->addr = addr;
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falcon->addr2 = func->addr2;
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mutex_init(&falcon->mutex);
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mutex_init(&falcon->dmem_mutex);
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return 0;
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}
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