447 lines
10 KiB
C
447 lines
10 KiB
C
/*
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* Copyright 2019 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include <core/firmware.h>
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#include <core/memory.h>
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#include <subdev/mmu.h>
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#include <subdev/gsp.h>
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#include <subdev/pmu.h>
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#include <engine/sec2.h>
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#include <engine/nvdec.h>
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static struct nvkm_acr_hsfw *
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nvkm_acr_hsfw_find(struct nvkm_acr *acr, const char *name)
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{
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struct nvkm_acr_hsfw *hsfw;
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list_for_each_entry(hsfw, &acr->hsfw, head) {
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if (!strcmp(hsfw->fw.fw.name, name))
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return hsfw;
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}
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return NULL;
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}
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int
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nvkm_acr_hsfw_boot(struct nvkm_acr *acr, const char *name)
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{
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struct nvkm_subdev *subdev = &acr->subdev;
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struct nvkm_acr_hsfw *hsfw;
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hsfw = nvkm_acr_hsfw_find(acr, name);
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if (!hsfw)
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return -EINVAL;
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return nvkm_falcon_fw_boot(&hsfw->fw, subdev, true, NULL, NULL,
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hsfw->boot_mbox0, hsfw->intr_clear);
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}
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static struct nvkm_acr_lsf *
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nvkm_acr_rtos(struct nvkm_acr *acr)
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{
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struct nvkm_acr_lsf *lsf;
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if (acr) {
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list_for_each_entry(lsf, &acr->lsf, head) {
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if (lsf->func->bootstrap_falcon)
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return lsf;
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}
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}
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return NULL;
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}
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static void
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nvkm_acr_unload(struct nvkm_acr *acr)
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{
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if (acr->done) {
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if (acr->rtos) {
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nvkm_subdev_unref(acr->rtos->falcon->owner);
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acr->rtos = NULL;
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}
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nvkm_acr_hsfw_boot(acr, "unload");
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acr->done = false;
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}
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}
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static int
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nvkm_acr_load(struct nvkm_acr *acr)
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{
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struct nvkm_subdev *subdev = &acr->subdev;
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struct nvkm_acr_lsf *rtos = nvkm_acr_rtos(acr);
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u64 start, limit;
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int ret;
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if (list_empty(&acr->lsf)) {
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nvkm_debug(subdev, "No LSF(s) present.\n");
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return 0;
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}
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ret = acr->func->init(acr);
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if (ret)
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return ret;
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acr->func->wpr_check(acr, &start, &limit);
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if (start != acr->wpr_start || limit != acr->wpr_end) {
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nvkm_error(subdev, "WPR not configured as expected: "
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"%016llx-%016llx vs %016llx-%016llx\n",
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acr->wpr_start, acr->wpr_end, start, limit);
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return -EIO;
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}
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acr->done = true;
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if (rtos) {
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ret = nvkm_subdev_ref(rtos->falcon->owner);
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if (ret)
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return ret;
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acr->rtos = rtos;
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}
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return ret;
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}
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static int
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nvkm_acr_reload(struct nvkm_acr *acr)
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{
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nvkm_acr_unload(acr);
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return nvkm_acr_load(acr);
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}
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int
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nvkm_acr_bootstrap_falcons(struct nvkm_device *device, unsigned long mask)
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{
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struct nvkm_acr *acr = device->acr;
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struct nvkm_acr_lsf *rtos = nvkm_acr_rtos(acr);
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unsigned long id;
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/* If there's no LS FW managing bootstrapping of other LS falcons,
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* we depend on the HS firmware being able to do it instead.
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*/
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if (!rtos) {
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/* Which isn't possible everywhere... */
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if ((mask & acr->func->bootstrap_falcons) == mask) {
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int ret = nvkm_acr_reload(acr);
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if (ret)
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return ret;
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return acr->done ? 0 : -EINVAL;
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}
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return -ENOSYS;
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}
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if ((mask & rtos->func->bootstrap_falcons) != mask)
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return -ENOSYS;
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if (rtos->func->bootstrap_multiple_falcons)
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return rtos->func->bootstrap_multiple_falcons(rtos->falcon, mask);
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for_each_set_bit(id, &mask, NVKM_ACR_LSF_NUM) {
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int ret = rtos->func->bootstrap_falcon(rtos->falcon, id);
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if (ret)
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return ret;
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}
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return 0;
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}
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bool
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nvkm_acr_managed_falcon(struct nvkm_device *device, enum nvkm_acr_lsf_id id)
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{
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struct nvkm_acr *acr = device->acr;
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if (acr) {
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if (acr->managed_falcons & BIT_ULL(id))
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return true;
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}
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return false;
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}
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static int
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nvkm_acr_fini(struct nvkm_subdev *subdev, bool suspend)
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{
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if (!subdev->use.enabled)
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return 0;
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nvkm_acr_unload(nvkm_acr(subdev));
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return 0;
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}
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static int
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nvkm_acr_init(struct nvkm_subdev *subdev)
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{
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struct nvkm_acr *acr = nvkm_acr(subdev);
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if (!nvkm_acr_rtos(acr))
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return 0;
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return nvkm_acr_load(acr);
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}
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static void
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nvkm_acr_cleanup(struct nvkm_acr *acr)
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{
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nvkm_acr_lsfw_del_all(acr);
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nvkm_firmware_put(acr->wpr_fw);
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acr->wpr_fw = NULL;
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}
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static int
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nvkm_acr_oneinit(struct nvkm_subdev *subdev)
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{
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struct nvkm_device *device = subdev->device;
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struct nvkm_acr *acr = nvkm_acr(subdev);
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struct nvkm_acr_hsfw *hsfw;
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struct nvkm_acr_lsfw *lsfw, *lsft;
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struct nvkm_acr_lsf *lsf, *rtos;
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struct nvkm_falcon *falcon;
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u32 wpr_size = 0;
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u64 falcons;
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int ret, i;
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if (list_empty(&acr->hsfw)) {
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nvkm_debug(subdev, "No HSFW(s)\n");
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nvkm_acr_cleanup(acr);
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return 0;
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}
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/* Determine layout/size of WPR image up-front, as we need to know
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* it to allocate memory before we begin constructing it.
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*/
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list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) {
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/* Cull unknown falcons that are present in WPR image. */
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if (acr->wpr_fw) {
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if (!lsfw->func) {
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nvkm_acr_lsfw_del(lsfw);
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continue;
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}
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wpr_size = acr->wpr_fw->size;
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}
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/* Ensure we've fetched falcon configuration. */
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ret = nvkm_falcon_get(lsfw->falcon, subdev);
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if (ret)
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return ret;
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nvkm_falcon_put(lsfw->falcon, subdev);
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if (!(lsf = kmalloc(sizeof(*lsf), GFP_KERNEL)))
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return -ENOMEM;
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lsf->func = lsfw->func;
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lsf->falcon = lsfw->falcon;
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lsf->id = lsfw->id;
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list_add_tail(&lsf->head, &acr->lsf);
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acr->managed_falcons |= BIT_ULL(lsf->id);
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}
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/* Ensure the falcon that'll provide ACR functions is booted first. */
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rtos = nvkm_acr_rtos(acr);
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if (rtos) {
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falcons = rtos->func->bootstrap_falcons;
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list_move(&rtos->head, &acr->lsf);
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} else {
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falcons = acr->func->bootstrap_falcons;
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}
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/* Cull falcons that can't be bootstrapped, or the HSFW can fail to
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* boot and leave the GPU in a weird state.
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*/
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list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) {
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if (!(falcons & BIT_ULL(lsfw->id))) {
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nvkm_warn(subdev, "%s falcon cannot be bootstrapped\n",
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nvkm_acr_lsf_id(lsfw->id));
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nvkm_acr_lsfw_del(lsfw);
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}
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}
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if (!acr->wpr_fw || acr->wpr_comp)
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wpr_size = acr->func->wpr_layout(acr);
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/* Allocate/Locate WPR + fill ucode blob pointer.
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*
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* dGPU: allocate WPR + shadow blob
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* Tegra: locate WPR with regs, ensure size is sufficient,
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* allocate ucode blob.
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*/
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ret = acr->func->wpr_alloc(acr, wpr_size);
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if (ret)
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return ret;
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nvkm_debug(subdev, "WPR region is from 0x%llx-0x%llx (shadow 0x%llx)\n",
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acr->wpr_start, acr->wpr_end, acr->shadow_start);
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/* Write WPR to ucode blob. */
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nvkm_kmap(acr->wpr);
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if (acr->wpr_fw && !acr->wpr_comp)
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nvkm_wobj(acr->wpr, 0, acr->wpr_fw->data, acr->wpr_fw->size);
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if (!acr->wpr_fw || acr->wpr_comp)
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acr->func->wpr_build(acr, rtos);
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acr->func->wpr_patch(acr, (s64)acr->wpr_start - acr->wpr_prev);
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if (acr->wpr_fw && acr->wpr_comp) {
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nvkm_kmap(acr->wpr);
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for (i = 0; i < acr->wpr_fw->size; i += 4) {
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u32 us = nvkm_ro32(acr->wpr, i);
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u32 fw = ((u32 *)acr->wpr_fw->data)[i/4];
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if (fw != us) {
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nvkm_warn(subdev, "%08x: %08x %08x\n",
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i, us, fw);
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}
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}
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return -EINVAL;
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}
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nvkm_done(acr->wpr);
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/* Allocate instance block for ACR-related stuff. */
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ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0, true,
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&acr->inst);
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if (ret)
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return ret;
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ret = nvkm_vmm_new(device, 0, 0, NULL, 0, NULL, "acr", &acr->vmm);
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if (ret)
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return ret;
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acr->vmm->debug = acr->subdev.debug;
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ret = nvkm_vmm_join(acr->vmm, acr->inst);
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if (ret)
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return ret;
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/* Load HS firmware blobs into ACR VMM. */
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list_for_each_entry(hsfw, &acr->hsfw, head) {
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switch (hsfw->falcon_id) {
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case NVKM_ACR_HSF_PMU : falcon = &device->pmu->falcon; break;
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case NVKM_ACR_HSF_SEC2: falcon = &device->sec2->falcon; break;
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case NVKM_ACR_HSF_GSP : falcon = &device->gsp->falcon; break;
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default:
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WARN_ON(1);
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return -EINVAL;
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}
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ret = nvkm_falcon_fw_oneinit(&hsfw->fw, falcon, acr->vmm, acr->inst);
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if (ret)
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return ret;
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}
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/* Kill temporary data. */
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nvkm_acr_cleanup(acr);
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return 0;
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}
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static void *
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nvkm_acr_dtor(struct nvkm_subdev *subdev)
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{
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struct nvkm_acr *acr = nvkm_acr(subdev);
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struct nvkm_acr_hsfw *hsfw, *hsft;
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struct nvkm_acr_lsf *lsf, *lst;
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list_for_each_entry_safe(hsfw, hsft, &acr->hsfw, head) {
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nvkm_falcon_fw_dtor(&hsfw->fw);
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list_del(&hsfw->head);
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kfree(hsfw);
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}
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nvkm_vmm_part(acr->vmm, acr->inst);
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nvkm_vmm_unref(&acr->vmm);
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nvkm_memory_unref(&acr->inst);
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nvkm_memory_unref(&acr->wpr);
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list_for_each_entry_safe(lsf, lst, &acr->lsf, head) {
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list_del(&lsf->head);
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kfree(lsf);
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}
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nvkm_acr_cleanup(acr);
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return acr;
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}
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static const struct nvkm_subdev_func
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nvkm_acr = {
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.dtor = nvkm_acr_dtor,
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.oneinit = nvkm_acr_oneinit,
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.init = nvkm_acr_init,
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.fini = nvkm_acr_fini,
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};
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static int
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nvkm_acr_ctor_wpr(struct nvkm_acr *acr, int ver)
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{
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struct nvkm_subdev *subdev = &acr->subdev;
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struct nvkm_device *device = subdev->device;
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int ret;
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ret = nvkm_firmware_get(subdev, "acr/wpr", ver, &acr->wpr_fw);
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if (ret < 0)
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return ret;
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/* Pre-add LSFs in the order they appear in the FW WPR image so that
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* we're able to do a binary comparison with our own generator.
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*/
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ret = acr->func->wpr_parse(acr);
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if (ret)
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return ret;
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acr->wpr_comp = nvkm_boolopt(device->cfgopt, "NvAcrWprCompare", false);
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acr->wpr_prev = nvkm_longopt(device->cfgopt, "NvAcrWprPrevAddr", 0);
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return 0;
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}
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int
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nvkm_acr_new_(const struct nvkm_acr_fwif *fwif, struct nvkm_device *device,
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enum nvkm_subdev_type type, int inst, struct nvkm_acr **pacr)
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{
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struct nvkm_acr *acr;
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long wprfw;
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if (!(acr = *pacr = kzalloc(sizeof(*acr), GFP_KERNEL)))
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return -ENOMEM;
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nvkm_subdev_ctor(&nvkm_acr, device, type, inst, &acr->subdev);
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INIT_LIST_HEAD(&acr->hsfw);
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INIT_LIST_HEAD(&acr->lsfw);
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INIT_LIST_HEAD(&acr->lsf);
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fwif = nvkm_firmware_load(&acr->subdev, fwif, "Acr", acr);
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if (IS_ERR(fwif))
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return PTR_ERR(fwif);
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acr->func = fwif->func;
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wprfw = nvkm_longopt(device->cfgopt, "NvAcrWpr", -1);
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if (wprfw >= 0) {
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int ret = nvkm_acr_ctor_wpr(acr, wprfw);
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if (ret)
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return ret;
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}
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return 0;
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}
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