204 lines
5.9 KiB
C
204 lines
5.9 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/* Authors: Cheng Xu <chengyou@linux.alibaba.com> */
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/* Kai Shen <kaishen@linux.alibaba.com> */
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/* Copyright (c) 2020-2022, Alibaba Group. */
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#include "erdma_verbs.h"
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static void *get_next_valid_cqe(struct erdma_cq *cq)
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{
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__be32 *cqe = get_queue_entry(cq->kern_cq.qbuf, cq->kern_cq.ci,
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cq->depth, CQE_SHIFT);
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u32 owner = FIELD_GET(ERDMA_CQE_HDR_OWNER_MASK,
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__be32_to_cpu(READ_ONCE(*cqe)));
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return owner ^ !!(cq->kern_cq.ci & cq->depth) ? cqe : NULL;
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}
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static void notify_cq(struct erdma_cq *cq, u8 solcitied)
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{
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u64 db_data =
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FIELD_PREP(ERDMA_CQDB_IDX_MASK, (cq->kern_cq.notify_cnt)) |
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FIELD_PREP(ERDMA_CQDB_CQN_MASK, cq->cqn) |
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FIELD_PREP(ERDMA_CQDB_ARM_MASK, 1) |
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FIELD_PREP(ERDMA_CQDB_SOL_MASK, solcitied) |
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FIELD_PREP(ERDMA_CQDB_CMDSN_MASK, cq->kern_cq.cmdsn) |
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FIELD_PREP(ERDMA_CQDB_CI_MASK, cq->kern_cq.ci);
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*cq->kern_cq.db_record = db_data;
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writeq(db_data, cq->kern_cq.db);
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}
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int erdma_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags)
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{
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struct erdma_cq *cq = to_ecq(ibcq);
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unsigned long irq_flags;
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int ret = 0;
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spin_lock_irqsave(&cq->kern_cq.lock, irq_flags);
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notify_cq(cq, (flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED);
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if ((flags & IB_CQ_REPORT_MISSED_EVENTS) && get_next_valid_cqe(cq))
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ret = 1;
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cq->kern_cq.notify_cnt++;
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spin_unlock_irqrestore(&cq->kern_cq.lock, irq_flags);
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return ret;
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}
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static const enum ib_wc_opcode wc_mapping_table[ERDMA_NUM_OPCODES] = {
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[ERDMA_OP_WRITE] = IB_WC_RDMA_WRITE,
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[ERDMA_OP_READ] = IB_WC_RDMA_READ,
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[ERDMA_OP_SEND] = IB_WC_SEND,
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[ERDMA_OP_SEND_WITH_IMM] = IB_WC_SEND,
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[ERDMA_OP_RECEIVE] = IB_WC_RECV,
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[ERDMA_OP_RECV_IMM] = IB_WC_RECV_RDMA_WITH_IMM,
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[ERDMA_OP_RECV_INV] = IB_WC_RECV,
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[ERDMA_OP_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
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[ERDMA_OP_RSP_SEND_IMM] = IB_WC_RECV,
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[ERDMA_OP_SEND_WITH_INV] = IB_WC_SEND,
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[ERDMA_OP_REG_MR] = IB_WC_REG_MR,
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[ERDMA_OP_LOCAL_INV] = IB_WC_LOCAL_INV,
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[ERDMA_OP_READ_WITH_INV] = IB_WC_RDMA_READ,
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[ERDMA_OP_ATOMIC_CAS] = IB_WC_COMP_SWAP,
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[ERDMA_OP_ATOMIC_FAA] = IB_WC_FETCH_ADD,
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};
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static const struct {
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enum erdma_wc_status erdma;
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enum ib_wc_status base;
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enum erdma_vendor_err vendor;
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} map_cqe_status[ERDMA_NUM_WC_STATUS] = {
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{ ERDMA_WC_SUCCESS, IB_WC_SUCCESS, ERDMA_WC_VENDOR_NO_ERR },
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{ ERDMA_WC_GENERAL_ERR, IB_WC_GENERAL_ERR, ERDMA_WC_VENDOR_NO_ERR },
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{ ERDMA_WC_RECV_WQE_FORMAT_ERR, IB_WC_GENERAL_ERR,
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ERDMA_WC_VENDOR_INVALID_RQE },
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{ ERDMA_WC_RECV_STAG_INVALID_ERR, IB_WC_REM_ACCESS_ERR,
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ERDMA_WC_VENDOR_RQE_INVALID_STAG },
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{ ERDMA_WC_RECV_ADDR_VIOLATION_ERR, IB_WC_REM_ACCESS_ERR,
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ERDMA_WC_VENDOR_RQE_ADDR_VIOLATION },
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{ ERDMA_WC_RECV_RIGHT_VIOLATION_ERR, IB_WC_REM_ACCESS_ERR,
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ERDMA_WC_VENDOR_RQE_ACCESS_RIGHT_ERR },
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{ ERDMA_WC_RECV_PDID_ERR, IB_WC_REM_ACCESS_ERR,
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ERDMA_WC_VENDOR_RQE_INVALID_PD },
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{ ERDMA_WC_RECV_WARRPING_ERR, IB_WC_REM_ACCESS_ERR,
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ERDMA_WC_VENDOR_RQE_WRAP_ERR },
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{ ERDMA_WC_SEND_WQE_FORMAT_ERR, IB_WC_LOC_QP_OP_ERR,
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ERDMA_WC_VENDOR_INVALID_SQE },
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{ ERDMA_WC_SEND_WQE_ORD_EXCEED, IB_WC_GENERAL_ERR,
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ERDMA_WC_VENDOR_ZERO_ORD },
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{ ERDMA_WC_SEND_STAG_INVALID_ERR, IB_WC_LOC_ACCESS_ERR,
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ERDMA_WC_VENDOR_SQE_INVALID_STAG },
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{ ERDMA_WC_SEND_ADDR_VIOLATION_ERR, IB_WC_LOC_ACCESS_ERR,
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ERDMA_WC_VENDOR_SQE_ADDR_VIOLATION },
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{ ERDMA_WC_SEND_RIGHT_VIOLATION_ERR, IB_WC_LOC_ACCESS_ERR,
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ERDMA_WC_VENDOR_SQE_ACCESS_ERR },
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{ ERDMA_WC_SEND_PDID_ERR, IB_WC_LOC_ACCESS_ERR,
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ERDMA_WC_VENDOR_SQE_INVALID_PD },
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{ ERDMA_WC_SEND_WARRPING_ERR, IB_WC_LOC_ACCESS_ERR,
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ERDMA_WC_VENDOR_SQE_WARP_ERR },
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{ ERDMA_WC_FLUSH_ERR, IB_WC_WR_FLUSH_ERR, ERDMA_WC_VENDOR_NO_ERR },
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{ ERDMA_WC_RETRY_EXC_ERR, IB_WC_RETRY_EXC_ERR, ERDMA_WC_VENDOR_NO_ERR },
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};
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#define ERDMA_POLLCQ_NO_QP 1
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static int erdma_poll_one_cqe(struct erdma_cq *cq, struct ib_wc *wc)
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{
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struct erdma_dev *dev = to_edev(cq->ibcq.device);
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u8 opcode, syndrome, qtype;
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struct erdma_kqp *kern_qp;
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struct erdma_cqe *cqe;
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struct erdma_qp *qp;
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u16 wqe_idx, depth;
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u32 qpn, cqe_hdr;
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u64 *id_table;
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u64 *wqe_hdr;
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cqe = get_next_valid_cqe(cq);
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if (!cqe)
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return -EAGAIN;
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cq->kern_cq.ci++;
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/* cqbuf should be ready when we poll */
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dma_rmb();
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qpn = be32_to_cpu(cqe->qpn);
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wqe_idx = be32_to_cpu(cqe->qe_idx);
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cqe_hdr = be32_to_cpu(cqe->hdr);
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qp = find_qp_by_qpn(dev, qpn);
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if (!qp)
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return ERDMA_POLLCQ_NO_QP;
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kern_qp = &qp->kern_qp;
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qtype = FIELD_GET(ERDMA_CQE_HDR_QTYPE_MASK, cqe_hdr);
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syndrome = FIELD_GET(ERDMA_CQE_HDR_SYNDROME_MASK, cqe_hdr);
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opcode = FIELD_GET(ERDMA_CQE_HDR_OPCODE_MASK, cqe_hdr);
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if (qtype == ERDMA_CQE_QTYPE_SQ) {
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id_table = kern_qp->swr_tbl;
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depth = qp->attrs.sq_size;
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wqe_hdr = get_queue_entry(qp->kern_qp.sq_buf, wqe_idx,
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qp->attrs.sq_size, SQEBB_SHIFT);
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kern_qp->sq_ci =
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FIELD_GET(ERDMA_SQE_HDR_WQEBB_CNT_MASK, *wqe_hdr) +
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wqe_idx + 1;
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} else {
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id_table = kern_qp->rwr_tbl;
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depth = qp->attrs.rq_size;
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}
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wc->wr_id = id_table[wqe_idx & (depth - 1)];
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wc->byte_len = be32_to_cpu(cqe->size);
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wc->wc_flags = 0;
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wc->opcode = wc_mapping_table[opcode];
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if (opcode == ERDMA_OP_RECV_IMM || opcode == ERDMA_OP_RSP_SEND_IMM) {
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wc->ex.imm_data = cpu_to_be32(le32_to_cpu(cqe->imm_data));
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wc->wc_flags |= IB_WC_WITH_IMM;
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} else if (opcode == ERDMA_OP_RECV_INV) {
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wc->ex.invalidate_rkey = be32_to_cpu(cqe->inv_rkey);
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wc->wc_flags |= IB_WC_WITH_INVALIDATE;
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}
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if (syndrome >= ERDMA_NUM_WC_STATUS)
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syndrome = ERDMA_WC_GENERAL_ERR;
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wc->status = map_cqe_status[syndrome].base;
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wc->vendor_err = map_cqe_status[syndrome].vendor;
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wc->qp = &qp->ibqp;
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return 0;
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}
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int erdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
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{
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struct erdma_cq *cq = to_ecq(ibcq);
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unsigned long flags;
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int npolled, ret;
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spin_lock_irqsave(&cq->kern_cq.lock, flags);
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for (npolled = 0; npolled < num_entries;) {
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ret = erdma_poll_one_cqe(cq, wc + npolled);
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if (ret == -EAGAIN) /* no received new CQEs. */
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break;
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else if (ret) /* ignore invalid CQEs. */
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continue;
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npolled++;
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}
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spin_unlock_irqrestore(&cq->kern_cq.lock, flags);
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return npolled;
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}
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