893 lines
23 KiB
C
893 lines
23 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Cavium, Inc.
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*/
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/* ETHTOOL Support for VNIC_VF Device*/
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#include <linux/ethtool.h>
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#include <linux/pci.h>
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#include <linux/net_tstamp.h>
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#include "nic_reg.h"
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#include "nic.h"
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#include "nicvf_queues.h"
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#include "q_struct.h"
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#include "thunder_bgx.h"
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#include "../common/cavium_ptp.h"
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#define DRV_NAME "nicvf"
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struct nicvf_stat {
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char name[ETH_GSTRING_LEN];
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unsigned int index;
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};
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#define NICVF_HW_STAT(stat) { \
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.name = #stat, \
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.index = offsetof(struct nicvf_hw_stats, stat) / sizeof(u64), \
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}
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#define NICVF_DRV_STAT(stat) { \
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.name = #stat, \
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.index = offsetof(struct nicvf_drv_stats, stat) / sizeof(u64), \
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}
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static const struct nicvf_stat nicvf_hw_stats[] = {
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NICVF_HW_STAT(rx_bytes),
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NICVF_HW_STAT(rx_frames),
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NICVF_HW_STAT(rx_ucast_frames),
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NICVF_HW_STAT(rx_bcast_frames),
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NICVF_HW_STAT(rx_mcast_frames),
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NICVF_HW_STAT(rx_drops),
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NICVF_HW_STAT(rx_drop_red),
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NICVF_HW_STAT(rx_drop_red_bytes),
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NICVF_HW_STAT(rx_drop_overrun),
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NICVF_HW_STAT(rx_drop_overrun_bytes),
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NICVF_HW_STAT(rx_drop_bcast),
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NICVF_HW_STAT(rx_drop_mcast),
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NICVF_HW_STAT(rx_drop_l3_bcast),
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NICVF_HW_STAT(rx_drop_l3_mcast),
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NICVF_HW_STAT(rx_fcs_errors),
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NICVF_HW_STAT(rx_l2_errors),
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NICVF_HW_STAT(tx_bytes),
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NICVF_HW_STAT(tx_frames),
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NICVF_HW_STAT(tx_ucast_frames),
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NICVF_HW_STAT(tx_bcast_frames),
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NICVF_HW_STAT(tx_mcast_frames),
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NICVF_HW_STAT(tx_drops),
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};
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static const struct nicvf_stat nicvf_drv_stats[] = {
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NICVF_DRV_STAT(rx_bgx_truncated_pkts),
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NICVF_DRV_STAT(rx_jabber_errs),
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NICVF_DRV_STAT(rx_fcs_errs),
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NICVF_DRV_STAT(rx_bgx_errs),
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NICVF_DRV_STAT(rx_prel2_errs),
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NICVF_DRV_STAT(rx_l2_hdr_malformed),
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NICVF_DRV_STAT(rx_oversize),
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NICVF_DRV_STAT(rx_undersize),
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NICVF_DRV_STAT(rx_l2_len_mismatch),
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NICVF_DRV_STAT(rx_l2_pclp),
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NICVF_DRV_STAT(rx_ip_ver_errs),
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NICVF_DRV_STAT(rx_ip_csum_errs),
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NICVF_DRV_STAT(rx_ip_hdr_malformed),
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NICVF_DRV_STAT(rx_ip_payload_malformed),
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NICVF_DRV_STAT(rx_ip_ttl_errs),
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NICVF_DRV_STAT(rx_l3_pclp),
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NICVF_DRV_STAT(rx_l4_malformed),
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NICVF_DRV_STAT(rx_l4_csum_errs),
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NICVF_DRV_STAT(rx_udp_len_errs),
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NICVF_DRV_STAT(rx_l4_port_errs),
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NICVF_DRV_STAT(rx_tcp_flag_errs),
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NICVF_DRV_STAT(rx_tcp_offset_errs),
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NICVF_DRV_STAT(rx_l4_pclp),
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NICVF_DRV_STAT(rx_truncated_pkts),
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NICVF_DRV_STAT(tx_desc_fault),
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NICVF_DRV_STAT(tx_hdr_cons_err),
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NICVF_DRV_STAT(tx_subdesc_err),
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NICVF_DRV_STAT(tx_max_size_exceeded),
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NICVF_DRV_STAT(tx_imm_size_oflow),
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NICVF_DRV_STAT(tx_data_seq_err),
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NICVF_DRV_STAT(tx_mem_seq_err),
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NICVF_DRV_STAT(tx_lock_viol),
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NICVF_DRV_STAT(tx_data_fault),
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NICVF_DRV_STAT(tx_tstmp_conflict),
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NICVF_DRV_STAT(tx_tstmp_timeout),
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NICVF_DRV_STAT(tx_mem_fault),
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NICVF_DRV_STAT(tx_csum_overlap),
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NICVF_DRV_STAT(tx_csum_overflow),
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NICVF_DRV_STAT(tx_tso),
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NICVF_DRV_STAT(tx_timeout),
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NICVF_DRV_STAT(txq_stop),
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NICVF_DRV_STAT(txq_wake),
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NICVF_DRV_STAT(rcv_buffer_alloc_failures),
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NICVF_DRV_STAT(page_alloc),
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};
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static const struct nicvf_stat nicvf_queue_stats[] = {
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{ "bytes", 0 },
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{ "frames", 1 },
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};
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static const unsigned int nicvf_n_hw_stats = ARRAY_SIZE(nicvf_hw_stats);
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static const unsigned int nicvf_n_drv_stats = ARRAY_SIZE(nicvf_drv_stats);
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static const unsigned int nicvf_n_queue_stats = ARRAY_SIZE(nicvf_queue_stats);
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static int nicvf_get_link_ksettings(struct net_device *netdev,
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struct ethtool_link_ksettings *cmd)
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{
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struct nicvf *nic = netdev_priv(netdev);
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u32 supported, advertising;
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supported = 0;
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advertising = 0;
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if (!nic->link_up) {
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cmd->base.duplex = DUPLEX_UNKNOWN;
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cmd->base.speed = SPEED_UNKNOWN;
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return 0;
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}
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switch (nic->speed) {
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case SPEED_1000:
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cmd->base.port = PORT_MII | PORT_TP;
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cmd->base.autoneg = AUTONEG_ENABLE;
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supported |= SUPPORTED_MII | SUPPORTED_TP;
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supported |= SUPPORTED_1000baseT_Full |
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SUPPORTED_1000baseT_Half |
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SUPPORTED_100baseT_Full |
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SUPPORTED_100baseT_Half |
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SUPPORTED_10baseT_Full |
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SUPPORTED_10baseT_Half;
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supported |= SUPPORTED_Autoneg;
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advertising |= ADVERTISED_1000baseT_Full |
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ADVERTISED_1000baseT_Half |
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ADVERTISED_100baseT_Full |
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ADVERTISED_100baseT_Half |
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ADVERTISED_10baseT_Full |
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ADVERTISED_10baseT_Half;
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break;
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case SPEED_10000:
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if (nic->mac_type == BGX_MODE_RXAUI) {
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cmd->base.port = PORT_TP;
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supported |= SUPPORTED_TP;
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} else {
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cmd->base.port = PORT_FIBRE;
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supported |= SUPPORTED_FIBRE;
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}
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cmd->base.autoneg = AUTONEG_DISABLE;
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supported |= SUPPORTED_10000baseT_Full;
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break;
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case SPEED_40000:
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cmd->base.port = PORT_FIBRE;
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cmd->base.autoneg = AUTONEG_DISABLE;
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supported |= SUPPORTED_FIBRE;
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supported |= SUPPORTED_40000baseCR4_Full;
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break;
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}
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cmd->base.duplex = nic->duplex;
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cmd->base.speed = nic->speed;
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ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
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supported);
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ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
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advertising);
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return 0;
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}
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static u32 nicvf_get_link(struct net_device *netdev)
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{
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struct nicvf *nic = netdev_priv(netdev);
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return nic->link_up;
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}
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static void nicvf_get_drvinfo(struct net_device *netdev,
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struct ethtool_drvinfo *info)
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{
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struct nicvf *nic = netdev_priv(netdev);
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strscpy(info->driver, DRV_NAME, sizeof(info->driver));
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strscpy(info->bus_info, pci_name(nic->pdev), sizeof(info->bus_info));
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}
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static u32 nicvf_get_msglevel(struct net_device *netdev)
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{
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struct nicvf *nic = netdev_priv(netdev);
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return nic->msg_enable;
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}
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static void nicvf_set_msglevel(struct net_device *netdev, u32 lvl)
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{
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struct nicvf *nic = netdev_priv(netdev);
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nic->msg_enable = lvl;
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}
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static void nicvf_get_qset_strings(struct nicvf *nic, u8 **data, int qset)
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{
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int stats, qidx;
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int start_qidx = qset * MAX_RCV_QUEUES_PER_QS;
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for (qidx = 0; qidx < nic->qs->rq_cnt; qidx++) {
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for (stats = 0; stats < nicvf_n_queue_stats; stats++) {
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sprintf(*data, "rxq%d: %s", qidx + start_qidx,
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nicvf_queue_stats[stats].name);
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*data += ETH_GSTRING_LEN;
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}
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}
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for (qidx = 0; qidx < nic->qs->sq_cnt; qidx++) {
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for (stats = 0; stats < nicvf_n_queue_stats; stats++) {
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sprintf(*data, "txq%d: %s", qidx + start_qidx,
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nicvf_queue_stats[stats].name);
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*data += ETH_GSTRING_LEN;
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}
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}
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}
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static void nicvf_get_strings(struct net_device *netdev, u32 sset, u8 *data)
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{
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struct nicvf *nic = netdev_priv(netdev);
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int stats;
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int sqs;
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if (sset != ETH_SS_STATS)
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return;
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for (stats = 0; stats < nicvf_n_hw_stats; stats++) {
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memcpy(data, nicvf_hw_stats[stats].name, ETH_GSTRING_LEN);
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data += ETH_GSTRING_LEN;
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}
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for (stats = 0; stats < nicvf_n_drv_stats; stats++) {
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memcpy(data, nicvf_drv_stats[stats].name, ETH_GSTRING_LEN);
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data += ETH_GSTRING_LEN;
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}
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nicvf_get_qset_strings(nic, &data, 0);
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for (sqs = 0; sqs < nic->sqs_count; sqs++) {
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if (!nic->snicvf[sqs])
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continue;
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nicvf_get_qset_strings(nic->snicvf[sqs], &data, sqs + 1);
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}
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for (stats = 0; stats < BGX_RX_STATS_COUNT; stats++) {
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sprintf(data, "bgx_rxstat%d: ", stats);
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data += ETH_GSTRING_LEN;
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}
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for (stats = 0; stats < BGX_TX_STATS_COUNT; stats++) {
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sprintf(data, "bgx_txstat%d: ", stats);
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data += ETH_GSTRING_LEN;
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}
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}
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static int nicvf_get_sset_count(struct net_device *netdev, int sset)
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{
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struct nicvf *nic = netdev_priv(netdev);
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int qstats_count;
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int sqs;
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if (sset != ETH_SS_STATS)
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return -EINVAL;
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qstats_count = nicvf_n_queue_stats *
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(nic->qs->rq_cnt + nic->qs->sq_cnt);
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for (sqs = 0; sqs < nic->sqs_count; sqs++) {
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struct nicvf *snic;
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snic = nic->snicvf[sqs];
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if (!snic)
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continue;
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qstats_count += nicvf_n_queue_stats *
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(snic->qs->rq_cnt + snic->qs->sq_cnt);
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}
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return nicvf_n_hw_stats + nicvf_n_drv_stats +
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qstats_count +
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BGX_RX_STATS_COUNT + BGX_TX_STATS_COUNT;
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}
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static void nicvf_get_qset_stats(struct nicvf *nic,
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struct ethtool_stats *stats, u64 **data)
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{
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int stat, qidx;
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if (!nic)
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return;
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for (qidx = 0; qidx < nic->qs->rq_cnt; qidx++) {
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nicvf_update_rq_stats(nic, qidx);
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for (stat = 0; stat < nicvf_n_queue_stats; stat++)
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*((*data)++) = ((u64 *)&nic->qs->rq[qidx].stats)
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[nicvf_queue_stats[stat].index];
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}
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for (qidx = 0; qidx < nic->qs->sq_cnt; qidx++) {
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nicvf_update_sq_stats(nic, qidx);
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for (stat = 0; stat < nicvf_n_queue_stats; stat++)
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*((*data)++) = ((u64 *)&nic->qs->sq[qidx].stats)
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[nicvf_queue_stats[stat].index];
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}
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}
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static void nicvf_get_ethtool_stats(struct net_device *netdev,
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struct ethtool_stats *stats, u64 *data)
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{
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struct nicvf *nic = netdev_priv(netdev);
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int stat, tmp_stats;
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int sqs, cpu;
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nicvf_update_stats(nic);
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/* Update LMAC stats */
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nicvf_update_lmac_stats(nic);
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for (stat = 0; stat < nicvf_n_hw_stats; stat++)
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*(data++) = ((u64 *)&nic->hw_stats)
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[nicvf_hw_stats[stat].index];
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for (stat = 0; stat < nicvf_n_drv_stats; stat++) {
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tmp_stats = 0;
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for_each_possible_cpu(cpu)
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tmp_stats += ((u64 *)per_cpu_ptr(nic->drv_stats, cpu))
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[nicvf_drv_stats[stat].index];
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*(data++) = tmp_stats;
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}
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nicvf_get_qset_stats(nic, stats, &data);
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for (sqs = 0; sqs < nic->sqs_count; sqs++) {
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if (!nic->snicvf[sqs])
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continue;
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nicvf_get_qset_stats(nic->snicvf[sqs], stats, &data);
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}
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for (stat = 0; stat < BGX_RX_STATS_COUNT; stat++)
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*(data++) = nic->bgx_stats.rx_stats[stat];
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for (stat = 0; stat < BGX_TX_STATS_COUNT; stat++)
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*(data++) = nic->bgx_stats.tx_stats[stat];
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}
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static int nicvf_get_regs_len(struct net_device *dev)
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{
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return sizeof(u64) * NIC_VF_REG_COUNT;
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}
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static void nicvf_get_regs(struct net_device *dev,
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struct ethtool_regs *regs, void *reg)
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{
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struct nicvf *nic = netdev_priv(dev);
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u64 *p = (u64 *)reg;
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u64 reg_offset;
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int mbox, key, stat, q;
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int i = 0;
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regs->version = 0;
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memset(p, 0, NIC_VF_REG_COUNT);
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p[i++] = nicvf_reg_read(nic, NIC_VNIC_CFG);
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/* Mailbox registers */
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for (mbox = 0; mbox < NIC_PF_VF_MAILBOX_SIZE; mbox++)
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p[i++] = nicvf_reg_read(nic,
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NIC_VF_PF_MAILBOX_0_1 | (mbox << 3));
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p[i++] = nicvf_reg_read(nic, NIC_VF_INT);
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p[i++] = nicvf_reg_read(nic, NIC_VF_INT_W1S);
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p[i++] = nicvf_reg_read(nic, NIC_VF_ENA_W1C);
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p[i++] = nicvf_reg_read(nic, NIC_VF_ENA_W1S);
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p[i++] = nicvf_reg_read(nic, NIC_VNIC_RSS_CFG);
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for (key = 0; key < RSS_HASH_KEY_SIZE; key++)
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p[i++] = nicvf_reg_read(nic, NIC_VNIC_RSS_KEY_0_4 | (key << 3));
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/* Tx/Rx statistics */
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for (stat = 0; stat < TX_STATS_ENUM_LAST; stat++)
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p[i++] = nicvf_reg_read(nic,
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NIC_VNIC_TX_STAT_0_4 | (stat << 3));
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for (i = 0; i < RX_STATS_ENUM_LAST; i++)
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p[i++] = nicvf_reg_read(nic,
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NIC_VNIC_RX_STAT_0_13 | (stat << 3));
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p[i++] = nicvf_reg_read(nic, NIC_QSET_RQ_GEN_CFG);
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/* All completion queue's registers */
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for (q = 0; q < MAX_CMP_QUEUES_PER_QS; q++) {
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_CFG, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_CFG2, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_THRESH, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_BASE, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_TAIL, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_DOOR, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS2, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_DEBUG, q);
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}
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/* All receive queue's registers */
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for (q = 0; q < MAX_RCV_QUEUES_PER_QS; q++) {
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RQ_0_7_CFG, q);
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p[i++] = nicvf_queue_reg_read(nic,
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NIC_QSET_RQ_0_7_STAT_0_1, q);
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reg_offset = NIC_QSET_RQ_0_7_STAT_0_1 | (1 << 3);
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p[i++] = nicvf_queue_reg_read(nic, reg_offset, q);
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}
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for (q = 0; q < MAX_SND_QUEUES_PER_QS; q++) {
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_CFG, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_THRESH, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_BASE, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_HEAD, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_TAIL, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_DOOR, q);
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p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_STATUS, q);
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_DEBUG, q);
|
|
/* Padding, was NIC_QSET_SQ_0_7_CNM_CHG, which
|
|
* produces bus errors when read
|
|
*/
|
|
p[i++] = 0;
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_SQ_0_7_STAT_0_1, q);
|
|
reg_offset = NIC_QSET_SQ_0_7_STAT_0_1 | (1 << 3);
|
|
p[i++] = nicvf_queue_reg_read(nic, reg_offset, q);
|
|
}
|
|
|
|
for (q = 0; q < MAX_RCV_BUF_DESC_RINGS_PER_QS; q++) {
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_CFG, q);
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_THRESH, q);
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_BASE, q);
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_HEAD, q);
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_TAIL, q);
|
|
p[i++] = nicvf_queue_reg_read(nic, NIC_QSET_RBDR_0_1_DOOR, q);
|
|
p[i++] = nicvf_queue_reg_read(nic,
|
|
NIC_QSET_RBDR_0_1_STATUS0, q);
|
|
p[i++] = nicvf_queue_reg_read(nic,
|
|
NIC_QSET_RBDR_0_1_STATUS1, q);
|
|
reg_offset = NIC_QSET_RBDR_0_1_PREFETCH_STATUS;
|
|
p[i++] = nicvf_queue_reg_read(nic, reg_offset, q);
|
|
}
|
|
}
|
|
|
|
static int nicvf_get_coalesce(struct net_device *netdev,
|
|
struct ethtool_coalesce *cmd,
|
|
struct kernel_ethtool_coalesce *kernel_coal,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
struct nicvf *nic = netdev_priv(netdev);
|
|
|
|
cmd->rx_coalesce_usecs = nic->cq_coalesce_usecs;
|
|
return 0;
|
|
}
|
|
|
|
static void nicvf_get_ringparam(struct net_device *netdev,
|
|
struct ethtool_ringparam *ring,
|
|
struct kernel_ethtool_ringparam *kernel_ring,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
struct nicvf *nic = netdev_priv(netdev);
|
|
struct queue_set *qs = nic->qs;
|
|
|
|
ring->rx_max_pending = MAX_CMP_QUEUE_LEN;
|
|
ring->rx_pending = qs->cq_len;
|
|
ring->tx_max_pending = MAX_SND_QUEUE_LEN;
|
|
ring->tx_pending = qs->sq_len;
|
|
}
|
|
|
|
static int nicvf_set_ringparam(struct net_device *netdev,
|
|
struct ethtool_ringparam *ring,
|
|
struct kernel_ethtool_ringparam *kernel_ring,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
struct nicvf *nic = netdev_priv(netdev);
|
|
struct queue_set *qs = nic->qs;
|
|
u32 rx_count, tx_count;
|
|
|
|
/* Due to HW errata this is not supported on T88 pass 1.x silicon */
|
|
if (pass1_silicon(nic->pdev))
|
|
return -EINVAL;
|
|
|
|
if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
|
|
return -EINVAL;
|
|
|
|
tx_count = clamp_t(u32, ring->tx_pending,
|
|
MIN_SND_QUEUE_LEN, MAX_SND_QUEUE_LEN);
|
|
rx_count = clamp_t(u32, ring->rx_pending,
|
|
MIN_CMP_QUEUE_LEN, MAX_CMP_QUEUE_LEN);
|
|
|
|
if ((tx_count == qs->sq_len) && (rx_count == qs->cq_len))
|
|
return 0;
|
|
|
|
/* Permitted lengths are 1K, 2K, 4K, 8K, 16K, 32K, 64K */
|
|
qs->sq_len = rounddown_pow_of_two(tx_count);
|
|
qs->cq_len = rounddown_pow_of_two(rx_count);
|
|
|
|
if (netif_running(netdev)) {
|
|
nicvf_stop(netdev);
|
|
nicvf_open(netdev);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nicvf_get_rss_hash_opts(struct nicvf *nic,
|
|
struct ethtool_rxnfc *info)
|
|
{
|
|
info->data = 0;
|
|
|
|
switch (info->flow_type) {
|
|
case TCP_V4_FLOW:
|
|
case TCP_V6_FLOW:
|
|
case UDP_V4_FLOW:
|
|
case UDP_V6_FLOW:
|
|
case SCTP_V4_FLOW:
|
|
case SCTP_V6_FLOW:
|
|
info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
|
|
fallthrough;
|
|
case IPV4_FLOW:
|
|
case IPV6_FLOW:
|
|
info->data |= RXH_IP_SRC | RXH_IP_DST;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nicvf_get_rxnfc(struct net_device *dev,
|
|
struct ethtool_rxnfc *info, u32 *rules)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
int ret = -EOPNOTSUPP;
|
|
|
|
switch (info->cmd) {
|
|
case ETHTOOL_GRXRINGS:
|
|
info->data = nic->rx_queues;
|
|
ret = 0;
|
|
break;
|
|
case ETHTOOL_GRXFH:
|
|
return nicvf_get_rss_hash_opts(nic, info);
|
|
default:
|
|
break;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int nicvf_set_rss_hash_opts(struct nicvf *nic,
|
|
struct ethtool_rxnfc *info)
|
|
{
|
|
struct nicvf_rss_info *rss = &nic->rss_info;
|
|
u64 rss_cfg = nicvf_reg_read(nic, NIC_VNIC_RSS_CFG);
|
|
|
|
if (!rss->enable)
|
|
netdev_err(nic->netdev,
|
|
"RSS is disabled, hash cannot be set\n");
|
|
|
|
netdev_info(nic->netdev, "Set RSS flow type = %d, data = %lld\n",
|
|
info->flow_type, info->data);
|
|
|
|
if (!(info->data & RXH_IP_SRC) || !(info->data & RXH_IP_DST))
|
|
return -EINVAL;
|
|
|
|
switch (info->flow_type) {
|
|
case TCP_V4_FLOW:
|
|
case TCP_V6_FLOW:
|
|
switch (info->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
|
|
case 0:
|
|
rss_cfg &= ~(1ULL << RSS_HASH_TCP);
|
|
break;
|
|
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
|
|
rss_cfg |= (1ULL << RSS_HASH_TCP);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
break;
|
|
case UDP_V4_FLOW:
|
|
case UDP_V6_FLOW:
|
|
switch (info->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
|
|
case 0:
|
|
rss_cfg &= ~(1ULL << RSS_HASH_UDP);
|
|
break;
|
|
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
|
|
rss_cfg |= (1ULL << RSS_HASH_UDP);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
break;
|
|
case SCTP_V4_FLOW:
|
|
case SCTP_V6_FLOW:
|
|
switch (info->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
|
|
case 0:
|
|
rss_cfg &= ~(1ULL << RSS_HASH_L4ETC);
|
|
break;
|
|
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
|
|
rss_cfg |= (1ULL << RSS_HASH_L4ETC);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
break;
|
|
case IPV4_FLOW:
|
|
case IPV6_FLOW:
|
|
rss_cfg = RSS_HASH_IP;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss_cfg);
|
|
return 0;
|
|
}
|
|
|
|
static int nicvf_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
|
|
switch (info->cmd) {
|
|
case ETHTOOL_SRXFH:
|
|
return nicvf_set_rss_hash_opts(nic, info);
|
|
default:
|
|
break;
|
|
}
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static u32 nicvf_get_rxfh_key_size(struct net_device *netdev)
|
|
{
|
|
return RSS_HASH_KEY_SIZE * sizeof(u64);
|
|
}
|
|
|
|
static u32 nicvf_get_rxfh_indir_size(struct net_device *dev)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
|
|
return nic->rss_info.rss_size;
|
|
}
|
|
|
|
static int nicvf_get_rxfh(struct net_device *dev, u32 *indir, u8 *hkey,
|
|
u8 *hfunc)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
struct nicvf_rss_info *rss = &nic->rss_info;
|
|
int idx;
|
|
|
|
if (indir) {
|
|
for (idx = 0; idx < rss->rss_size; idx++)
|
|
indir[idx] = rss->ind_tbl[idx];
|
|
}
|
|
|
|
if (hkey)
|
|
memcpy(hkey, rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
|
|
|
|
if (hfunc)
|
|
*hfunc = ETH_RSS_HASH_TOP;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nicvf_set_rxfh(struct net_device *dev, const u32 *indir,
|
|
const u8 *hkey, const u8 hfunc)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
struct nicvf_rss_info *rss = &nic->rss_info;
|
|
int idx;
|
|
|
|
if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
|
|
return -EOPNOTSUPP;
|
|
|
|
if (!rss->enable) {
|
|
netdev_err(nic->netdev,
|
|
"RSS is disabled, cannot change settings\n");
|
|
return -EIO;
|
|
}
|
|
|
|
if (indir) {
|
|
for (idx = 0; idx < rss->rss_size; idx++)
|
|
rss->ind_tbl[idx] = indir[idx];
|
|
}
|
|
|
|
if (hkey) {
|
|
memcpy(rss->key, hkey, RSS_HASH_KEY_SIZE * sizeof(u64));
|
|
nicvf_set_rss_key(nic);
|
|
}
|
|
|
|
nicvf_config_rss(nic);
|
|
return 0;
|
|
}
|
|
|
|
/* Get no of queues device supports and current queue count */
|
|
static void nicvf_get_channels(struct net_device *dev,
|
|
struct ethtool_channels *channel)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
|
|
memset(channel, 0, sizeof(*channel));
|
|
|
|
channel->max_rx = nic->max_queues;
|
|
channel->max_tx = nic->max_queues;
|
|
|
|
channel->rx_count = nic->rx_queues;
|
|
channel->tx_count = nic->tx_queues;
|
|
}
|
|
|
|
/* Set no of Tx, Rx queues to be used */
|
|
static int nicvf_set_channels(struct net_device *dev,
|
|
struct ethtool_channels *channel)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
int err = 0;
|
|
bool if_up = netif_running(dev);
|
|
u8 cqcount, txq_count;
|
|
|
|
if (!channel->rx_count || !channel->tx_count)
|
|
return -EINVAL;
|
|
if (channel->rx_count > nic->max_queues)
|
|
return -EINVAL;
|
|
if (channel->tx_count > nic->max_queues)
|
|
return -EINVAL;
|
|
|
|
if (channel->tx_count + channel->rx_count > nic->max_queues) {
|
|
if (nic->xdp_prog) {
|
|
netdev_err(nic->netdev,
|
|
"XDP mode, RXQs + TXQs > Max %d\n",
|
|
nic->max_queues);
|
|
return -EINVAL;
|
|
}
|
|
|
|
xdp_clear_features_flag(nic->netdev);
|
|
} else if (!pass1_silicon(nic->pdev)) {
|
|
xdp_set_features_flag(dev, NETDEV_XDP_ACT_BASIC);
|
|
}
|
|
|
|
if (if_up)
|
|
nicvf_stop(dev);
|
|
|
|
nic->rx_queues = channel->rx_count;
|
|
nic->tx_queues = channel->tx_count;
|
|
if (!nic->xdp_prog)
|
|
nic->xdp_tx_queues = 0;
|
|
else
|
|
nic->xdp_tx_queues = channel->rx_count;
|
|
|
|
txq_count = nic->xdp_tx_queues + nic->tx_queues;
|
|
cqcount = max(nic->rx_queues, txq_count);
|
|
|
|
if (cqcount > MAX_CMP_QUEUES_PER_QS) {
|
|
nic->sqs_count = roundup(cqcount, MAX_CMP_QUEUES_PER_QS);
|
|
nic->sqs_count = (nic->sqs_count / MAX_CMP_QUEUES_PER_QS) - 1;
|
|
} else {
|
|
nic->sqs_count = 0;
|
|
}
|
|
|
|
nic->qs->rq_cnt = min_t(u8, nic->rx_queues, MAX_RCV_QUEUES_PER_QS);
|
|
nic->qs->sq_cnt = min_t(u8, txq_count, MAX_SND_QUEUES_PER_QS);
|
|
nic->qs->cq_cnt = max(nic->qs->rq_cnt, nic->qs->sq_cnt);
|
|
|
|
err = nicvf_set_real_num_queues(dev, nic->tx_queues, nic->rx_queues);
|
|
if (err)
|
|
return err;
|
|
|
|
if (if_up)
|
|
nicvf_open(dev);
|
|
|
|
netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n",
|
|
nic->tx_queues, nic->rx_queues);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void nicvf_get_pauseparam(struct net_device *dev,
|
|
struct ethtool_pauseparam *pause)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
union nic_mbx mbx = {};
|
|
|
|
/* Supported only for 10G/40G interfaces */
|
|
if ((nic->mac_type == BGX_MODE_SGMII) ||
|
|
(nic->mac_type == BGX_MODE_QSGMII) ||
|
|
(nic->mac_type == BGX_MODE_RGMII))
|
|
return;
|
|
|
|
mbx.pfc.msg = NIC_MBOX_MSG_PFC;
|
|
mbx.pfc.get = 1;
|
|
if (!nicvf_send_msg_to_pf(nic, &mbx)) {
|
|
pause->autoneg = nic->pfc.autoneg;
|
|
pause->rx_pause = nic->pfc.fc_rx;
|
|
pause->tx_pause = nic->pfc.fc_tx;
|
|
}
|
|
}
|
|
|
|
static int nicvf_set_pauseparam(struct net_device *dev,
|
|
struct ethtool_pauseparam *pause)
|
|
{
|
|
struct nicvf *nic = netdev_priv(dev);
|
|
union nic_mbx mbx = {};
|
|
|
|
/* Supported only for 10G/40G interfaces */
|
|
if ((nic->mac_type == BGX_MODE_SGMII) ||
|
|
(nic->mac_type == BGX_MODE_QSGMII) ||
|
|
(nic->mac_type == BGX_MODE_RGMII))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (pause->autoneg)
|
|
return -EOPNOTSUPP;
|
|
|
|
mbx.pfc.msg = NIC_MBOX_MSG_PFC;
|
|
mbx.pfc.get = 0;
|
|
mbx.pfc.fc_rx = pause->rx_pause;
|
|
mbx.pfc.fc_tx = pause->tx_pause;
|
|
if (nicvf_send_msg_to_pf(nic, &mbx))
|
|
return -EAGAIN;
|
|
|
|
nic->pfc.fc_rx = pause->rx_pause;
|
|
nic->pfc.fc_tx = pause->tx_pause;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nicvf_get_ts_info(struct net_device *netdev,
|
|
struct ethtool_ts_info *info)
|
|
{
|
|
struct nicvf *nic = netdev_priv(netdev);
|
|
|
|
if (!nic->ptp_clock)
|
|
return ethtool_op_get_ts_info(netdev, info);
|
|
|
|
info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
|
|
SOF_TIMESTAMPING_RX_SOFTWARE |
|
|
SOF_TIMESTAMPING_SOFTWARE |
|
|
SOF_TIMESTAMPING_TX_HARDWARE |
|
|
SOF_TIMESTAMPING_RX_HARDWARE |
|
|
SOF_TIMESTAMPING_RAW_HARDWARE;
|
|
|
|
info->phc_index = cavium_ptp_clock_index(nic->ptp_clock);
|
|
|
|
info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
|
|
|
|
info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
|
|
(1 << HWTSTAMP_FILTER_ALL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct ethtool_ops nicvf_ethtool_ops = {
|
|
.get_link = nicvf_get_link,
|
|
.get_drvinfo = nicvf_get_drvinfo,
|
|
.get_msglevel = nicvf_get_msglevel,
|
|
.set_msglevel = nicvf_set_msglevel,
|
|
.get_strings = nicvf_get_strings,
|
|
.get_sset_count = nicvf_get_sset_count,
|
|
.get_ethtool_stats = nicvf_get_ethtool_stats,
|
|
.get_regs_len = nicvf_get_regs_len,
|
|
.get_regs = nicvf_get_regs,
|
|
.get_coalesce = nicvf_get_coalesce,
|
|
.get_ringparam = nicvf_get_ringparam,
|
|
.set_ringparam = nicvf_set_ringparam,
|
|
.get_rxnfc = nicvf_get_rxnfc,
|
|
.set_rxnfc = nicvf_set_rxnfc,
|
|
.get_rxfh_key_size = nicvf_get_rxfh_key_size,
|
|
.get_rxfh_indir_size = nicvf_get_rxfh_indir_size,
|
|
.get_rxfh = nicvf_get_rxfh,
|
|
.set_rxfh = nicvf_set_rxfh,
|
|
.get_channels = nicvf_get_channels,
|
|
.set_channels = nicvf_set_channels,
|
|
.get_pauseparam = nicvf_get_pauseparam,
|
|
.set_pauseparam = nicvf_set_pauseparam,
|
|
.get_ts_info = nicvf_get_ts_info,
|
|
.get_link_ksettings = nicvf_get_link_ksettings,
|
|
};
|
|
|
|
void nicvf_set_ethtool_ops(struct net_device *netdev)
|
|
{
|
|
netdev->ethtool_ops = &nicvf_ethtool_ops;
|
|
}
|