708 lines
20 KiB
C
708 lines
20 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2014-2015 Hisilicon Limited.
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*/
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#ifndef __HNAE_H
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#define __HNAE_H
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/* Names used in this framework:
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* ae handle (handle):
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* a set of queues provided by AE
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* ring buffer queue (rbq):
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* the channel between upper layer and the AE, can do tx and rx
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* ring:
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* a tx or rx channel within a rbq
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* ring description (desc):
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* an element in the ring with packet information
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* buffer:
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* a memory region referred by desc with the full packet payload
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*
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* "num" means a static number set as a parameter, "count" mean a dynamic
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* number set while running
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* "cb" means control block
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*/
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#include <linux/acpi.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/notifier.h>
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#include <linux/phy.h>
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#include <linux/types.h>
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#define HNAE_DRIVER_VERSION "2.0"
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#define HNAE_DRIVER_NAME "hns"
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#define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation."
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#define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver"
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#define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem"
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#ifdef DEBUG
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#ifndef assert
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#define assert(expr) \
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do { \
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if (!(expr)) { \
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pr_err("Assertion failed! %s, %s, %s, line %d\n", \
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#expr, __FILE__, __func__, __LINE__); \
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} \
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} while (0)
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#endif
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#else
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#ifndef assert
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#define assert(expr)
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#endif
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#endif
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#define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0')
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#define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0')
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#define AE_IS_VER1(ver) ((ver) == AE_VERSION_1)
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#define AE_NAME_SIZE 16
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#define BD_SIZE_2048_MAX_MTU 6000
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/* some said the RX and TX RCB format should not be the same in the future. But
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* it is the same now...
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*/
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#define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */
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#define RCB_REG_BASEADDR_H 0x04
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#define RCB_REG_BD_NUM 0x08
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#define RCB_REG_BD_LEN 0x0C
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#define RCB_REG_PKTLINE 0x10
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#define RCB_REG_TAIL 0x18
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#define RCB_REG_HEAD 0x1C
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#define RCB_REG_FBDNUM 0x20
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#define RCB_REG_OFFSET 0x24 /* pkt num to be handled */
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#define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */
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#define HNS_RX_HEAD_SIZE 256
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#define HNAE_AE_REGISTER 0x1
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#define RCB_RING_NAME_LEN (IFNAMSIZ + 4)
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#define HNAE_LOWEST_LATENCY_COAL_PARAM 30
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#define HNAE_LOW_LATENCY_COAL_PARAM 80
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#define HNAE_BULK_LATENCY_COAL_PARAM 150
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enum hnae_led_state {
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HNAE_LED_INACTIVE,
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HNAE_LED_ACTIVE,
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HNAE_LED_ON,
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HNAE_LED_OFF
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};
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#define HNS_RX_FLAG_VLAN_PRESENT 0x1
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#define HNS_RX_FLAG_L3ID_IPV4 0x0
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#define HNS_RX_FLAG_L3ID_IPV6 0x1
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#define HNS_RX_FLAG_L4ID_UDP 0x0
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#define HNS_RX_FLAG_L4ID_TCP 0x1
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#define HNS_RX_FLAG_L4ID_SCTP 0x3
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#define HNS_TXD_ASID_S 0
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#define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S)
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#define HNS_TXD_BUFNUM_S 8
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#define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S)
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#define HNS_TXD_PORTID_S 10
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#define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S)
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#define HNS_TXD_RA_B 8
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#define HNS_TXD_RI_B 9
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#define HNS_TXD_L4CS_B 10
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#define HNS_TXD_L3CS_B 11
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#define HNS_TXD_FE_B 12
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#define HNS_TXD_VLD_B 13
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#define HNS_TXD_IPOFFSET_S 14
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#define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
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#define HNS_RXD_IPOFFSET_S 0
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#define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
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#define HNS_RXD_BUFNUM_S 8
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#define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S)
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#define HNS_RXD_PORTID_S 10
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#define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S)
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#define HNS_RXD_DMAC_S 13
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#define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S)
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#define HNS_RXD_VLAN_S 15
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#define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S)
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#define HNS_RXD_L3ID_S 17
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#define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S)
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#define HNS_RXD_L4ID_S 21
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#define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S)
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#define HNS_RXD_FE_B 25
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#define HNS_RXD_FRAG_B 26
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#define HNS_RXD_VLD_B 27
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#define HNS_RXD_L2E_B 28
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#define HNS_RXD_L3E_B 29
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#define HNS_RXD_L4E_B 30
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#define HNS_RXD_DROP_B 31
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#define HNS_RXD_VLANID_S 8
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#define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S)
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#define HNS_RXD_CFI_B 20
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#define HNS_RXD_PRI_S 21
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#define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S)
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#define HNS_RXD_ASID_S 24
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#define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S)
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#define HNSV2_TXD_BUFNUM_S 0
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#define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S)
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#define HNSV2_TXD_PORTID_S 4
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#define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S)
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#define HNSV2_TXD_RI_B 1
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#define HNSV2_TXD_L4CS_B 2
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#define HNSV2_TXD_L3CS_B 3
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#define HNSV2_TXD_FE_B 4
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#define HNSV2_TXD_VLD_B 5
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#define HNSV2_TXD_TSE_B 0
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#define HNSV2_TXD_VLAN_EN_B 1
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#define HNSV2_TXD_SNAP_B 2
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#define HNSV2_TXD_IPV6_B 3
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#define HNSV2_TXD_SCTP_B 4
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/* hardware spec ring buffer format */
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struct __packed hnae_desc {
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__le64 addr;
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union {
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struct {
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union {
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__le16 asid_bufnum_pid;
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__le16 asid;
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};
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__le16 send_size;
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union {
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__le32 flag_ipoffset;
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struct {
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__u8 bn_pid;
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__u8 ra_ri_cs_fe_vld;
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__u8 ip_offset;
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__u8 tse_vlan_snap_v6_sctp_nth;
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};
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};
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__le16 mss;
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__u8 l4_len;
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__u8 reserved1;
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__le16 paylen;
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__u8 vmid;
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__u8 qid;
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__le32 reserved2[2];
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} tx;
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struct {
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__le32 ipoff_bnum_pid_flag;
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__le16 pkt_len;
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__le16 size;
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union {
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__le32 vlan_pri_asid;
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struct {
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__le16 asid;
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__le16 vlan_cfi_pri;
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};
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};
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__le32 rss_hash;
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__le32 reserved_1[2];
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} rx;
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};
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};
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struct hnae_desc_cb {
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dma_addr_t dma; /* dma address of this desc */
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void *buf; /* cpu addr for a desc */
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/* priv data for the desc, e.g. skb when use with ip stack*/
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void *priv;
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u32 page_offset;
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u32 length; /* length of the buffer */
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u16 reuse_flag;
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/* desc type, used by the ring user to mark the type of the priv data */
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u16 type;
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};
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#define setflags(flags, bits) ((flags) |= (bits))
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#define unsetflags(flags, bits) ((flags) &= ~(bits))
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/* hnae_ring->flags fields */
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#define RINGF_DIR 0x1 /* TX or RX ring, set if TX */
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#define is_tx_ring(ring) ((ring)->flags & RINGF_DIR)
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#define is_rx_ring(ring) (!is_tx_ring(ring))
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#define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \
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DMA_TO_DEVICE : DMA_FROM_DEVICE)
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struct ring_stats {
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u64 io_err_cnt;
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u64 sw_err_cnt;
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u64 seg_pkt_cnt;
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union {
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struct {
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u64 tx_pkts;
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u64 tx_bytes;
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u64 tx_err_cnt;
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u64 restart_queue;
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u64 tx_busy;
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};
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struct {
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u64 rx_pkts;
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u64 rx_bytes;
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u64 rx_err_cnt;
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u64 reuse_pg_cnt;
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u64 err_pkt_len;
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u64 non_vld_descs;
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u64 err_bd_num;
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u64 l2_err;
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u64 l3l4_csum_err;
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};
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};
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};
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struct hnae_queue;
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struct hnae_ring {
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u8 __iomem *io_base; /* base io address for the ring */
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struct hnae_desc *desc; /* dma map address space */
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struct hnae_desc_cb *desc_cb;
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struct hnae_queue *q;
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int irq;
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char ring_name[RCB_RING_NAME_LEN];
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/* statistic */
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struct ring_stats stats;
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dma_addr_t desc_dma_addr;
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u32 buf_size; /* size for hnae_desc->addr, preset by AE */
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u16 desc_num; /* total number of desc */
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u16 max_desc_num_per_pkt;
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u16 max_raw_data_sz_per_desc;
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u16 max_pkt_size;
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int next_to_use; /* idx of next spare desc */
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/* idx of lastest sent desc, the ring is empty when equal to
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* next_to_use
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*/
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int next_to_clean;
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int flags; /* ring attribute */
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int irq_init_flag;
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/* total rx bytes after last rx rate calucated */
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u64 coal_last_rx_bytes;
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unsigned long coal_last_jiffies;
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u32 coal_param;
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u32 coal_rx_rate; /* rx rate in MB */
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};
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#define ring_ptr_move_fw(ring, p) \
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((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
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#define ring_ptr_move_bw(ring, p) \
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((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
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enum hns_desc_type {
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DESC_TYPE_SKB,
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DESC_TYPE_PAGE,
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};
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#define assert_is_ring_idx(ring, idx) \
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assert((idx) >= 0 && (idx) < (ring)->desc_num)
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/* the distance between [begin, end) in a ring buffer
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* note: there is a unuse slot between the begin and the end
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*/
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static inline int ring_dist(struct hnae_ring *ring, int begin, int end)
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{
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assert_is_ring_idx(ring, begin);
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assert_is_ring_idx(ring, end);
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return (end - begin + ring->desc_num) % ring->desc_num;
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}
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static inline int ring_space(struct hnae_ring *ring)
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{
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return ring->desc_num -
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ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1;
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}
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static inline int is_ring_empty(struct hnae_ring *ring)
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{
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assert_is_ring_idx(ring, ring->next_to_use);
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assert_is_ring_idx(ring, ring->next_to_clean);
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return ring->next_to_use == ring->next_to_clean;
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}
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#define hnae_buf_size(_ring) ((_ring)->buf_size)
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#define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring)))
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#define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring))
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struct hnae_handle;
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/* allocate and dma map space for hnae desc */
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struct hnae_buf_ops {
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int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
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void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
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int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
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void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
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};
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struct hnae_queue {
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u8 __iomem *io_base;
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phys_addr_t phy_base;
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struct hnae_ae_dev *dev; /* the device who use this queue */
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struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp;
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struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp;
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struct hnae_handle *handle;
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};
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/*hnae loop mode*/
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enum hnae_loop {
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MAC_INTERNALLOOP_MAC = 0,
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MAC_INTERNALLOOP_SERDES,
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MAC_INTERNALLOOP_PHY,
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MAC_LOOP_PHY_NONE,
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MAC_LOOP_NONE,
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};
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/*hnae port type*/
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enum hnae_port_type {
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HNAE_PORT_SERVICE = 0,
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HNAE_PORT_DEBUG
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};
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/* mac media type */
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enum hnae_media_type {
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HNAE_MEDIA_TYPE_UNKNOWN = 0,
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HNAE_MEDIA_TYPE_FIBER,
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HNAE_MEDIA_TYPE_COPPER,
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HNAE_MEDIA_TYPE_BACKPLANE,
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};
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/* This struct defines the operation on the handle.
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*
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* get_handle(): (mandatory)
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* Get a handle from AE according to its name and options.
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* the AE driver should manage the space used by handle and its queues while
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* the HNAE framework will allocate desc and desc_cb for all rings in the
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* queues.
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* put_handle():
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* Release the handle.
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* start():
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* Enable the hardware, include all queues
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* stop():
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* Disable the hardware
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* set_opts(): (mandatory)
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* Set options to the AE
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* get_opts(): (mandatory)
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* Get options from the AE
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* get_status():
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* Get the carrier state of the back channel of the handle, 1 for ok, 0 for
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* non-ok
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* toggle_ring_irq(): (mandatory)
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* Set the ring irq to be enabled(0) or disable(1)
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* toggle_queue_status(): (mandatory)
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* Set the queue to be enabled(1) or disable(0), this will not change the
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* ring irq state
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* adjust_link()
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* adjust link status
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* set_loopback()
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* set loopback
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* get_ring_bdnum_limit()
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* get ring bd number limit
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* get_pauseparam()
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* get tx and rx of pause frame use
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* set_pauseparam()
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* set tx and rx of pause frame use
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* get_coalesce_usecs()
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* get usecs to delay a TX interrupt after a packet is sent
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* get_rx_max_coalesced_frames()
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* get Maximum number of packets to be sent before a TX interrupt.
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* set_coalesce_usecs()
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* set usecs to delay a TX interrupt after a packet is sent
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* set_coalesce_frames()
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* set Maximum number of packets to be sent before a TX interrupt.
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* get_ringnum()
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* get RX/TX ring number
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* get_max_ringnum()
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* get RX/TX ring maximum number
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* get_mac_addr()
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* get mac address
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* set_mac_addr()
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* set mac address
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* clr_mc_addr()
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* clear mcast tcam table
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* set_mc_addr()
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* set multicast mode
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* add_uc_addr()
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* add ucast address
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* rm_uc_addr()
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* remove ucast address
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* set_mtu()
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* set mtu
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* update_stats()
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* update Old network device statistics
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* get_ethtool_stats()
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* get ethtool network device statistics
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* get_strings()
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* get a set of strings that describe the requested objects
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* get_sset_count()
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* get number of strings that @get_strings will write
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* update_led_status()
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* update the led status
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* set_led_id()
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* set led id
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* get_regs()
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* get regs dump
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* get_regs_len()
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* get the len of the regs dump
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*/
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struct hnae_ae_ops {
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struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev,
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u32 port_id);
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void (*put_handle)(struct hnae_handle *handle);
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void (*init_queue)(struct hnae_queue *q);
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void (*fini_queue)(struct hnae_queue *q);
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int (*start)(struct hnae_handle *handle);
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void (*stop)(struct hnae_handle *handle);
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void (*reset)(struct hnae_handle *handle);
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int (*set_opts)(struct hnae_handle *handle, int type, void *opts);
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int (*get_opts)(struct hnae_handle *handle, int type, void **opts);
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int (*get_status)(struct hnae_handle *handle);
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int (*get_info)(struct hnae_handle *handle,
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u8 *auto_neg, u16 *speed, u8 *duplex);
|
|
void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val);
|
|
void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex);
|
|
bool (*need_adjust_link)(struct hnae_handle *handle,
|
|
int speed, int duplex);
|
|
int (*set_loopback)(struct hnae_handle *handle,
|
|
enum hnae_loop loop_mode, int en);
|
|
void (*get_ring_bdnum_limit)(struct hnae_queue *queue,
|
|
u32 *uplimit);
|
|
void (*get_pauseparam)(struct hnae_handle *handle,
|
|
u32 *auto_neg, u32 *rx_en, u32 *tx_en);
|
|
int (*set_pauseparam)(struct hnae_handle *handle,
|
|
u32 auto_neg, u32 rx_en, u32 tx_en);
|
|
void (*get_coalesce_usecs)(struct hnae_handle *handle,
|
|
u32 *tx_usecs, u32 *rx_usecs);
|
|
void (*get_max_coalesced_frames)(struct hnae_handle *handle,
|
|
u32 *tx_frames, u32 *rx_frames);
|
|
int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout);
|
|
int (*set_coalesce_frames)(struct hnae_handle *handle,
|
|
u32 tx_frames, u32 rx_frames);
|
|
void (*get_coalesce_range)(struct hnae_handle *handle,
|
|
u32 *tx_frames_low, u32 *rx_frames_low,
|
|
u32 *tx_frames_high, u32 *rx_frames_high,
|
|
u32 *tx_usecs_low, u32 *rx_usecs_low,
|
|
u32 *tx_usecs_high, u32 *rx_usecs_high);
|
|
void (*set_promisc_mode)(struct hnae_handle *handle, u32 en);
|
|
int (*get_mac_addr)(struct hnae_handle *handle, void **p);
|
|
int (*set_mac_addr)(struct hnae_handle *handle, const void *p);
|
|
int (*add_uc_addr)(struct hnae_handle *handle,
|
|
const unsigned char *addr);
|
|
int (*rm_uc_addr)(struct hnae_handle *handle,
|
|
const unsigned char *addr);
|
|
int (*clr_mc_addr)(struct hnae_handle *handle);
|
|
int (*set_mc_addr)(struct hnae_handle *handle, void *addr);
|
|
int (*set_mtu)(struct hnae_handle *handle, int new_mtu);
|
|
void (*set_tso_stats)(struct hnae_handle *handle, int enable);
|
|
void (*update_stats)(struct hnae_handle *handle,
|
|
struct net_device_stats *net_stats);
|
|
void (*get_stats)(struct hnae_handle *handle, u64 *data);
|
|
void (*get_strings)(struct hnae_handle *handle,
|
|
u32 stringset, u8 *data);
|
|
int (*get_sset_count)(struct hnae_handle *handle, int stringset);
|
|
void (*update_led_status)(struct hnae_handle *handle);
|
|
int (*set_led_id)(struct hnae_handle *handle,
|
|
enum hnae_led_state status);
|
|
void (*get_regs)(struct hnae_handle *handle, void *data);
|
|
int (*get_regs_len)(struct hnae_handle *handle);
|
|
u32 (*get_rss_key_size)(struct hnae_handle *handle);
|
|
u32 (*get_rss_indir_size)(struct hnae_handle *handle);
|
|
int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key,
|
|
u8 *hfunc);
|
|
int (*set_rss)(struct hnae_handle *handle, const u32 *indir,
|
|
const u8 *key, const u8 hfunc);
|
|
};
|
|
|
|
struct hnae_ae_dev {
|
|
struct device cls_dev; /* the class dev */
|
|
struct device *dev; /* the presented dev */
|
|
struct hnae_ae_ops *ops;
|
|
struct list_head node;
|
|
struct module *owner; /* the module who provides this dev */
|
|
int id;
|
|
char name[AE_NAME_SIZE];
|
|
struct list_head handle_list;
|
|
spinlock_t lock; /* lock to protect the handle_list */
|
|
};
|
|
|
|
struct hnae_handle {
|
|
struct device *owner_dev; /* the device which make use of this handle */
|
|
struct hnae_ae_dev *dev; /* the device who provides this handle */
|
|
struct phy_device *phy_dev;
|
|
phy_interface_t phy_if;
|
|
u32 if_support;
|
|
int q_num;
|
|
int vf_id;
|
|
unsigned long coal_last_jiffies;
|
|
u32 coal_param; /* self adapt coalesce param */
|
|
/* the ring index of last ring that set coal param */
|
|
u32 coal_ring_idx;
|
|
u32 eport_id;
|
|
u32 dport_id; /* v2 tx bd should fill the dport_id */
|
|
bool coal_adapt_en;
|
|
enum hnae_port_type port_type;
|
|
enum hnae_media_type media_type;
|
|
struct list_head node; /* list to hnae_ae_dev->handle_list */
|
|
struct hnae_buf_ops *bops; /* operation for the buffer */
|
|
struct hnae_queue *qs[]; /* flexible array of all queues */
|
|
};
|
|
|
|
#define ring_to_dev(ring) ((ring)->q->dev->dev)
|
|
|
|
struct hnae_handle *hnae_get_handle(struct device *owner_dev,
|
|
const struct fwnode_handle *fwnode,
|
|
u32 port_id,
|
|
struct hnae_buf_ops *bops);
|
|
|
|
void hnae_put_handle(struct hnae_handle *handle);
|
|
int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner);
|
|
void hnae_ae_unregister(struct hnae_ae_dev *dev);
|
|
|
|
int hnae_register_notifier(struct notifier_block *nb);
|
|
void hnae_unregister_notifier(struct notifier_block *nb);
|
|
int hnae_reinit_handle(struct hnae_handle *handle);
|
|
|
|
#define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \
|
|
(q)->tx_ring.io_base + RCB_REG_TAIL)
|
|
|
|
#ifndef assert
|
|
#define assert(cond)
|
|
#endif
|
|
|
|
static inline int hnae_reserve_buffer_map(struct hnae_ring *ring,
|
|
struct hnae_desc_cb *cb)
|
|
{
|
|
struct hnae_buf_ops *bops = ring->q->handle->bops;
|
|
int ret;
|
|
|
|
ret = bops->alloc_buffer(ring, cb);
|
|
if (ret)
|
|
goto out;
|
|
|
|
ret = bops->map_buffer(ring, cb);
|
|
if (ret)
|
|
goto out_with_buf;
|
|
|
|
return 0;
|
|
|
|
out_with_buf:
|
|
bops->free_buffer(ring, cb);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i)
|
|
{
|
|
int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]);
|
|
|
|
if (ret)
|
|
return ret;
|
|
|
|
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline void hnae_buffer_detach(struct hnae_ring *ring, int i)
|
|
{
|
|
ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]);
|
|
ring->desc[i].addr = 0;
|
|
}
|
|
|
|
static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i)
|
|
{
|
|
struct hnae_buf_ops *bops = ring->q->handle->bops;
|
|
struct hnae_desc_cb *cb = &ring->desc_cb[i];
|
|
|
|
if (!ring->desc_cb[i].dma)
|
|
return;
|
|
|
|
hnae_buffer_detach(ring, i);
|
|
bops->free_buffer(ring, cb);
|
|
}
|
|
|
|
/* detach a in-used buffer and replace with a reserved one */
|
|
static inline void hnae_replace_buffer(struct hnae_ring *ring, int i,
|
|
struct hnae_desc_cb *res_cb)
|
|
{
|
|
struct hnae_buf_ops *bops = ring->q->handle->bops;
|
|
|
|
bops->unmap_buffer(ring, &ring->desc_cb[i]);
|
|
ring->desc_cb[i] = *res_cb;
|
|
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
|
|
ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
|
|
}
|
|
|
|
static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i)
|
|
{
|
|
ring->desc_cb[i].reuse_flag = 0;
|
|
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
|
|
+ ring->desc_cb[i].page_offset);
|
|
ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
|
|
}
|
|
|
|
/* when reinit buffer size, we should reinit buffer description */
|
|
static inline void hnae_reinit_all_ring_desc(struct hnae_handle *h)
|
|
{
|
|
int i, j;
|
|
struct hnae_ring *ring;
|
|
|
|
for (i = 0; i < h->q_num; i++) {
|
|
ring = &h->qs[i]->rx_ring;
|
|
for (j = 0; j < ring->desc_num; j++)
|
|
ring->desc[j].addr = cpu_to_le64(ring->desc_cb[j].dma);
|
|
}
|
|
|
|
wmb(); /* commit all data before submit */
|
|
}
|
|
|
|
/* when reinit buffer size, we should reinit page offset */
|
|
static inline void hnae_reinit_all_ring_page_off(struct hnae_handle *h)
|
|
{
|
|
int i, j;
|
|
struct hnae_ring *ring;
|
|
|
|
for (i = 0; i < h->q_num; i++) {
|
|
ring = &h->qs[i]->rx_ring;
|
|
for (j = 0; j < ring->desc_num; j++) {
|
|
ring->desc_cb[j].page_offset = 0;
|
|
if (ring->desc[j].addr !=
|
|
cpu_to_le64(ring->desc_cb[j].dma))
|
|
ring->desc[j].addr =
|
|
cpu_to_le64(ring->desc_cb[j].dma);
|
|
}
|
|
}
|
|
|
|
wmb(); /* commit all data before submit */
|
|
}
|
|
|
|
#define hnae_set_field(origin, mask, shift, val) \
|
|
do { \
|
|
(origin) &= (~(mask)); \
|
|
(origin) |= ((val) << (shift)) & (mask); \
|
|
} while (0)
|
|
|
|
#define hnae_set_bit(origin, shift, val) \
|
|
hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
|
|
|
|
#define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
|
|
|
|
#define hnae_get_bit(origin, shift) \
|
|
hnae_get_field((origin), (0x1 << (shift)), (shift))
|
|
|
|
#endif
|