1197 lines
33 KiB
C
1197 lines
33 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*******************************************************************************
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STMMAC Ethtool support
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/interrupt.h>
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#include <linux/mii.h>
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#include <linux/phylink.h>
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#include <linux/net_tstamp.h>
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#include <asm/io.h>
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#include "stmmac.h"
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#include "dwmac_dma.h"
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#include "dwxgmac2.h"
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#define REG_SPACE_SIZE 0x1060
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#define GMAC4_REG_SPACE_SIZE 0x116C
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#define MAC100_ETHTOOL_NAME "st_mac100"
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#define GMAC_ETHTOOL_NAME "st_gmac"
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#define XGMAC_ETHTOOL_NAME "st_xgmac"
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/* Same as DMA_CHAN_BASE_ADDR defined in dwmac4_dma.h
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*
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* It is here because dwmac_dma.h and dwmac4_dam.h can not be included at the
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* same time due to the conflicting macro names.
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*/
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#define GMAC4_DMA_CHAN_BASE_ADDR 0x00001100
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#define ETHTOOL_DMA_OFFSET 55
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struct stmmac_stats {
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char stat_string[ETH_GSTRING_LEN];
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int sizeof_stat;
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int stat_offset;
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};
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#define STMMAC_STAT(m) \
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{ #m, sizeof_field(struct stmmac_extra_stats, m), \
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offsetof(struct stmmac_priv, xstats.m)}
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static const struct stmmac_stats stmmac_gstrings_stats[] = {
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/* Transmit errors */
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STMMAC_STAT(tx_underflow),
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STMMAC_STAT(tx_carrier),
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STMMAC_STAT(tx_losscarrier),
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STMMAC_STAT(vlan_tag),
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STMMAC_STAT(tx_deferred),
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STMMAC_STAT(tx_vlan),
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STMMAC_STAT(tx_jabber),
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STMMAC_STAT(tx_frame_flushed),
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STMMAC_STAT(tx_payload_error),
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STMMAC_STAT(tx_ip_header_error),
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/* Receive errors */
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STMMAC_STAT(rx_desc),
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STMMAC_STAT(sa_filter_fail),
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STMMAC_STAT(overflow_error),
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STMMAC_STAT(ipc_csum_error),
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STMMAC_STAT(rx_collision),
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STMMAC_STAT(rx_crc_errors),
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STMMAC_STAT(dribbling_bit),
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STMMAC_STAT(rx_length),
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STMMAC_STAT(rx_mii),
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STMMAC_STAT(rx_multicast),
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STMMAC_STAT(rx_gmac_overflow),
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STMMAC_STAT(rx_watchdog),
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STMMAC_STAT(da_rx_filter_fail),
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STMMAC_STAT(sa_rx_filter_fail),
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STMMAC_STAT(rx_missed_cntr),
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STMMAC_STAT(rx_overflow_cntr),
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STMMAC_STAT(rx_vlan),
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STMMAC_STAT(rx_split_hdr_pkt_n),
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/* Tx/Rx IRQ error info */
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STMMAC_STAT(tx_undeflow_irq),
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STMMAC_STAT(tx_process_stopped_irq),
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STMMAC_STAT(tx_jabber_irq),
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STMMAC_STAT(rx_overflow_irq),
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STMMAC_STAT(rx_buf_unav_irq),
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STMMAC_STAT(rx_process_stopped_irq),
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STMMAC_STAT(rx_watchdog_irq),
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STMMAC_STAT(tx_early_irq),
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STMMAC_STAT(fatal_bus_error_irq),
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/* Tx/Rx IRQ Events */
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STMMAC_STAT(rx_early_irq),
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STMMAC_STAT(threshold),
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STMMAC_STAT(tx_pkt_n),
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STMMAC_STAT(rx_pkt_n),
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STMMAC_STAT(normal_irq_n),
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STMMAC_STAT(rx_normal_irq_n),
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STMMAC_STAT(napi_poll),
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STMMAC_STAT(tx_normal_irq_n),
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STMMAC_STAT(tx_clean),
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STMMAC_STAT(tx_set_ic_bit),
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STMMAC_STAT(irq_receive_pmt_irq_n),
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/* MMC info */
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STMMAC_STAT(mmc_tx_irq_n),
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STMMAC_STAT(mmc_rx_irq_n),
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STMMAC_STAT(mmc_rx_csum_offload_irq_n),
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/* EEE */
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STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
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STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
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STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
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STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
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STMMAC_STAT(phy_eee_wakeup_error_n),
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/* Extended RDES status */
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STMMAC_STAT(ip_hdr_err),
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STMMAC_STAT(ip_payload_err),
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STMMAC_STAT(ip_csum_bypassed),
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STMMAC_STAT(ipv4_pkt_rcvd),
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STMMAC_STAT(ipv6_pkt_rcvd),
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STMMAC_STAT(no_ptp_rx_msg_type_ext),
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STMMAC_STAT(ptp_rx_msg_type_sync),
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STMMAC_STAT(ptp_rx_msg_type_follow_up),
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STMMAC_STAT(ptp_rx_msg_type_delay_req),
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STMMAC_STAT(ptp_rx_msg_type_delay_resp),
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STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
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STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
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STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
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STMMAC_STAT(ptp_rx_msg_type_announce),
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STMMAC_STAT(ptp_rx_msg_type_management),
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STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
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STMMAC_STAT(ptp_frame_type),
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STMMAC_STAT(ptp_ver),
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STMMAC_STAT(timestamp_dropped),
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STMMAC_STAT(av_pkt_rcvd),
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STMMAC_STAT(av_tagged_pkt_rcvd),
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STMMAC_STAT(vlan_tag_priority_val),
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STMMAC_STAT(l3_filter_match),
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STMMAC_STAT(l4_filter_match),
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STMMAC_STAT(l3_l4_filter_no_match),
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/* PCS */
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STMMAC_STAT(irq_pcs_ane_n),
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STMMAC_STAT(irq_pcs_link_n),
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STMMAC_STAT(irq_rgmii_n),
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/* DEBUG */
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STMMAC_STAT(mtl_tx_status_fifo_full),
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STMMAC_STAT(mtl_tx_fifo_not_empty),
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STMMAC_STAT(mmtl_fifo_ctrl),
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STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
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STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
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STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
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STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
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STMMAC_STAT(mac_tx_in_pause),
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STMMAC_STAT(mac_tx_frame_ctrl_xfer),
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STMMAC_STAT(mac_tx_frame_ctrl_idle),
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STMMAC_STAT(mac_tx_frame_ctrl_wait),
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STMMAC_STAT(mac_tx_frame_ctrl_pause),
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STMMAC_STAT(mac_gmii_tx_proto_engine),
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STMMAC_STAT(mtl_rx_fifo_fill_level_full),
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STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
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STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
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STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
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STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
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STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
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STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
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STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
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STMMAC_STAT(mtl_rx_fifo_ctrl_active),
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STMMAC_STAT(mac_rx_frame_ctrl_fifo),
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STMMAC_STAT(mac_gmii_rx_proto_engine),
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/* TSO */
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STMMAC_STAT(tx_tso_frames),
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STMMAC_STAT(tx_tso_nfrags),
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/* EST */
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STMMAC_STAT(mtl_est_cgce),
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STMMAC_STAT(mtl_est_hlbs),
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STMMAC_STAT(mtl_est_hlbf),
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STMMAC_STAT(mtl_est_btre),
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STMMAC_STAT(mtl_est_btrlm),
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};
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#define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
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/* HW MAC Management counters (if supported) */
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#define STMMAC_MMC_STAT(m) \
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{ #m, sizeof_field(struct stmmac_counters, m), \
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offsetof(struct stmmac_priv, mmc.m)}
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static const struct stmmac_stats stmmac_mmc[] = {
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STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
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STMMAC_MMC_STAT(mmc_tx_framecount_gb),
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STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
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STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
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STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
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STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
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STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
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STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
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STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
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STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
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STMMAC_MMC_STAT(mmc_tx_unicast_gb),
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STMMAC_MMC_STAT(mmc_tx_multicast_gb),
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STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
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STMMAC_MMC_STAT(mmc_tx_underflow_error),
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STMMAC_MMC_STAT(mmc_tx_singlecol_g),
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STMMAC_MMC_STAT(mmc_tx_multicol_g),
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STMMAC_MMC_STAT(mmc_tx_deferred),
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STMMAC_MMC_STAT(mmc_tx_latecol),
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STMMAC_MMC_STAT(mmc_tx_exesscol),
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STMMAC_MMC_STAT(mmc_tx_carrier_error),
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STMMAC_MMC_STAT(mmc_tx_octetcount_g),
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STMMAC_MMC_STAT(mmc_tx_framecount_g),
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STMMAC_MMC_STAT(mmc_tx_excessdef),
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STMMAC_MMC_STAT(mmc_tx_pause_frame),
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STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
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STMMAC_MMC_STAT(mmc_rx_framecount_gb),
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STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
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STMMAC_MMC_STAT(mmc_rx_octetcount_g),
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STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
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STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
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STMMAC_MMC_STAT(mmc_rx_crc_error),
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STMMAC_MMC_STAT(mmc_rx_align_error),
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STMMAC_MMC_STAT(mmc_rx_run_error),
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STMMAC_MMC_STAT(mmc_rx_jabber_error),
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STMMAC_MMC_STAT(mmc_rx_undersize_g),
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STMMAC_MMC_STAT(mmc_rx_oversize_g),
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STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
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STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
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STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
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STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
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STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
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STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
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STMMAC_MMC_STAT(mmc_rx_unicast_g),
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STMMAC_MMC_STAT(mmc_rx_length_error),
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STMMAC_MMC_STAT(mmc_rx_autofrangetype),
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STMMAC_MMC_STAT(mmc_rx_pause_frames),
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STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
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STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
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STMMAC_MMC_STAT(mmc_rx_watchdog_error),
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STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
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STMMAC_MMC_STAT(mmc_rx_ipc_intr),
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STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
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STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
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STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
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STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
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STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
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STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
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STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
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STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
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STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
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STMMAC_MMC_STAT(mmc_rx_udp_gd),
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STMMAC_MMC_STAT(mmc_rx_udp_err),
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STMMAC_MMC_STAT(mmc_rx_tcp_gd),
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STMMAC_MMC_STAT(mmc_rx_tcp_err),
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STMMAC_MMC_STAT(mmc_rx_icmp_gd),
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STMMAC_MMC_STAT(mmc_rx_icmp_err),
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STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
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STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
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STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
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STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
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STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
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STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
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STMMAC_MMC_STAT(mmc_tx_fpe_fragment_cntr),
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STMMAC_MMC_STAT(mmc_tx_hold_req_cntr),
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STMMAC_MMC_STAT(mmc_rx_packet_assembly_err_cntr),
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STMMAC_MMC_STAT(mmc_rx_packet_smd_err_cntr),
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STMMAC_MMC_STAT(mmc_rx_packet_assembly_ok_cntr),
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STMMAC_MMC_STAT(mmc_rx_fpe_fragment_cntr),
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};
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#define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
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static const char stmmac_qstats_tx_string[][ETH_GSTRING_LEN] = {
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"tx_pkt_n",
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"tx_irq_n",
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#define STMMAC_TXQ_STATS ARRAY_SIZE(stmmac_qstats_tx_string)
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};
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static const char stmmac_qstats_rx_string[][ETH_GSTRING_LEN] = {
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"rx_pkt_n",
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"rx_irq_n",
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#define STMMAC_RXQ_STATS ARRAY_SIZE(stmmac_qstats_rx_string)
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};
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static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
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struct ethtool_drvinfo *info)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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if (priv->plat->has_gmac || priv->plat->has_gmac4)
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strscpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
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else if (priv->plat->has_xgmac)
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strscpy(info->driver, XGMAC_ETHTOOL_NAME, sizeof(info->driver));
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else
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strscpy(info->driver, MAC100_ETHTOOL_NAME,
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sizeof(info->driver));
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if (priv->plat->pdev) {
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strscpy(info->bus_info, pci_name(priv->plat->pdev),
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sizeof(info->bus_info));
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}
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}
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static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
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struct ethtool_link_ksettings *cmd)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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if (priv->hw->pcs & STMMAC_PCS_RGMII ||
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priv->hw->pcs & STMMAC_PCS_SGMII) {
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struct rgmii_adv adv;
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u32 supported, advertising, lp_advertising;
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if (!priv->xstats.pcs_link) {
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cmd->base.speed = SPEED_UNKNOWN;
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cmd->base.duplex = DUPLEX_UNKNOWN;
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return 0;
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}
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cmd->base.duplex = priv->xstats.pcs_duplex;
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cmd->base.speed = priv->xstats.pcs_speed;
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/* Get and convert ADV/LP_ADV from the HW AN registers */
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if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
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return -EOPNOTSUPP; /* should never happen indeed */
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/* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
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ethtool_convert_link_mode_to_legacy_u32(
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&supported, cmd->link_modes.supported);
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ethtool_convert_link_mode_to_legacy_u32(
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&advertising, cmd->link_modes.advertising);
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ethtool_convert_link_mode_to_legacy_u32(
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&lp_advertising, cmd->link_modes.lp_advertising);
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if (adv.pause & STMMAC_PCS_PAUSE)
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advertising |= ADVERTISED_Pause;
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if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
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advertising |= ADVERTISED_Asym_Pause;
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if (adv.lp_pause & STMMAC_PCS_PAUSE)
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lp_advertising |= ADVERTISED_Pause;
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if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
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lp_advertising |= ADVERTISED_Asym_Pause;
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/* Reg49[3] always set because ANE is always supported */
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cmd->base.autoneg = ADVERTISED_Autoneg;
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supported |= SUPPORTED_Autoneg;
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advertising |= ADVERTISED_Autoneg;
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lp_advertising |= ADVERTISED_Autoneg;
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if (adv.duplex) {
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supported |= (SUPPORTED_1000baseT_Full |
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SUPPORTED_100baseT_Full |
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SUPPORTED_10baseT_Full);
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advertising |= (ADVERTISED_1000baseT_Full |
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ADVERTISED_100baseT_Full |
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ADVERTISED_10baseT_Full);
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} else {
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supported |= (SUPPORTED_1000baseT_Half |
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SUPPORTED_100baseT_Half |
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SUPPORTED_10baseT_Half);
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advertising |= (ADVERTISED_1000baseT_Half |
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ADVERTISED_100baseT_Half |
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ADVERTISED_10baseT_Half);
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}
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if (adv.lp_duplex)
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lp_advertising |= (ADVERTISED_1000baseT_Full |
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ADVERTISED_100baseT_Full |
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ADVERTISED_10baseT_Full);
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else
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lp_advertising |= (ADVERTISED_1000baseT_Half |
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ADVERTISED_100baseT_Half |
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ADVERTISED_10baseT_Half);
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cmd->base.port = PORT_OTHER;
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ethtool_convert_legacy_u32_to_link_mode(
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cmd->link_modes.supported, supported);
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ethtool_convert_legacy_u32_to_link_mode(
|
|
cmd->link_modes.advertising, advertising);
|
|
ethtool_convert_legacy_u32_to_link_mode(
|
|
cmd->link_modes.lp_advertising, lp_advertising);
|
|
|
|
return 0;
|
|
}
|
|
|
|
return phylink_ethtool_ksettings_get(priv->phylink, cmd);
|
|
}
|
|
|
|
static int
|
|
stmmac_ethtool_set_link_ksettings(struct net_device *dev,
|
|
const struct ethtool_link_ksettings *cmd)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (priv->hw->pcs & STMMAC_PCS_RGMII ||
|
|
priv->hw->pcs & STMMAC_PCS_SGMII) {
|
|
u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
|
|
|
|
/* Only support ANE */
|
|
if (cmd->base.autoneg != AUTONEG_ENABLE)
|
|
return -EINVAL;
|
|
|
|
mask &= (ADVERTISED_1000baseT_Half |
|
|
ADVERTISED_1000baseT_Full |
|
|
ADVERTISED_100baseT_Half |
|
|
ADVERTISED_100baseT_Full |
|
|
ADVERTISED_10baseT_Half |
|
|
ADVERTISED_10baseT_Full);
|
|
|
|
mutex_lock(&priv->lock);
|
|
stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
|
|
mutex_unlock(&priv->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
return phylink_ethtool_ksettings_set(priv->phylink, cmd);
|
|
}
|
|
|
|
static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
return priv->msg_enable;
|
|
}
|
|
|
|
static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
priv->msg_enable = level;
|
|
|
|
}
|
|
|
|
static int stmmac_check_if_running(struct net_device *dev)
|
|
{
|
|
if (!netif_running(dev))
|
|
return -EBUSY;
|
|
return 0;
|
|
}
|
|
|
|
static int stmmac_ethtool_get_regs_len(struct net_device *dev)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (priv->plat->has_xgmac)
|
|
return XGMAC_REGSIZE * 4;
|
|
else if (priv->plat->has_gmac4)
|
|
return GMAC4_REG_SPACE_SIZE;
|
|
return REG_SPACE_SIZE;
|
|
}
|
|
|
|
static void stmmac_ethtool_gregs(struct net_device *dev,
|
|
struct ethtool_regs *regs, void *space)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
u32 *reg_space = (u32 *) space;
|
|
|
|
stmmac_dump_mac_regs(priv, priv->hw, reg_space);
|
|
stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
|
|
|
|
/* Copy DMA registers to where ethtool expects them */
|
|
if (priv->plat->has_gmac4) {
|
|
/* GMAC4 dumps its DMA registers at its DMA_CHAN_BASE_ADDR */
|
|
memcpy(®_space[ETHTOOL_DMA_OFFSET],
|
|
®_space[GMAC4_DMA_CHAN_BASE_ADDR / 4],
|
|
NUM_DWMAC4_DMA_REGS * 4);
|
|
} else if (!priv->plat->has_xgmac) {
|
|
memcpy(®_space[ETHTOOL_DMA_OFFSET],
|
|
®_space[DMA_BUS_MODE / 4],
|
|
NUM_DWMAC1000_DMA_REGS * 4);
|
|
}
|
|
}
|
|
|
|
static int stmmac_nway_reset(struct net_device *dev)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
return phylink_ethtool_nway_reset(priv->phylink);
|
|
}
|
|
|
|
static void stmmac_get_ringparam(struct net_device *netdev,
|
|
struct ethtool_ringparam *ring,
|
|
struct kernel_ethtool_ringparam *kernel_ring,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(netdev);
|
|
|
|
ring->rx_max_pending = DMA_MAX_RX_SIZE;
|
|
ring->tx_max_pending = DMA_MAX_TX_SIZE;
|
|
ring->rx_pending = priv->dma_conf.dma_rx_size;
|
|
ring->tx_pending = priv->dma_conf.dma_tx_size;
|
|
}
|
|
|
|
static int stmmac_set_ringparam(struct net_device *netdev,
|
|
struct ethtool_ringparam *ring,
|
|
struct kernel_ethtool_ringparam *kernel_ring,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
if (ring->rx_mini_pending || ring->rx_jumbo_pending ||
|
|
ring->rx_pending < DMA_MIN_RX_SIZE ||
|
|
ring->rx_pending > DMA_MAX_RX_SIZE ||
|
|
!is_power_of_2(ring->rx_pending) ||
|
|
ring->tx_pending < DMA_MIN_TX_SIZE ||
|
|
ring->tx_pending > DMA_MAX_TX_SIZE ||
|
|
!is_power_of_2(ring->tx_pending))
|
|
return -EINVAL;
|
|
|
|
return stmmac_reinit_ringparam(netdev, ring->rx_pending,
|
|
ring->tx_pending);
|
|
}
|
|
|
|
static void
|
|
stmmac_get_pauseparam(struct net_device *netdev,
|
|
struct ethtool_pauseparam *pause)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(netdev);
|
|
struct rgmii_adv adv_lp;
|
|
|
|
if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
|
|
pause->autoneg = 1;
|
|
if (!adv_lp.pause)
|
|
return;
|
|
} else {
|
|
phylink_ethtool_get_pauseparam(priv->phylink, pause);
|
|
}
|
|
}
|
|
|
|
static int
|
|
stmmac_set_pauseparam(struct net_device *netdev,
|
|
struct ethtool_pauseparam *pause)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(netdev);
|
|
struct rgmii_adv adv_lp;
|
|
|
|
if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
|
|
pause->autoneg = 1;
|
|
if (!adv_lp.pause)
|
|
return -EOPNOTSUPP;
|
|
return 0;
|
|
} else {
|
|
return phylink_ethtool_set_pauseparam(priv->phylink, pause);
|
|
}
|
|
}
|
|
|
|
static void stmmac_get_per_qstats(struct stmmac_priv *priv, u64 *data)
|
|
{
|
|
u32 tx_cnt = priv->plat->tx_queues_to_use;
|
|
u32 rx_cnt = priv->plat->rx_queues_to_use;
|
|
int q, stat;
|
|
char *p;
|
|
|
|
for (q = 0; q < tx_cnt; q++) {
|
|
p = (char *)priv + offsetof(struct stmmac_priv,
|
|
xstats.txq_stats[q].tx_pkt_n);
|
|
for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
|
|
*data++ = (*(unsigned long *)p);
|
|
p += sizeof(unsigned long);
|
|
}
|
|
}
|
|
for (q = 0; q < rx_cnt; q++) {
|
|
p = (char *)priv + offsetof(struct stmmac_priv,
|
|
xstats.rxq_stats[q].rx_pkt_n);
|
|
for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
|
|
*data++ = (*(unsigned long *)p);
|
|
p += sizeof(unsigned long);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void stmmac_get_ethtool_stats(struct net_device *dev,
|
|
struct ethtool_stats *dummy, u64 *data)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
u32 rx_queues_count = priv->plat->rx_queues_to_use;
|
|
u32 tx_queues_count = priv->plat->tx_queues_to_use;
|
|
unsigned long count;
|
|
int i, j = 0, ret;
|
|
|
|
if (priv->dma_cap.asp) {
|
|
for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
|
|
if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
|
|
&count, NULL))
|
|
data[j++] = count;
|
|
}
|
|
}
|
|
|
|
/* Update the DMA HW counters for dwmac10/100 */
|
|
ret = stmmac_dma_diagnostic_fr(priv, &dev->stats, (void *) &priv->xstats,
|
|
priv->ioaddr);
|
|
if (ret) {
|
|
/* If supported, for new GMAC chips expose the MMC counters */
|
|
if (priv->dma_cap.rmon) {
|
|
stmmac_mmc_read(priv, priv->mmcaddr, &priv->mmc);
|
|
|
|
for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
|
|
char *p;
|
|
p = (char *)priv + stmmac_mmc[i].stat_offset;
|
|
|
|
data[j++] = (stmmac_mmc[i].sizeof_stat ==
|
|
sizeof(u64)) ? (*(u64 *)p) :
|
|
(*(u32 *)p);
|
|
}
|
|
}
|
|
if (priv->eee_enabled) {
|
|
int val = phylink_get_eee_err(priv->phylink);
|
|
if (val)
|
|
priv->xstats.phy_eee_wakeup_error_n = val;
|
|
}
|
|
|
|
if (priv->synopsys_id >= DWMAC_CORE_3_50)
|
|
stmmac_mac_debug(priv, priv->ioaddr,
|
|
(void *)&priv->xstats,
|
|
rx_queues_count, tx_queues_count);
|
|
}
|
|
for (i = 0; i < STMMAC_STATS_LEN; i++) {
|
|
char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
|
|
data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
|
|
sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
|
|
}
|
|
stmmac_get_per_qstats(priv, &data[j]);
|
|
}
|
|
|
|
static int stmmac_get_sset_count(struct net_device *netdev, int sset)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(netdev);
|
|
u32 tx_cnt = priv->plat->tx_queues_to_use;
|
|
u32 rx_cnt = priv->plat->rx_queues_to_use;
|
|
int i, len, safety_len = 0;
|
|
|
|
switch (sset) {
|
|
case ETH_SS_STATS:
|
|
len = STMMAC_STATS_LEN +
|
|
STMMAC_TXQ_STATS * tx_cnt +
|
|
STMMAC_RXQ_STATS * rx_cnt;
|
|
|
|
if (priv->dma_cap.rmon)
|
|
len += STMMAC_MMC_STATS_LEN;
|
|
if (priv->dma_cap.asp) {
|
|
for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
|
|
if (!stmmac_safety_feat_dump(priv,
|
|
&priv->sstats, i,
|
|
NULL, NULL))
|
|
safety_len++;
|
|
}
|
|
|
|
len += safety_len;
|
|
}
|
|
|
|
return len;
|
|
case ETH_SS_TEST:
|
|
return stmmac_selftest_get_count(priv);
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
}
|
|
|
|
static void stmmac_get_qstats_string(struct stmmac_priv *priv, u8 *data)
|
|
{
|
|
u32 tx_cnt = priv->plat->tx_queues_to_use;
|
|
u32 rx_cnt = priv->plat->rx_queues_to_use;
|
|
int q, stat;
|
|
|
|
for (q = 0; q < tx_cnt; q++) {
|
|
for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
|
|
snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
|
|
stmmac_qstats_tx_string[stat]);
|
|
data += ETH_GSTRING_LEN;
|
|
}
|
|
}
|
|
for (q = 0; q < rx_cnt; q++) {
|
|
for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
|
|
snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
|
|
stmmac_qstats_rx_string[stat]);
|
|
data += ETH_GSTRING_LEN;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
|
|
{
|
|
int i;
|
|
u8 *p = data;
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
switch (stringset) {
|
|
case ETH_SS_STATS:
|
|
if (priv->dma_cap.asp) {
|
|
for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
|
|
const char *desc;
|
|
if (!stmmac_safety_feat_dump(priv,
|
|
&priv->sstats, i,
|
|
NULL, &desc)) {
|
|
memcpy(p, desc, ETH_GSTRING_LEN);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
}
|
|
}
|
|
if (priv->dma_cap.rmon)
|
|
for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
|
|
memcpy(p, stmmac_mmc[i].stat_string,
|
|
ETH_GSTRING_LEN);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
for (i = 0; i < STMMAC_STATS_LEN; i++) {
|
|
memcpy(p, stmmac_gstrings_stats[i].stat_string,
|
|
ETH_GSTRING_LEN);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
stmmac_get_qstats_string(priv, p);
|
|
break;
|
|
case ETH_SS_TEST:
|
|
stmmac_selftest_get_strings(priv, p);
|
|
break;
|
|
default:
|
|
WARN_ON(1);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Currently only support WOL through Magic packet. */
|
|
static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (!priv->plat->pmt)
|
|
return phylink_ethtool_get_wol(priv->phylink, wol);
|
|
|
|
mutex_lock(&priv->lock);
|
|
if (device_can_wakeup(priv->device)) {
|
|
wol->supported = WAKE_MAGIC | WAKE_UCAST;
|
|
if (priv->hw_cap_support && !priv->dma_cap.pmt_magic_frame)
|
|
wol->supported &= ~WAKE_MAGIC;
|
|
wol->wolopts = priv->wolopts;
|
|
}
|
|
mutex_unlock(&priv->lock);
|
|
}
|
|
|
|
static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
u32 support = WAKE_MAGIC | WAKE_UCAST;
|
|
|
|
if (!device_can_wakeup(priv->device))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (!priv->plat->pmt) {
|
|
int ret = phylink_ethtool_set_wol(priv->phylink, wol);
|
|
|
|
if (!ret)
|
|
device_set_wakeup_enable(priv->device, !!wol->wolopts);
|
|
return ret;
|
|
}
|
|
|
|
/* By default almost all GMAC devices support the WoL via
|
|
* magic frame but we can disable it if the HW capability
|
|
* register shows no support for pmt_magic_frame. */
|
|
if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
|
|
wol->wolopts &= ~WAKE_MAGIC;
|
|
|
|
if (wol->wolopts & ~support)
|
|
return -EINVAL;
|
|
|
|
if (wol->wolopts) {
|
|
pr_info("stmmac: wakeup enable\n");
|
|
device_set_wakeup_enable(priv->device, 1);
|
|
enable_irq_wake(priv->wol_irq);
|
|
} else {
|
|
device_set_wakeup_enable(priv->device, 0);
|
|
disable_irq_wake(priv->wol_irq);
|
|
}
|
|
|
|
mutex_lock(&priv->lock);
|
|
priv->wolopts = wol->wolopts;
|
|
mutex_unlock(&priv->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int stmmac_ethtool_op_get_eee(struct net_device *dev,
|
|
struct ethtool_eee *edata)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (!priv->dma_cap.eee)
|
|
return -EOPNOTSUPP;
|
|
|
|
edata->eee_enabled = priv->eee_enabled;
|
|
edata->eee_active = priv->eee_active;
|
|
edata->tx_lpi_timer = priv->tx_lpi_timer;
|
|
edata->tx_lpi_enabled = priv->tx_lpi_enabled;
|
|
|
|
return phylink_ethtool_get_eee(priv->phylink, edata);
|
|
}
|
|
|
|
static int stmmac_ethtool_op_set_eee(struct net_device *dev,
|
|
struct ethtool_eee *edata)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
int ret;
|
|
|
|
if (!priv->dma_cap.eee)
|
|
return -EOPNOTSUPP;
|
|
|
|
if (priv->tx_lpi_enabled != edata->tx_lpi_enabled)
|
|
netdev_warn(priv->dev,
|
|
"Setting EEE tx-lpi is not supported\n");
|
|
|
|
if (!edata->eee_enabled)
|
|
stmmac_disable_eee_mode(priv);
|
|
|
|
ret = phylink_ethtool_set_eee(priv->phylink, edata);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (edata->eee_enabled &&
|
|
priv->tx_lpi_timer != edata->tx_lpi_timer) {
|
|
priv->tx_lpi_timer = edata->tx_lpi_timer;
|
|
stmmac_eee_init(priv);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
|
|
{
|
|
unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
|
|
|
|
if (!clk) {
|
|
clk = priv->plat->clk_ref_rate;
|
|
if (!clk)
|
|
return 0;
|
|
}
|
|
|
|
return (usec * (clk / 1000000)) / 256;
|
|
}
|
|
|
|
static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
|
|
{
|
|
unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
|
|
|
|
if (!clk) {
|
|
clk = priv->plat->clk_ref_rate;
|
|
if (!clk)
|
|
return 0;
|
|
}
|
|
|
|
return (riwt * 256) / (clk / 1000000);
|
|
}
|
|
|
|
static int __stmmac_get_coalesce(struct net_device *dev,
|
|
struct ethtool_coalesce *ec,
|
|
int queue)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
u32 max_cnt;
|
|
u32 rx_cnt;
|
|
u32 tx_cnt;
|
|
|
|
rx_cnt = priv->plat->rx_queues_to_use;
|
|
tx_cnt = priv->plat->tx_queues_to_use;
|
|
max_cnt = max(rx_cnt, tx_cnt);
|
|
|
|
if (queue < 0)
|
|
queue = 0;
|
|
else if (queue >= max_cnt)
|
|
return -EINVAL;
|
|
|
|
if (queue < tx_cnt) {
|
|
ec->tx_coalesce_usecs = priv->tx_coal_timer[queue];
|
|
ec->tx_max_coalesced_frames = priv->tx_coal_frames[queue];
|
|
} else {
|
|
ec->tx_coalesce_usecs = 0;
|
|
ec->tx_max_coalesced_frames = 0;
|
|
}
|
|
|
|
if (priv->use_riwt && queue < rx_cnt) {
|
|
ec->rx_max_coalesced_frames = priv->rx_coal_frames[queue];
|
|
ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt[queue],
|
|
priv);
|
|
} else {
|
|
ec->rx_max_coalesced_frames = 0;
|
|
ec->rx_coalesce_usecs = 0;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int stmmac_get_coalesce(struct net_device *dev,
|
|
struct ethtool_coalesce *ec,
|
|
struct kernel_ethtool_coalesce *kernel_coal,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
return __stmmac_get_coalesce(dev, ec, -1);
|
|
}
|
|
|
|
static int stmmac_get_per_queue_coalesce(struct net_device *dev, u32 queue,
|
|
struct ethtool_coalesce *ec)
|
|
{
|
|
return __stmmac_get_coalesce(dev, ec, queue);
|
|
}
|
|
|
|
static int __stmmac_set_coalesce(struct net_device *dev,
|
|
struct ethtool_coalesce *ec,
|
|
int queue)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
bool all_queues = false;
|
|
unsigned int rx_riwt;
|
|
u32 max_cnt;
|
|
u32 rx_cnt;
|
|
u32 tx_cnt;
|
|
|
|
rx_cnt = priv->plat->rx_queues_to_use;
|
|
tx_cnt = priv->plat->tx_queues_to_use;
|
|
max_cnt = max(rx_cnt, tx_cnt);
|
|
|
|
if (queue < 0)
|
|
all_queues = true;
|
|
else if (queue >= max_cnt)
|
|
return -EINVAL;
|
|
|
|
if (priv->use_riwt && (ec->rx_coalesce_usecs > 0)) {
|
|
rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
|
|
|
|
if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
|
|
return -EINVAL;
|
|
|
|
if (all_queues) {
|
|
int i;
|
|
|
|
for (i = 0; i < rx_cnt; i++) {
|
|
priv->rx_riwt[i] = rx_riwt;
|
|
stmmac_rx_watchdog(priv, priv->ioaddr,
|
|
rx_riwt, i);
|
|
priv->rx_coal_frames[i] =
|
|
ec->rx_max_coalesced_frames;
|
|
}
|
|
} else if (queue < rx_cnt) {
|
|
priv->rx_riwt[queue] = rx_riwt;
|
|
stmmac_rx_watchdog(priv, priv->ioaddr,
|
|
rx_riwt, queue);
|
|
priv->rx_coal_frames[queue] =
|
|
ec->rx_max_coalesced_frames;
|
|
}
|
|
}
|
|
|
|
if ((ec->tx_coalesce_usecs == 0) &&
|
|
(ec->tx_max_coalesced_frames == 0))
|
|
return -EINVAL;
|
|
|
|
if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
|
|
(ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
|
|
return -EINVAL;
|
|
|
|
if (all_queues) {
|
|
int i;
|
|
|
|
for (i = 0; i < tx_cnt; i++) {
|
|
priv->tx_coal_frames[i] =
|
|
ec->tx_max_coalesced_frames;
|
|
priv->tx_coal_timer[i] =
|
|
ec->tx_coalesce_usecs;
|
|
}
|
|
} else if (queue < tx_cnt) {
|
|
priv->tx_coal_frames[queue] =
|
|
ec->tx_max_coalesced_frames;
|
|
priv->tx_coal_timer[queue] =
|
|
ec->tx_coalesce_usecs;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int stmmac_set_coalesce(struct net_device *dev,
|
|
struct ethtool_coalesce *ec,
|
|
struct kernel_ethtool_coalesce *kernel_coal,
|
|
struct netlink_ext_ack *extack)
|
|
{
|
|
return __stmmac_set_coalesce(dev, ec, -1);
|
|
}
|
|
|
|
static int stmmac_set_per_queue_coalesce(struct net_device *dev, u32 queue,
|
|
struct ethtool_coalesce *ec)
|
|
{
|
|
return __stmmac_set_coalesce(dev, ec, queue);
|
|
}
|
|
|
|
static int stmmac_get_rxnfc(struct net_device *dev,
|
|
struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
switch (rxnfc->cmd) {
|
|
case ETHTOOL_GRXRINGS:
|
|
rxnfc->data = priv->plat->rx_queues_to_use;
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
return sizeof(priv->rss.key);
|
|
}
|
|
|
|
static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
return ARRAY_SIZE(priv->rss.table);
|
|
}
|
|
|
|
static int stmmac_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
|
|
u8 *hfunc)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
int i;
|
|
|
|
if (indir) {
|
|
for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
|
|
indir[i] = priv->rss.table[i];
|
|
}
|
|
|
|
if (key)
|
|
memcpy(key, priv->rss.key, sizeof(priv->rss.key));
|
|
if (hfunc)
|
|
*hfunc = ETH_RSS_HASH_TOP;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int stmmac_set_rxfh(struct net_device *dev, const u32 *indir,
|
|
const u8 *key, const u8 hfunc)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
int i;
|
|
|
|
if ((hfunc != ETH_RSS_HASH_NO_CHANGE) && (hfunc != ETH_RSS_HASH_TOP))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (indir) {
|
|
for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
|
|
priv->rss.table[i] = indir[i];
|
|
}
|
|
|
|
if (key)
|
|
memcpy(priv->rss.key, key, sizeof(priv->rss.key));
|
|
|
|
return stmmac_rss_configure(priv, priv->hw, &priv->rss,
|
|
priv->plat->rx_queues_to_use);
|
|
}
|
|
|
|
static void stmmac_get_channels(struct net_device *dev,
|
|
struct ethtool_channels *chan)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
chan->rx_count = priv->plat->rx_queues_to_use;
|
|
chan->tx_count = priv->plat->tx_queues_to_use;
|
|
chan->max_rx = priv->dma_cap.number_rx_queues;
|
|
chan->max_tx = priv->dma_cap.number_tx_queues;
|
|
}
|
|
|
|
static int stmmac_set_channels(struct net_device *dev,
|
|
struct ethtool_channels *chan)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (chan->rx_count > priv->dma_cap.number_rx_queues ||
|
|
chan->tx_count > priv->dma_cap.number_tx_queues ||
|
|
!chan->rx_count || !chan->tx_count)
|
|
return -EINVAL;
|
|
|
|
return stmmac_reinit_queues(dev, chan->rx_count, chan->tx_count);
|
|
}
|
|
|
|
static int stmmac_get_ts_info(struct net_device *dev,
|
|
struct ethtool_ts_info *info)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
|
if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
|
|
|
|
info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
|
|
SOF_TIMESTAMPING_TX_HARDWARE |
|
|
SOF_TIMESTAMPING_RX_SOFTWARE |
|
|
SOF_TIMESTAMPING_RX_HARDWARE |
|
|
SOF_TIMESTAMPING_SOFTWARE |
|
|
SOF_TIMESTAMPING_RAW_HARDWARE;
|
|
|
|
if (priv->ptp_clock)
|
|
info->phc_index = ptp_clock_index(priv->ptp_clock);
|
|
|
|
info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
|
|
|
|
info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
|
|
(1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
|
|
(1 << HWTSTAMP_FILTER_ALL));
|
|
return 0;
|
|
} else
|
|
return ethtool_op_get_ts_info(dev, info);
|
|
}
|
|
|
|
static int stmmac_get_tunable(struct net_device *dev,
|
|
const struct ethtool_tunable *tuna, void *data)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
int ret = 0;
|
|
|
|
switch (tuna->id) {
|
|
case ETHTOOL_RX_COPYBREAK:
|
|
*(u32 *)data = priv->rx_copybreak;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int stmmac_set_tunable(struct net_device *dev,
|
|
const struct ethtool_tunable *tuna,
|
|
const void *data)
|
|
{
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
int ret = 0;
|
|
|
|
switch (tuna->id) {
|
|
case ETHTOOL_RX_COPYBREAK:
|
|
priv->rx_copybreak = *(u32 *)data;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct ethtool_ops stmmac_ethtool_ops = {
|
|
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
|
|
ETHTOOL_COALESCE_MAX_FRAMES,
|
|
.begin = stmmac_check_if_running,
|
|
.get_drvinfo = stmmac_ethtool_getdrvinfo,
|
|
.get_msglevel = stmmac_ethtool_getmsglevel,
|
|
.set_msglevel = stmmac_ethtool_setmsglevel,
|
|
.get_regs = stmmac_ethtool_gregs,
|
|
.get_regs_len = stmmac_ethtool_get_regs_len,
|
|
.get_link = ethtool_op_get_link,
|
|
.nway_reset = stmmac_nway_reset,
|
|
.get_ringparam = stmmac_get_ringparam,
|
|
.set_ringparam = stmmac_set_ringparam,
|
|
.get_pauseparam = stmmac_get_pauseparam,
|
|
.set_pauseparam = stmmac_set_pauseparam,
|
|
.self_test = stmmac_selftest_run,
|
|
.get_ethtool_stats = stmmac_get_ethtool_stats,
|
|
.get_strings = stmmac_get_strings,
|
|
.get_wol = stmmac_get_wol,
|
|
.set_wol = stmmac_set_wol,
|
|
.get_eee = stmmac_ethtool_op_get_eee,
|
|
.set_eee = stmmac_ethtool_op_set_eee,
|
|
.get_sset_count = stmmac_get_sset_count,
|
|
.get_rxnfc = stmmac_get_rxnfc,
|
|
.get_rxfh_key_size = stmmac_get_rxfh_key_size,
|
|
.get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
|
|
.get_rxfh = stmmac_get_rxfh,
|
|
.set_rxfh = stmmac_set_rxfh,
|
|
.get_ts_info = stmmac_get_ts_info,
|
|
.get_coalesce = stmmac_get_coalesce,
|
|
.set_coalesce = stmmac_set_coalesce,
|
|
.get_per_queue_coalesce = stmmac_get_per_queue_coalesce,
|
|
.set_per_queue_coalesce = stmmac_set_per_queue_coalesce,
|
|
.get_channels = stmmac_get_channels,
|
|
.set_channels = stmmac_set_channels,
|
|
.get_tunable = stmmac_get_tunable,
|
|
.set_tunable = stmmac_set_tunable,
|
|
.get_link_ksettings = stmmac_ethtool_get_link_ksettings,
|
|
.set_link_ksettings = stmmac_ethtool_set_link_ksettings,
|
|
};
|
|
|
|
void stmmac_set_ethtool_ops(struct net_device *netdev)
|
|
{
|
|
netdev->ethtool_ops = &stmmac_ethtool_ops;
|
|
}
|