262 lines
7.9 KiB
C
262 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2018-2022 Linaro Ltd.
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*/
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include "ipa.h"
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#include "ipa_uc.h"
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#include "ipa_power.h"
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/**
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* DOC: The IPA embedded microcontroller
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*
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* The IPA incorporates a microcontroller that is able to do some additional
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* handling/offloading of network activity. The current code makes
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* essentially no use of the microcontroller, but it still requires some
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* initialization. It needs to be notified in the event the AP crashes.
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*
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* The microcontroller can generate two interrupts to the AP. One interrupt
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* is used to indicate that a response to a request from the AP is available.
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* The other is used to notify the AP of the occurrence of an event. In
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* addition, the AP can interrupt the microcontroller by writing a register.
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*
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* A 128 byte block of structured memory within the IPA SRAM is used together
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* with these interrupts to implement the communication interface between the
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* AP and the IPA microcontroller. Each side writes data to the shared area
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* before interrupting its peer, which will read the written data in response
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* to the interrupt. Some information found in the shared area is currently
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* unused. All remaining space in the shared area is reserved, and must not
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* be read or written by the AP.
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*/
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/* Supports hardware interface version 0x2000 */
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/* Delay to allow a the microcontroller to save state when crashing */
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#define IPA_SEND_DELAY 100 /* microseconds */
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/**
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* struct ipa_uc_mem_area - AP/microcontroller shared memory area
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* @command: command code (AP->microcontroller)
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* @reserved0: reserved bytes; avoid reading or writing
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* @command_param: low 32 bits of command parameter (AP->microcontroller)
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* @command_param_hi: high 32 bits of command parameter (AP->microcontroller)
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*
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* @response: response code (microcontroller->AP)
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* @reserved1: reserved bytes; avoid reading or writing
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* @response_param: response parameter (microcontroller->AP)
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*
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* @event: event code (microcontroller->AP)
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* @reserved2: reserved bytes; avoid reading or writing
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* @event_param: event parameter (microcontroller->AP)
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*
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* @first_error_address: address of first error-source on SNOC
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* @hw_state: state of hardware (including error type information)
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* @warning_counter: counter of non-fatal hardware errors
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* @reserved3: reserved bytes; avoid reading or writing
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* @interface_version: hardware-reported interface version
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* @reserved4: reserved bytes; avoid reading or writing
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*
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* A shared memory area at the base of IPA resident memory is used for
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* communication with the microcontroller. The region is 128 bytes in
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* size, but only the first 40 bytes (structured this way) are used.
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*/
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struct ipa_uc_mem_area {
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u8 command; /* enum ipa_uc_command */
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u8 reserved0[3];
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__le32 command_param;
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__le32 command_param_hi;
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u8 response; /* enum ipa_uc_response */
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u8 reserved1[3];
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__le32 response_param;
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u8 event; /* enum ipa_uc_event */
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u8 reserved2[3];
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__le32 event_param;
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__le32 first_error_address;
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u8 hw_state;
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u8 warning_counter;
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__le16 reserved3;
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__le16 interface_version;
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__le16 reserved4;
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};
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/** enum ipa_uc_command - commands from the AP to the microcontroller */
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enum ipa_uc_command {
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IPA_UC_COMMAND_NO_OP = 0x0,
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IPA_UC_COMMAND_UPDATE_FLAGS = 0x1,
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IPA_UC_COMMAND_DEBUG_RUN_TEST = 0x2,
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IPA_UC_COMMAND_DEBUG_GET_INFO = 0x3,
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IPA_UC_COMMAND_ERR_FATAL = 0x4,
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IPA_UC_COMMAND_CLK_GATE = 0x5,
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IPA_UC_COMMAND_CLK_UNGATE = 0x6,
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IPA_UC_COMMAND_MEMCPY = 0x7,
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IPA_UC_COMMAND_RESET_PIPE = 0x8,
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IPA_UC_COMMAND_REG_WRITE = 0x9,
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IPA_UC_COMMAND_GSI_CH_EMPTY = 0xa,
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};
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/** enum ipa_uc_response - microcontroller response codes */
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enum ipa_uc_response {
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IPA_UC_RESPONSE_NO_OP = 0x0,
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IPA_UC_RESPONSE_INIT_COMPLETED = 0x1,
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IPA_UC_RESPONSE_CMD_COMPLETED = 0x2,
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IPA_UC_RESPONSE_DEBUG_GET_INFO = 0x3,
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};
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/** enum ipa_uc_event - common cpu events reported by the microcontroller */
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enum ipa_uc_event {
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IPA_UC_EVENT_NO_OP = 0x0,
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IPA_UC_EVENT_ERROR = 0x1,
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IPA_UC_EVENT_LOG_INFO = 0x2,
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};
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static struct ipa_uc_mem_area *ipa_uc_shared(struct ipa *ipa)
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{
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const struct ipa_mem *mem = ipa_mem_find(ipa, IPA_MEM_UC_SHARED);
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u32 offset = ipa->mem_offset + mem->offset;
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return ipa->mem_virt + offset;
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}
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/* Microcontroller event IPA interrupt handler */
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static void ipa_uc_event_handler(struct ipa *ipa)
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{
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struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
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struct device *dev = &ipa->pdev->dev;
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if (shared->event == IPA_UC_EVENT_ERROR)
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dev_err(dev, "microcontroller error event\n");
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else if (shared->event != IPA_UC_EVENT_LOG_INFO)
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dev_err(dev, "unsupported microcontroller event %u\n",
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shared->event);
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/* The LOG_INFO event can be safely ignored */
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}
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/* Microcontroller response IPA interrupt handler */
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static void ipa_uc_response_hdlr(struct ipa *ipa)
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{
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struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
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struct device *dev = &ipa->pdev->dev;
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/* An INIT_COMPLETED response message is sent to the AP by the
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* microcontroller when it is operational. Other than this, the AP
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* should only receive responses from the microcontroller when it has
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* sent it a request message.
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*
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* We can drop the power reference taken in ipa_uc_power() once we
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* know the microcontroller has finished its initialization.
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*/
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switch (shared->response) {
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case IPA_UC_RESPONSE_INIT_COMPLETED:
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if (ipa->uc_powered) {
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ipa->uc_loaded = true;
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ipa_power_retention(ipa, true);
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pm_runtime_mark_last_busy(dev);
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(void)pm_runtime_put_autosuspend(dev);
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ipa->uc_powered = false;
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} else {
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dev_warn(dev, "unexpected init_completed response\n");
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}
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break;
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default:
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dev_warn(dev, "unsupported microcontroller response %u\n",
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shared->response);
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break;
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}
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}
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void ipa_uc_interrupt_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
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{
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/* Silently ignore anything unrecognized */
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if (irq_id == IPA_IRQ_UC_0)
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ipa_uc_event_handler(ipa);
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else if (irq_id == IPA_IRQ_UC_1)
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ipa_uc_response_hdlr(ipa);
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}
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/* Configure the IPA microcontroller subsystem */
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void ipa_uc_config(struct ipa *ipa)
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{
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ipa->uc_powered = false;
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ipa->uc_loaded = false;
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ipa_interrupt_enable(ipa, IPA_IRQ_UC_0);
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ipa_interrupt_enable(ipa, IPA_IRQ_UC_1);
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}
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/* Inverse of ipa_uc_config() */
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void ipa_uc_deconfig(struct ipa *ipa)
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{
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struct device *dev = &ipa->pdev->dev;
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ipa_interrupt_disable(ipa, IPA_IRQ_UC_1);
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ipa_interrupt_disable(ipa, IPA_IRQ_UC_0);
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if (ipa->uc_loaded)
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ipa_power_retention(ipa, false);
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if (!ipa->uc_powered)
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return;
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pm_runtime_mark_last_busy(dev);
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(void)pm_runtime_put_autosuspend(dev);
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}
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/* Take a proxy power reference for the microcontroller */
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void ipa_uc_power(struct ipa *ipa)
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{
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static bool already;
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struct device *dev;
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int ret;
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if (already)
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return;
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already = true; /* Only do this on first boot */
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/* This power reference dropped in ipa_uc_response_hdlr() above */
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dev = &ipa->pdev->dev;
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ret = pm_runtime_get_sync(dev);
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if (ret < 0) {
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pm_runtime_put_noidle(dev);
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dev_err(dev, "error %d getting proxy power\n", ret);
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} else {
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ipa->uc_powered = true;
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}
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}
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/* Send a command to the microcontroller */
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static void send_uc_command(struct ipa *ipa, u32 command, u32 command_param)
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{
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struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
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const struct reg *reg;
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u32 val;
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/* Fill in the command data */
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shared->command = command;
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shared->command_param = cpu_to_le32(command_param);
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shared->command_param_hi = 0;
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shared->response = 0;
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shared->response_param = 0;
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/* Use an interrupt to tell the microcontroller the command is ready */
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reg = ipa_reg(ipa, IPA_IRQ_UC);
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val = reg_bit(reg, UC_INTR);
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iowrite32(val, ipa->reg_virt + reg_offset(reg));
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}
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/* Tell the microcontroller the AP is shutting down */
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void ipa_uc_panic_notifier(struct ipa *ipa)
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{
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if (!ipa->uc_loaded)
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return;
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send_uc_command(ipa, IPA_UC_COMMAND_ERR_FATAL, 0);
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/* give uc enough time to save state */
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udelay(IPA_SEND_DELAY);
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}
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