535 lines
14 KiB
C
535 lines
14 KiB
C
/*
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* Atheros CARL9170 driver
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*
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* MAC programming
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*
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* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, see
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* http://www.gnu.org/licenses/.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* Copyright (c) 2007-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <asm/unaligned.h>
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#include "carl9170.h"
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#include "cmd.h"
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int carl9170_set_dyn_sifs_ack(struct ar9170 *ar)
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{
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u32 val;
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if (conf_is_ht40(&ar->hw->conf))
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val = 0x010a;
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else {
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if (ar->hw->conf.chandef.chan->band == NL80211_BAND_2GHZ)
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val = 0x105;
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else
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val = 0x104;
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}
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return carl9170_write_reg(ar, AR9170_MAC_REG_DYNAMIC_SIFS_ACK, val);
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}
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int carl9170_set_rts_cts_rate(struct ar9170 *ar)
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{
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u32 rts_rate, cts_rate;
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if (conf_is_ht(&ar->hw->conf)) {
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/* 12 mbit OFDM */
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rts_rate = 0x1da;
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cts_rate = 0x10a;
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} else {
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if (ar->hw->conf.chandef.chan->band == NL80211_BAND_2GHZ) {
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/* 11 mbit CCK */
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rts_rate = 033;
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cts_rate = 003;
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} else {
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/* 6 mbit OFDM */
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rts_rate = 0x1bb;
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cts_rate = 0x10b;
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}
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}
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return carl9170_write_reg(ar, AR9170_MAC_REG_RTS_CTS_RATE,
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rts_rate | (cts_rate) << 16);
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}
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int carl9170_set_slot_time(struct ar9170 *ar)
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{
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struct ieee80211_vif *vif;
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u32 slottime = 20;
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rcu_read_lock();
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vif = carl9170_get_main_vif(ar);
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if (!vif) {
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rcu_read_unlock();
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return 0;
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}
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if ((ar->hw->conf.chandef.chan->band == NL80211_BAND_5GHZ) ||
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vif->bss_conf.use_short_slot)
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slottime = 9;
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rcu_read_unlock();
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return carl9170_write_reg(ar, AR9170_MAC_REG_SLOT_TIME,
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slottime << 10);
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}
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int carl9170_set_mac_rates(struct ar9170 *ar)
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{
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struct ieee80211_vif *vif;
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u32 basic, mandatory;
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rcu_read_lock();
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vif = carl9170_get_main_vif(ar);
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if (!vif) {
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rcu_read_unlock();
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return 0;
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}
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basic = (vif->bss_conf.basic_rates & 0xf);
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basic |= (vif->bss_conf.basic_rates & 0xff0) << 4;
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rcu_read_unlock();
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if (ar->hw->conf.chandef.chan->band == NL80211_BAND_5GHZ)
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mandatory = 0xff00; /* OFDM 6/9/12/18/24/36/48/54 */
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else
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mandatory = 0xff0f; /* OFDM (6/9../54) + CCK (1/2/5.5/11) */
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carl9170_regwrite_begin(ar);
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carl9170_regwrite(AR9170_MAC_REG_BASIC_RATE, basic);
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carl9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, mandatory);
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carl9170_regwrite_finish();
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return carl9170_regwrite_result();
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}
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int carl9170_set_qos(struct ar9170 *ar)
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{
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carl9170_regwrite_begin(ar);
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carl9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min |
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(ar->edcf[0].cw_max << 16));
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carl9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min |
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(ar->edcf[1].cw_max << 16));
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carl9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min |
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(ar->edcf[2].cw_max << 16));
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carl9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min |
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(ar->edcf[3].cw_max << 16));
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carl9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min |
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(ar->edcf[4].cw_max << 16));
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carl9170_regwrite(AR9170_MAC_REG_AC2_AC1_AC0_AIFS,
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((ar->edcf[0].aifs * 9 + 10)) |
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((ar->edcf[1].aifs * 9 + 10) << 12) |
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((ar->edcf[2].aifs * 9 + 10) << 24));
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carl9170_regwrite(AR9170_MAC_REG_AC4_AC3_AC2_AIFS,
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((ar->edcf[2].aifs * 9 + 10) >> 8) |
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((ar->edcf[3].aifs * 9 + 10) << 4) |
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((ar->edcf[4].aifs * 9 + 10) << 16));
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carl9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
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ar->edcf[0].txop | ar->edcf[1].txop << 16);
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carl9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
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ar->edcf[2].txop | ar->edcf[3].txop << 16 |
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ar->edcf[4].txop << 24);
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carl9170_regwrite_finish();
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return carl9170_regwrite_result();
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}
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int carl9170_init_mac(struct ar9170 *ar)
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{
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carl9170_regwrite_begin(ar);
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/* switch MAC to OTUS interface */
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carl9170_regwrite(0x1c3600, 0x3);
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carl9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40);
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carl9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0x0);
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carl9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
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AR9170_MAC_FTF_MONITOR);
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/* enable MMIC */
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carl9170_regwrite(AR9170_MAC_REG_SNIFFER,
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AR9170_MAC_SNIFFER_DEFAULTS);
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carl9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80);
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carl9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70);
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carl9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000);
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carl9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10);
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/* CF-END & CF-ACK rate => 24M OFDM */
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carl9170_regwrite(AR9170_MAC_REG_TID_CFACK_CFEND_RATE, 0x59900000);
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/* NAV protects ACK only (in TXOP) */
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carl9170_regwrite(AR9170_MAC_REG_TXOP_DURATION, 0x201);
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/* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */
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/* OTUS set AM to 0x1 */
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carl9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170);
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carl9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105);
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/* Aggregation MAX number and timeout */
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carl9170_regwrite(AR9170_MAC_REG_AMPDU_FACTOR, 0x8000a);
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carl9170_regwrite(AR9170_MAC_REG_AMPDU_DENSITY, 0x140a07);
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carl9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
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AR9170_MAC_FTF_DEFAULTS);
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carl9170_regwrite(AR9170_MAC_REG_RX_CONTROL,
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AR9170_MAC_RX_CTRL_DEAGG |
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AR9170_MAC_RX_CTRL_SHORT_FILTER);
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/* rate sets */
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carl9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f);
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carl9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f);
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carl9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x0030033);
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/* MIMO response control */
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carl9170_regwrite(AR9170_MAC_REG_ACK_TPC, 0x4003c1e);
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carl9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff);
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/* set PHY register read timeout (??) */
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carl9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008);
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/* Disable Rx TimeOut, workaround for BB. */
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carl9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0);
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/* Set WLAN DMA interrupt mode: generate int per packet */
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carl9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011);
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carl9170_regwrite(AR9170_MAC_REG_FCS_SELECT,
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AR9170_MAC_FCS_FIFO_PROT);
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/* Disables the CF_END frame, undocumented register */
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carl9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND,
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0x141e0f48);
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/* reset group hash table */
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carl9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, 0xffffffff);
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carl9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, 0xffffffff);
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/* disable PRETBTT interrupt */
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carl9170_regwrite(AR9170_MAC_REG_PRETBTT, 0x0);
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carl9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, 0x0);
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carl9170_regwrite_finish();
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return carl9170_regwrite_result();
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}
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static int carl9170_set_mac_reg(struct ar9170 *ar,
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const u32 reg, const u8 *mac)
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{
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static const u8 zero[ETH_ALEN] = { 0 };
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if (!mac)
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mac = zero;
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carl9170_regwrite_begin(ar);
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carl9170_regwrite(reg, get_unaligned_le32(mac));
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carl9170_regwrite(reg + 4, get_unaligned_le16(mac + 4));
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carl9170_regwrite_finish();
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return carl9170_regwrite_result();
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}
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int carl9170_mod_virtual_mac(struct ar9170 *ar, const unsigned int id,
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const u8 *mac)
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{
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if (WARN_ON(id >= ar->fw.vif_num))
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return -EINVAL;
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return carl9170_set_mac_reg(ar,
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AR9170_MAC_REG_ACK_TABLE + (id - 1) * 8, mac);
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}
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int carl9170_update_multicast(struct ar9170 *ar, const u64 mc_hash)
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{
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int err;
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carl9170_regwrite_begin(ar);
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carl9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, mc_hash >> 32);
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carl9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, mc_hash);
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carl9170_regwrite_finish();
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err = carl9170_regwrite_result();
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if (err)
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return err;
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ar->cur_mc_hash = mc_hash;
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return 0;
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}
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int carl9170_set_operating_mode(struct ar9170 *ar)
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{
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struct ieee80211_vif *vif;
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struct ath_common *common = &ar->common;
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u8 *mac_addr, *bssid;
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u32 cam_mode = AR9170_MAC_CAM_DEFAULTS;
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u32 enc_mode = AR9170_MAC_ENCRYPTION_DEFAULTS |
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AR9170_MAC_ENCRYPTION_MGMT_RX_SOFTWARE;
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u32 rx_ctrl = AR9170_MAC_RX_CTRL_DEAGG |
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AR9170_MAC_RX_CTRL_SHORT_FILTER;
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u32 sniffer = AR9170_MAC_SNIFFER_DEFAULTS;
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int err = 0;
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rcu_read_lock();
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vif = carl9170_get_main_vif(ar);
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if (vif) {
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mac_addr = common->macaddr;
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bssid = common->curbssid;
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switch (vif->type) {
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case NL80211_IFTYPE_ADHOC:
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cam_mode |= AR9170_MAC_CAM_IBSS;
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break;
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case NL80211_IFTYPE_MESH_POINT:
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case NL80211_IFTYPE_AP:
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cam_mode |= AR9170_MAC_CAM_AP;
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/* iwlagn 802.11n STA Workaround */
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rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
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break;
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case NL80211_IFTYPE_STATION:
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cam_mode |= AR9170_MAC_CAM_STA;
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rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
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break;
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default:
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WARN(1, "Unsupported operation mode %x\n", vif->type);
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err = -EOPNOTSUPP;
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break;
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}
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} else {
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/*
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* Enable monitor mode
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*
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* rx_ctrl |= AR9170_MAC_RX_CTRL_ACK_IN_SNIFFER;
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* sniffer |= AR9170_MAC_SNIFFER_ENABLE_PROMISC;
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*
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* When the hardware is in SNIFFER_PROMISC mode,
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* it generates spurious ACKs for every incoming
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* frame. This confuses every peer in the
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* vicinity and the network throughput will suffer
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* badly.
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*
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* Hence, the hardware will be put into station
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* mode and just the rx filters are disabled.
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*/
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cam_mode |= AR9170_MAC_CAM_STA;
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rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
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mac_addr = common->macaddr;
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bssid = NULL;
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}
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rcu_read_unlock();
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if (err)
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return err;
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if (ar->rx_software_decryption)
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enc_mode |= AR9170_MAC_ENCRYPTION_RX_SOFTWARE;
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if (ar->sniffer_enabled) {
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enc_mode |= AR9170_MAC_ENCRYPTION_RX_SOFTWARE;
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}
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err = carl9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr);
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if (err)
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return err;
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err = carl9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid);
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if (err)
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return err;
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carl9170_regwrite_begin(ar);
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carl9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer);
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carl9170_regwrite(AR9170_MAC_REG_CAM_MODE, cam_mode);
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carl9170_regwrite(AR9170_MAC_REG_ENCRYPTION, enc_mode);
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carl9170_regwrite(AR9170_MAC_REG_RX_CONTROL, rx_ctrl);
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carl9170_regwrite_finish();
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return carl9170_regwrite_result();
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}
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int carl9170_set_hwretry_limit(struct ar9170 *ar, const unsigned int max_retry)
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{
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u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111);
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return carl9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp);
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}
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int carl9170_set_beacon_timers(struct ar9170 *ar)
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{
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struct ieee80211_vif *vif;
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u32 v = 0;
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u32 pretbtt = 0;
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rcu_read_lock();
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vif = carl9170_get_main_vif(ar);
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if (vif) {
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struct carl9170_vif_info *mvif;
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mvif = (void *) vif->drv_priv;
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if (mvif->enable_beacon && !WARN_ON(!ar->beacon_enabled)) {
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ar->global_beacon_int = vif->bss_conf.beacon_int /
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ar->beacon_enabled;
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SET_VAL(AR9170_MAC_BCN_DTIM, v,
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vif->bss_conf.dtim_period);
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switch (vif->type) {
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case NL80211_IFTYPE_MESH_POINT:
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case NL80211_IFTYPE_ADHOC:
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v |= AR9170_MAC_BCN_IBSS_MODE;
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break;
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case NL80211_IFTYPE_AP:
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v |= AR9170_MAC_BCN_AP_MODE;
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break;
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default:
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WARN_ON_ONCE(1);
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break;
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}
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} else if (vif->type == NL80211_IFTYPE_STATION) {
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ar->global_beacon_int = vif->bss_conf.beacon_int;
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SET_VAL(AR9170_MAC_BCN_DTIM, v,
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ar->hw->conf.ps_dtim_period);
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v |= AR9170_MAC_BCN_STA_PS |
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AR9170_MAC_BCN_PWR_MGT;
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}
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if (ar->global_beacon_int) {
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if (ar->global_beacon_int < 15) {
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rcu_read_unlock();
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return -ERANGE;
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}
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ar->global_pretbtt = ar->global_beacon_int -
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CARL9170_PRETBTT_KUS;
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} else {
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ar->global_pretbtt = 0;
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}
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} else {
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ar->global_beacon_int = 0;
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ar->global_pretbtt = 0;
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}
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rcu_read_unlock();
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SET_VAL(AR9170_MAC_BCN_PERIOD, v, ar->global_beacon_int);
|
|
SET_VAL(AR9170_MAC_PRETBTT, pretbtt, ar->global_pretbtt);
|
|
SET_VAL(AR9170_MAC_PRETBTT2, pretbtt, ar->global_pretbtt);
|
|
|
|
carl9170_regwrite_begin(ar);
|
|
carl9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt);
|
|
carl9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v);
|
|
carl9170_regwrite_finish();
|
|
return carl9170_regwrite_result();
|
|
}
|
|
|
|
int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac,
|
|
const u8 ktype, const u8 keyidx, const u8 *keydata,
|
|
const int keylen)
|
|
{
|
|
struct carl9170_set_key_cmd key = { };
|
|
static const u8 bcast[ETH_ALEN] = {
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
|
|
|
mac = mac ? : bcast;
|
|
|
|
key.user = cpu_to_le16(id);
|
|
key.keyId = cpu_to_le16(keyidx);
|
|
key.type = cpu_to_le16(ktype);
|
|
memcpy(&key.macAddr, mac, ETH_ALEN);
|
|
if (keydata)
|
|
memcpy(&key.key, keydata, keylen);
|
|
|
|
return carl9170_exec_cmd(ar, CARL9170_CMD_EKEY,
|
|
sizeof(key), (u8 *)&key, 0, NULL);
|
|
}
|
|
|
|
int carl9170_disable_key(struct ar9170 *ar, const u8 id)
|
|
{
|
|
struct carl9170_disable_key_cmd key = { };
|
|
|
|
key.user = cpu_to_le16(id);
|
|
|
|
return carl9170_exec_cmd(ar, CARL9170_CMD_DKEY,
|
|
sizeof(key), (u8 *)&key, 0, NULL);
|
|
}
|
|
|
|
int carl9170_set_mac_tpc(struct ar9170 *ar, struct ieee80211_channel *channel)
|
|
{
|
|
unsigned int power, chains;
|
|
|
|
if (ar->eeprom.tx_mask != 1)
|
|
chains = AR9170_TX_PHY_TXCHAIN_2;
|
|
else
|
|
chains = AR9170_TX_PHY_TXCHAIN_1;
|
|
|
|
switch (channel->band) {
|
|
case NL80211_BAND_2GHZ:
|
|
power = ar->power_2G_ofdm[0] & 0x3f;
|
|
break;
|
|
case NL80211_BAND_5GHZ:
|
|
power = ar->power_5G_leg[0] & 0x3f;
|
|
break;
|
|
default:
|
|
BUG();
|
|
}
|
|
|
|
power = min_t(unsigned int, power, ar->hw->conf.power_level * 2);
|
|
|
|
carl9170_regwrite_begin(ar);
|
|
carl9170_regwrite(AR9170_MAC_REG_ACK_TPC,
|
|
0x3c1e | power << 20 | chains << 26);
|
|
carl9170_regwrite(AR9170_MAC_REG_RTS_CTS_TPC,
|
|
power << 5 | chains << 11 |
|
|
power << 21 | chains << 27);
|
|
carl9170_regwrite(AR9170_MAC_REG_CFEND_QOSNULL_TPC,
|
|
power << 5 | chains << 11 |
|
|
power << 21 | chains << 27);
|
|
carl9170_regwrite_finish();
|
|
return carl9170_regwrite_result();
|
|
}
|