186 lines
4.8 KiB
C
186 lines
4.8 KiB
C
/* SPDX-License-Identifier: ISC */
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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*/
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#ifndef __MT76x02_EEPROM_H
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#define __MT76x02_EEPROM_H
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#include "mt76x02.h"
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enum mt76x02_eeprom_field {
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MT_EE_CHIP_ID = 0x000,
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MT_EE_VERSION = 0x002,
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MT_EE_MAC_ADDR = 0x004,
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MT_EE_PCI_ID = 0x00A,
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MT_EE_ANTENNA = 0x022,
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MT_EE_CFG1_INIT = 0x024,
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MT_EE_NIC_CONF_0 = 0x034,
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MT_EE_NIC_CONF_1 = 0x036,
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MT_EE_COUNTRY_REGION_5GHZ = 0x038,
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MT_EE_COUNTRY_REGION_2GHZ = 0x039,
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MT_EE_FREQ_OFFSET = 0x03a,
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MT_EE_NIC_CONF_2 = 0x042,
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MT_EE_XTAL_TRIM_1 = 0x03a,
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MT_EE_XTAL_TRIM_2 = 0x09e,
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MT_EE_LNA_GAIN = 0x044,
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MT_EE_RSSI_OFFSET_2G_0 = 0x046,
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MT_EE_RSSI_OFFSET_2G_1 = 0x048,
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MT_EE_LNA_GAIN_5GHZ_1 = 0x049,
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MT_EE_RSSI_OFFSET_5G_0 = 0x04a,
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MT_EE_RSSI_OFFSET_5G_1 = 0x04c,
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MT_EE_LNA_GAIN_5GHZ_2 = 0x04d,
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MT_EE_TX_POWER_DELTA_BW40 = 0x050,
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MT_EE_TX_POWER_DELTA_BW80 = 0x052,
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MT_EE_TX_POWER_EXT_PA_5G = 0x054,
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MT_EE_TX_POWER_0_START_2G = 0x056,
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MT_EE_TX_POWER_1_START_2G = 0x05c,
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/* used as byte arrays */
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#define MT_TX_POWER_GROUP_SIZE_5G 5
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#define MT_TX_POWER_GROUPS_5G 6
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MT_EE_TX_POWER_0_START_5G = 0x062,
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MT_EE_TSSI_SLOPE_2G = 0x06e,
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MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA = 0x074,
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MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE = 0x076,
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MT_EE_TX_POWER_1_START_5G = 0x080,
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MT_EE_TX_POWER_CCK = 0x0a0,
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MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2,
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MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4,
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MT_EE_TX_POWER_OFDM_5G_6M = 0x0b2,
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MT_EE_TX_POWER_OFDM_5G_24M = 0x0b4,
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MT_EE_TX_POWER_HT_MCS0 = 0x0a6,
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MT_EE_TX_POWER_HT_MCS4 = 0x0a8,
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MT_EE_TX_POWER_HT_MCS8 = 0x0aa,
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MT_EE_TX_POWER_HT_MCS12 = 0x0ac,
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MT_EE_TX_POWER_VHT_MCS8 = 0x0be,
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MT_EE_2G_TARGET_POWER = 0x0d0,
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MT_EE_TEMP_OFFSET = 0x0d1,
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MT_EE_5G_TARGET_POWER = 0x0d2,
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MT_EE_TSSI_BOUND1 = 0x0d4,
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MT_EE_TSSI_BOUND2 = 0x0d6,
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MT_EE_TSSI_BOUND3 = 0x0d8,
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MT_EE_TSSI_BOUND4 = 0x0da,
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MT_EE_FREQ_OFFSET_COMPENSATION = 0x0db,
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MT_EE_TSSI_BOUND5 = 0x0dc,
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MT_EE_TX_POWER_BYRATE_BASE = 0x0de,
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MT_EE_TSSI_SLOPE_5G = 0x0f0,
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MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2,
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MT_EE_RF_TEMP_COMP_SLOPE_2G = 0x0f4,
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MT_EE_RF_2G_TSSI_OFF_TXPOWER = 0x0f6,
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MT_EE_RF_2G_RX_HIGH_GAIN = 0x0f8,
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MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN = 0x0fa,
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MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN = 0x0fc,
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MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN = 0x0fe,
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MT_EE_BT_RCAL_RESULT = 0x138,
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MT_EE_BT_VCDL_CALIBRATION = 0x13c,
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MT_EE_BT_PMUCFG = 0x13e,
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MT_EE_USAGE_MAP_START = 0x1e0,
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MT_EE_USAGE_MAP_END = 0x1fc,
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__MT_EE_MAX
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};
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#define MT_EE_ANTENNA_DUAL BIT(15)
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#define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0)
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#define MT_EE_NIC_CONF_0_TX_PATH GENMASK(7, 4)
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#define MT_EE_NIC_CONF_0_PA_TYPE GENMASK(9, 8)
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#define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8)
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#define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9)
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#define MT_EE_NIC_CONF_0_PA_IO_CURRENT BIT(10)
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#define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
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#define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
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#define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
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#define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
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#define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
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#define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
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#define MT_EE_NIC_CONF_2_ANT_OPT BIT(3)
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#define MT_EE_NIC_CONF_2_ANT_DIV BIT(4)
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#define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9)
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#define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \
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MT_EE_USAGE_MAP_START + 1)
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enum mt76x02_eeprom_modes {
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MT_EE_READ,
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MT_EE_PHYSICAL_READ,
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};
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enum mt76x02_board_type {
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BOARD_TYPE_2GHZ = 1,
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BOARD_TYPE_5GHZ = 2,
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};
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static inline bool mt76x02_field_valid(u8 val)
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{
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return val != 0 && val != 0xff;
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}
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static inline int
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mt76x02_sign_extend(u32 val, unsigned int size)
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{
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bool sign = val & BIT(size - 1);
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val &= BIT(size - 1) - 1;
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return sign ? val : -val;
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}
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static inline int
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mt76x02_sign_extend_optional(u32 val, unsigned int size)
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{
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bool enable = val & BIT(size);
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return enable ? mt76x02_sign_extend(val, size) : 0;
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}
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static inline s8 mt76x02_rate_power_val(u8 val)
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{
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if (!mt76x02_field_valid(val))
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return 0;
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return mt76x02_sign_extend_optional(val, 7);
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}
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static inline int
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mt76x02_eeprom_get(struct mt76x02_dev *dev,
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enum mt76x02_eeprom_field field)
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{
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if ((field & 1) || field >= __MT_EE_MAX)
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return -1;
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return get_unaligned_le16(dev->mt76.eeprom.data + field);
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}
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bool mt76x02_ext_pa_enabled(struct mt76x02_dev *dev, enum nl80211_band band);
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int mt76x02_get_efuse_data(struct mt76x02_dev *dev, u16 base, void *buf,
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int len, enum mt76x02_eeprom_modes mode);
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void mt76x02_get_rx_gain(struct mt76x02_dev *dev, enum nl80211_band band,
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u16 *rssi_offset, s8 *lna_2g, s8 *lna_5g);
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u8 mt76x02_get_lna_gain(struct mt76x02_dev *dev,
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s8 *lna_2g, s8 *lna_5g,
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struct ieee80211_channel *chan);
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void mt76x02_eeprom_parse_hw_cap(struct mt76x02_dev *dev);
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int mt76x02_eeprom_copy(struct mt76x02_dev *dev,
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enum mt76x02_eeprom_field field,
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void *dest, int len);
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#endif /* __MT76x02_EEPROM_H */
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