145 lines
3.5 KiB
C
145 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Primary to Sideband (P2SB) bridge access support
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*
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* Copyright (c) 2017, 2021-2022 Intel Corporation.
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*
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* Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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* Jonathan Yong <jonathan.yong@intel.com>
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*/
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#include <linux/bits.h>
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#include <linux/export.h>
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#include <linux/pci.h>
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#include <linux/platform_data/x86/p2sb.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#define P2SBC 0xe0
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#define P2SBC_HIDE BIT(8)
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#define P2SB_DEVFN_DEFAULT PCI_DEVFN(31, 1)
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static const struct x86_cpu_id p2sb_cpu_ids[] = {
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, PCI_DEVFN(13, 0)),
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{}
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};
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static int p2sb_get_devfn(unsigned int *devfn)
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{
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unsigned int fn = P2SB_DEVFN_DEFAULT;
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const struct x86_cpu_id *id;
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id = x86_match_cpu(p2sb_cpu_ids);
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if (id)
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fn = (unsigned int)id->driver_data;
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*devfn = fn;
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return 0;
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}
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/* Copy resource from the first BAR of the device in question */
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static int p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
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{
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struct resource *bar0 = &pdev->resource[0];
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/* Make sure we have no dangling pointers in the output */
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memset(mem, 0, sizeof(*mem));
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/*
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* We copy only selected fields from the original resource.
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* Because a PCI device will be removed soon, we may not use
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* any allocated data, hence we may not copy any pointers.
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*/
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mem->start = bar0->start;
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mem->end = bar0->end;
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mem->flags = bar0->flags;
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mem->desc = bar0->desc;
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return 0;
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}
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static int p2sb_scan_and_read(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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{
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struct pci_dev *pdev;
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int ret;
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pdev = pci_scan_single_device(bus, devfn);
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if (!pdev)
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return -ENODEV;
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ret = p2sb_read_bar0(pdev, mem);
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pci_stop_and_remove_bus_device(pdev);
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return ret;
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}
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/**
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* p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
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* @bus: PCI bus to communicate with
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* @devfn: PCI slot and function to communicate with
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* @mem: memory resource to be filled in
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*
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* The BIOS prevents the P2SB device from being enumerated by the PCI
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* subsystem, so we need to unhide and hide it back to lookup the BAR.
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*
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* if @bus is NULL, the bus 0 in domain 0 will be used.
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* If @devfn is 0, it will be replaced by devfn of the P2SB device.
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*
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* Caller must provide a valid pointer to @mem.
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*
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* Locking is handled by pci_rescan_remove_lock mutex.
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*
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* Return:
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* 0 on success or appropriate errno value on error.
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*/
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int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
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{
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struct pci_dev *pdev_p2sb;
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unsigned int devfn_p2sb;
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u32 value = P2SBC_HIDE;
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int ret;
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/* Get devfn for P2SB device itself */
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ret = p2sb_get_devfn(&devfn_p2sb);
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if (ret)
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return ret;
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/* if @bus is NULL, use bus 0 in domain 0 */
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bus = bus ?: pci_find_bus(0, 0);
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/*
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* Prevent concurrent PCI bus scan from seeing the P2SB device and
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* removing via sysfs while it is temporarily exposed.
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*/
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pci_lock_rescan_remove();
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/* Unhide the P2SB device, if needed */
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pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);
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if (value & P2SBC_HIDE)
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pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);
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pdev_p2sb = pci_scan_single_device(bus, devfn_p2sb);
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if (devfn)
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ret = p2sb_scan_and_read(bus, devfn, mem);
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else
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ret = p2sb_read_bar0(pdev_p2sb, mem);
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pci_stop_and_remove_bus_device(pdev_p2sb);
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/* Hide the P2SB device, if it was hidden */
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if (value & P2SBC_HIDE)
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pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, P2SBC_HIDE);
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pci_unlock_rescan_remove();
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if (ret)
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return ret;
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if (mem->flags == 0)
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return -ENODEV;
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return 0;
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}
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EXPORT_SYMBOL_GPL(p2sb_bar);
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