143 lines
2.6 KiB
C
143 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ARM Generic Timer specific interface
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*/
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#ifndef SELFTEST_KVM_ARCH_TIMER_H
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#define SELFTEST_KVM_ARCH_TIMER_H
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#include "processor.h"
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enum arch_timer {
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VIRTUAL,
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PHYSICAL,
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};
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#define CTL_ENABLE (1 << 0)
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#define CTL_IMASK (1 << 1)
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#define CTL_ISTATUS (1 << 2)
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#define msec_to_cycles(msec) \
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(timer_get_cntfrq() * (uint64_t)(msec) / 1000)
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#define usec_to_cycles(usec) \
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(timer_get_cntfrq() * (uint64_t)(usec) / 1000000)
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#define cycles_to_usec(cycles) \
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((uint64_t)(cycles) * 1000000 / timer_get_cntfrq())
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static inline uint32_t timer_get_cntfrq(void)
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{
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return read_sysreg(cntfrq_el0);
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}
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static inline uint64_t timer_get_cntct(enum arch_timer timer)
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{
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isb();
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switch (timer) {
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case VIRTUAL:
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return read_sysreg(cntvct_el0);
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case PHYSICAL:
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return read_sysreg(cntpct_el0);
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default:
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GUEST_ASSERT_1(0, timer);
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}
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/* We should not reach here */
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return 0;
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}
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static inline void timer_set_cval(enum arch_timer timer, uint64_t cval)
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{
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switch (timer) {
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case VIRTUAL:
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write_sysreg(cval, cntv_cval_el0);
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break;
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case PHYSICAL:
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write_sysreg(cval, cntp_cval_el0);
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break;
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default:
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GUEST_ASSERT_1(0, timer);
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}
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isb();
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}
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static inline uint64_t timer_get_cval(enum arch_timer timer)
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{
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switch (timer) {
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case VIRTUAL:
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return read_sysreg(cntv_cval_el0);
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case PHYSICAL:
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return read_sysreg(cntp_cval_el0);
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default:
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GUEST_ASSERT_1(0, timer);
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}
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/* We should not reach here */
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return 0;
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}
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static inline void timer_set_tval(enum arch_timer timer, uint32_t tval)
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{
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switch (timer) {
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case VIRTUAL:
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write_sysreg(tval, cntv_tval_el0);
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break;
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case PHYSICAL:
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write_sysreg(tval, cntp_tval_el0);
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break;
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default:
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GUEST_ASSERT_1(0, timer);
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}
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isb();
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}
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static inline void timer_set_ctl(enum arch_timer timer, uint32_t ctl)
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{
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switch (timer) {
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case VIRTUAL:
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write_sysreg(ctl, cntv_ctl_el0);
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break;
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case PHYSICAL:
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write_sysreg(ctl, cntp_ctl_el0);
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break;
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default:
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GUEST_ASSERT_1(0, timer);
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}
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isb();
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}
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static inline uint32_t timer_get_ctl(enum arch_timer timer)
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{
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switch (timer) {
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case VIRTUAL:
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return read_sysreg(cntv_ctl_el0);
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case PHYSICAL:
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return read_sysreg(cntp_ctl_el0);
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default:
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GUEST_ASSERT_1(0, timer);
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}
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/* We should not reach here */
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return 0;
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}
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static inline void timer_set_next_cval_ms(enum arch_timer timer, uint32_t msec)
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{
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uint64_t now_ct = timer_get_cntct(timer);
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uint64_t next_ct = now_ct + msec_to_cycles(msec);
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timer_set_cval(timer, next_ct);
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}
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static inline void timer_set_next_tval_ms(enum arch_timer timer, uint32_t msec)
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{
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timer_set_tval(timer, msec_to_cycles(msec));
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}
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#endif /* SELFTEST_KVM_ARCH_TIMER_H */
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