159 lines
2.7 KiB
Plaintext
159 lines
2.7 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright 2014-2022 Toradex
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "imx6dl.dtsi"
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#include "imx6qdl-colibri.dtsi"
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/ {
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model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
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compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
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"fsl,imx6dl";
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aliases {
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i2c0 = &i2c2;
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i2c1 = &i2c3;
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};
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aliases {
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rtc0 = &rtc_i2c;
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rtc1 = &snvs_rtc;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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/* Fixed crystal dedicated to mcp251x */
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clk16m: clock-16m {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <16000000>;
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clock-output-names = "clk16m";
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};
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};
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/* Colibri SSP */
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&ecspi4 {
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status = "okay";
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mcp251x0: mcp251x@0 {
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compatible = "microchip,mcp2515";
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clocks = <&clk16m>;
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interrupt-parent = <&gpio3>;
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interrupts = <27 0x2>;
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reg = <0>;
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spi-max-frequency = <10000000>;
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status = "okay";
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};
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};
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/*
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* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
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*/
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&i2c3 {
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status = "okay";
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/* M41T0M6 real time clock on carrier board */
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rtc_i2c: rtc@68 {
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compatible = "st,m41t0";
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reg = <0x68>;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <
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&pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
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&pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
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&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
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&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
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>;
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};
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&pwm1 {
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status = "okay";
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};
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&pwm2 {
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status = "okay";
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};
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&pwm3 {
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status = "okay";
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};
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&pwm4 {
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status = "okay";
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};
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®_usb_host_vbus {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&usbh1 {
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disable-over-current;
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status = "okay";
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};
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&usbotg {
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disable-over-current;
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status = "okay";
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};
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/* Colibri MMC */
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&usdhc1 {
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status = "okay";
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};
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&weim {
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status = "okay";
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/* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */
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ranges = <0 0 0x08000000 0x02000000
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1 0 0x0a000000 0x02000000
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2 0 0x0c000000 0x02000000
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3 0 0x0e000000 0x02000000>;
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/* SRAM on Colibri nEXT_CS0 */
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sram@0,0 {
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compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
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reg = <0 0 0x00010000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <2>;
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fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
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0x00000000 0x04000040 0x00000000>;
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};
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/* SRAM on Colibri nEXT_CS1 */
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sram@1,0 {
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compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
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reg = <1 0 0x00010000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <2>;
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fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
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0x00000000 0x04000040 0x00000000>;
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};
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};
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