45 lines
1.1 KiB
Plaintext
45 lines
1.1 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Common omap4 mcpdm configuration
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*
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* Only include this file if your board has pdmclk wired from the
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* pmic to ABE as mcpdm uses an external clock for the module.
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*/
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&omap4_pmx_core {
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mcpdm_pins: pinmux_mcpdm_pins {
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pinctrl-single,pins = <
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/* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */
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OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)
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/* 0x4a100108 abe_pdm_dl_data.abe_pdm_dl_data af25 */
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OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0)
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/* 0x4a10010a abe_pdm_frame.abe_pdm_frame ae25 */
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OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0)
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/* 0x4a10010c abe_pdm_lb_clk.abe_pdm_lb_clk af26 */
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OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0)
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/* 0x4a10010e abe_clks.abe_clks ah26 */
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OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0)
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>;
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};
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};
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&mcpdm_module {
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/*
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* McPDM pads must be muxed at the interconnect target module
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* level as the module on the SoC needs external clock from
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* the PMIC
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&mcpdm_pins>;
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status = "okay";
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};
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&mcpdm {
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clocks = <&twl6040>;
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clock-names = "pdmclk";
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};
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