228 lines
6.5 KiB
C
228 lines
6.5 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Amstrad E3 FIQ handling
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*
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* Copyright (C) 2009 Janusz Krzysztofik
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* Copyright (c) 2006 Matt Callow
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* Copyright (c) 2004 Amstrad Plc
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* Copyright (C) 2001 RidgeRun, Inc.
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*
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* Parts of this code are taken from linux/arch/arm/mach-omap/irq.c
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* in the MontaVista 2.4 kernel (and the Amstrad changes therein)
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*/
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/machine.h>
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#include <linux/gpio/driver.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/platform_data/ams-delta-fiq.h>
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#include <linux/platform_device.h>
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#include <asm/fiq.h>
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#include <linux/soc/ti/omap1-io.h>
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#include "hardware.h"
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#include "ams-delta-fiq.h"
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#include "board-ams-delta.h"
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static struct fiq_handler fh = {
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.name = "ams-delta-fiq"
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};
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/*
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* This buffer is shared between FIQ and IRQ contexts.
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* The FIQ and IRQ isrs can both read and write it.
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* It is structured as a header section several 32bit slots,
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* followed by the circular buffer where the FIQ isr stores
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* keystrokes received from the qwerty keyboard. See
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* <linux/platform_data/ams-delta-fiq.h> for details of offsets.
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*/
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static unsigned int fiq_buffer[1024];
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static struct irq_chip *irq_chip;
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static struct irq_data *irq_data[16];
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static unsigned int irq_counter[16];
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static const char *pin_name[16] __initconst = {
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[AMS_DELTA_GPIO_PIN_KEYBRD_DATA] = "keybrd_data",
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[AMS_DELTA_GPIO_PIN_KEYBRD_CLK] = "keybrd_clk",
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};
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static irqreturn_t deferred_fiq(int irq, void *dev_id)
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{
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struct irq_data *d;
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int gpio, irq_num, fiq_count;
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/*
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* For each handled GPIO interrupt, keep calling its interrupt handler
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* until the IRQ counter catches the FIQ incremented interrupt counter.
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*/
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for (gpio = AMS_DELTA_GPIO_PIN_KEYBRD_CLK;
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gpio <= AMS_DELTA_GPIO_PIN_HOOK_SWITCH; gpio++) {
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d = irq_data[gpio];
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irq_num = d->irq;
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fiq_count = fiq_buffer[FIQ_CNT_INT_00 + gpio];
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if (irq_counter[gpio] < fiq_count &&
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gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
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/*
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* handle_simple_irq() that OMAP GPIO edge
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* interrupts default to since commit 80ac93c27441
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* requires interrupt already acked and unmasked.
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*/
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if (!WARN_ON_ONCE(!irq_chip->irq_unmask))
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irq_chip->irq_unmask(d);
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}
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for (; irq_counter[gpio] < fiq_count; irq_counter[gpio]++)
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generic_handle_irq(irq_num);
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}
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return IRQ_HANDLED;
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}
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void __init ams_delta_init_fiq(struct gpio_chip *chip,
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struct platform_device *serio)
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{
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struct gpio_desc *gpiod, *data = NULL, *clk = NULL;
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void *fiqhandler_start;
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unsigned int fiqhandler_length;
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struct pt_regs FIQ_regs;
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unsigned long val, offset;
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int i, retval;
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/* Store irq_chip location for IRQ handler use */
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irq_chip = chip->irq.chip;
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if (!irq_chip) {
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pr_err("%s: GPIO chip %s is missing IRQ function\n", __func__,
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chip->label);
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return;
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}
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for (i = 0; i < ARRAY_SIZE(irq_data); i++) {
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gpiod = gpiochip_request_own_desc(chip, i, pin_name[i],
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GPIO_ACTIVE_HIGH, GPIOD_IN);
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if (IS_ERR(gpiod)) {
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pr_err("%s: failed to get GPIO pin %d (%ld)\n",
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__func__, i, PTR_ERR(gpiod));
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return;
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}
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/* Store irq_data location for IRQ handler use */
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irq_data[i] = irq_get_irq_data(gpiod_to_irq(gpiod));
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/*
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* FIQ handler takes full control over serio data and clk GPIO
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* pins. Initialize them and keep requested so nobody can
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* interfere. Fail if any of those two couldn't be requested.
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*/
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switch (i) {
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case AMS_DELTA_GPIO_PIN_KEYBRD_DATA:
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data = gpiod;
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gpiod_direction_input(data);
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break;
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case AMS_DELTA_GPIO_PIN_KEYBRD_CLK:
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clk = gpiod;
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gpiod_direction_input(clk);
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break;
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default:
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gpiochip_free_own_desc(gpiod);
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break;
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}
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}
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if (!data || !clk)
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goto out_gpio;
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fiqhandler_start = &qwerty_fiqin_start;
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fiqhandler_length = &qwerty_fiqin_end - &qwerty_fiqin_start;
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pr_info("Installing fiq handler from %p, length 0x%x\n",
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fiqhandler_start, fiqhandler_length);
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retval = claim_fiq(&fh);
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if (retval) {
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pr_err("ams_delta_init_fiq(): couldn't claim FIQ, ret=%d\n",
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retval);
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goto out_gpio;
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}
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retval = request_irq(INT_DEFERRED_FIQ, deferred_fiq,
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IRQ_TYPE_EDGE_RISING, "deferred_fiq", NULL);
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if (retval < 0) {
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pr_err("Failed to get deferred_fiq IRQ, ret=%d\n", retval);
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release_fiq(&fh);
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goto out_gpio;
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}
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/*
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* Since no set_type() method is provided by OMAP irq chip,
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* switch to edge triggered interrupt type manually.
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*/
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offset = IRQ_ILR0_REG_OFFSET +
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((INT_DEFERRED_FIQ - NR_IRQS_LEGACY) & 0x1f) * 0x4;
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val = omap_readl(DEFERRED_FIQ_IH_BASE + offset) & ~(1 << 1);
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omap_writel(val, DEFERRED_FIQ_IH_BASE + offset);
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set_fiq_handler(fiqhandler_start, fiqhandler_length);
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/*
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* Initialise the buffer which is shared
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* between FIQ mode and IRQ mode
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*/
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fiq_buffer[FIQ_GPIO_INT_MASK] = 0;
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fiq_buffer[FIQ_MASK] = 0;
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fiq_buffer[FIQ_STATE] = 0;
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fiq_buffer[FIQ_KEY] = 0;
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fiq_buffer[FIQ_KEYS_CNT] = 0;
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fiq_buffer[FIQ_KEYS_HICNT] = 0;
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fiq_buffer[FIQ_TAIL_OFFSET] = 0;
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fiq_buffer[FIQ_HEAD_OFFSET] = 0;
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fiq_buffer[FIQ_BUF_LEN] = 256;
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fiq_buffer[FIQ_MISSED_KEYS] = 0;
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fiq_buffer[FIQ_BUFFER_START] =
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(unsigned int) &fiq_buffer[FIQ_CIRC_BUFF];
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for (i = FIQ_CNT_INT_00; i <= FIQ_CNT_INT_15; i++)
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fiq_buffer[i] = 0;
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/*
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* FIQ mode r9 always points to the fiq_buffer, because the FIQ isr
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* will run in an unpredictable context. The fiq_buffer is the FIQ isr's
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* only means of communication with the IRQ level and other kernel
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* context code.
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*/
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FIQ_regs.ARM_r9 = (unsigned int)fiq_buffer;
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set_fiq_regs(&FIQ_regs);
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pr_info("request_fiq(): fiq_buffer = %p\n", fiq_buffer);
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/*
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* Redirect GPIO interrupts to FIQ
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*/
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offset = IRQ_ILR0_REG_OFFSET + (INT_GPIO_BANK1 - NR_IRQS_LEGACY) * 0x4;
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val = omap_readl(OMAP_IH1_BASE + offset) | 1;
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omap_writel(val, OMAP_IH1_BASE + offset);
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/* Initialize serio device IRQ resource and platform_data */
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serio->resource[0].start = gpiod_to_irq(clk);
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serio->resource[0].end = serio->resource[0].start;
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serio->dev.platform_data = fiq_buffer;
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/*
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* Since FIQ handler performs handling of GPIO registers for
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* "keybrd_clk" IRQ pin, ams_delta_serio driver used to set
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* handle_simple_irq() as active IRQ handler for that pin to avoid
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* bad interaction with gpio-omap driver. This is no longer needed
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* as handle_simple_irq() is now the default handler for OMAP GPIO
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* edge interrupts.
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* This comment replaces the obsolete code which has been removed
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* from the ams_delta_serio driver and stands here only as a reminder
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* of that dependency on gpio-omap driver behavior.
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*/
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return;
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out_gpio:
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if (data)
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gpiochip_free_own_desc(data);
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if (clk)
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gpiochip_free_own_desc(clk);
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}
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