123 lines
3.7 KiB
C
123 lines
3.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C64XX - Memory map definitions
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*/
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#ifndef __ASM_ARCH_MAP_H
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#define __ASM_ARCH_MAP_H __FILE__
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#include "map-base.h"
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#include "map-s3c.h"
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/*
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* Post-mux Chip Select Regions Xm0CSn_
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* These may be used by SROM, NAND or CF depending on settings
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*/
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#define S3C64XX_PA_XM0CSN0 (0x10000000)
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#define S3C64XX_PA_XM0CSN1 (0x18000000)
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#define S3C64XX_PA_XM0CSN2 (0x20000000)
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#define S3C64XX_PA_XM0CSN3 (0x28000000)
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#define S3C64XX_PA_XM0CSN4 (0x30000000)
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#define S3C64XX_PA_XM0CSN5 (0x38000000)
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/* HSMMC units */
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#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
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#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)
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#define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1)
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#define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2)
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#define S3C_PA_UART (0x7F005000)
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#define S3C_PA_UART0 (S3C_PA_UART + 0x00)
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#define S3C_PA_UART1 (S3C_PA_UART + 0x400)
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#define S3C_PA_UART2 (S3C_PA_UART + 0x800)
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#define S3C_PA_UART3 (S3C_PA_UART + 0xC00)
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#define S3C_UART_OFFSET (0x400)
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/* See notes on UART VA mapping in debug-macro.S */
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#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
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#define S3C_VA_UART0 S3C_VA_UARTx(0)
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#define S3C_VA_UART1 S3C_VA_UARTx(1)
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#define S3C_VA_UART2 S3C_VA_UARTx(2)
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#define S3C_VA_UART3 S3C_VA_UARTx(3)
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#define S3C64XX_PA_SROM (0x70000000)
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#define S3C64XX_PA_ONENAND0 (0x70100000)
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#define S3C64XX_PA_ONENAND0_BUF (0x20000000)
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#define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
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/* NAND and OneNAND1 controllers occupy the same register region
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(depending on SoC POP version) */
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#define S3C64XX_PA_ONENAND1 (0x70200000)
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#define S3C64XX_PA_ONENAND1_BUF (0x28000000)
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#define S3C64XX_SZ_ONENAND1_BUF (SZ_64M)
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#define S3C64XX_PA_NAND (0x70200000)
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#define S3C64XX_PA_FB (0x77100000)
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#define S3C64XX_PA_USB_HSOTG (0x7C000000)
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#define S3C64XX_PA_WATCHDOG (0x7E004000)
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#define S3C64XX_PA_RTC (0x7E005000)
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#define S3C64XX_PA_KEYPAD (0x7E00A000)
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#define S3C64XX_PA_ADC (0x7E00B000)
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#define S3C64XX_PA_SYSCON (0x7E00F000)
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#define S3C64XX_PA_AC97 (0x7F001000)
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#define S3C64XX_PA_IIS0 (0x7F002000)
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#define S3C64XX_PA_IIS1 (0x7F003000)
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#define S3C64XX_PA_TIMER (0x7F006000)
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#define S3C64XX_PA_IIC0 (0x7F004000)
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#define S3C64XX_PA_SPI0 (0x7F00B000)
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#define S3C64XX_PA_SPI1 (0x7F00C000)
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#define S3C64XX_PA_PCM0 (0x7F009000)
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#define S3C64XX_PA_PCM1 (0x7F00A000)
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#define S3C64XX_PA_IISV4 (0x7F00D000)
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#define S3C64XX_PA_IIC1 (0x7F00F000)
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#define S3C64XX_PA_GPIO (0x7F008000)
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#define S3C64XX_SZ_GPIO SZ_4K
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#define S3C64XX_PA_SDRAM (0x50000000)
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#define S3C64XX_PA_CFCON (0x70300000)
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#define S3C64XX_PA_VIC0 (0x71200000)
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#define S3C64XX_PA_VIC1 (0x71300000)
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#define S3C64XX_PA_MODEM (0x74108000)
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#define S3C64XX_PA_USBHOST (0x74300000)
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#define S3C64XX_PA_USB_HSPHY (0x7C100000)
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/* compatibility defines. */
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#define S3C_PA_TIMER S3C64XX_PA_TIMER
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#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0
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#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1
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#define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2
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#define S3C_PA_IIC S3C64XX_PA_IIC0
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#define S3C_PA_IIC1 S3C64XX_PA_IIC1
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#define S3C_PA_NAND S3C64XX_PA_NAND
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#define S3C_PA_ONENAND S3C64XX_PA_ONENAND0
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#define S3C_PA_ONENAND_BUF S3C64XX_PA_ONENAND0_BUF
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#define S3C_SZ_ONENAND_BUF S3C64XX_SZ_ONENAND0_BUF
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#define S3C_PA_FB S3C64XX_PA_FB
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#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
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#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
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#define S3C_PA_RTC S3C64XX_PA_RTC
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#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
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#define S3C_PA_SPI0 S3C64XX_PA_SPI0
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#define S3C_PA_SPI1 S3C64XX_PA_SPI1
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#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
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#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
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#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD
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#define SAMSUNG_PA_TIMER S3C64XX_PA_TIMER
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#endif /* __ASM_ARCH_6400_MAP_H */
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