32 lines
808 B
ArmAsm
32 lines
808 B
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0+
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*
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* Shared SCU setup for mach-shmobile
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*
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* Copyright (C) 2012 Bastian Hecht
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/memory.h>
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/*
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* Boot code for secondary CPUs.
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*
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* First we turn on L1 cache coherency for our CPU. Then we jump to
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* secondary_startup that invalidates the cache and hands over control
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* to the common ARM startup code.
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*/
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ENTRY(shmobile_boot_scu)
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@ r0 = SCU base address
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mrc p15, 0, r1, c0, c0, 5 @ read MPIDR
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and r1, r1, #3 @ mask out cpu ID
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lsl r1, r1, #3 @ we will shift by cpu_id * 8 bits
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ldr r2, [r0, #8] @ SCU Power Status Register
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mov r3, #3
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lsl r3, r3, r1
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bic r2, r2, r3 @ Clear bits of our CPU (Run Mode)
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str r2, [r0, #8] @ write back
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b secondary_startup
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ENDPROC(shmobile_boot_scu)
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