347 lines
10 KiB
Plaintext
347 lines
10 KiB
Plaintext
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/*
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* BSD LICENSE
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*
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* Copyright(c) 2016-2017 Broadcom. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dt-bindings/pinctrl/brcm,pinctrl-stingray.h>
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pinconf: pinconf@140000 {
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compatible = "pinconf-single";
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reg = <0x00140000 0x250>;
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pinctrl-single,register-width = <32>;
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/* pinconf functions */
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};
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pinmux: pinmux@14029c {
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compatible = "pinctrl-single";
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reg = <0x0014029c 0x26c>;
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#address-cells = <1>;
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#size-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xf>;
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pinctrl-single,gpio-range = <
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&range 0 91 MODE_GPIO
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&range 95 60 MODE_GPIO
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>;
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range: gpio-range {
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#pinctrl-single,gpio-range-cells = <3>;
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};
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/* pinctrl functions */
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tsio_pins: pinmux_gpio_14 {
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pinctrl-single,pins = <
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0x038 MODE_NITRO /* tsio_0 */
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0x03c MODE_NITRO /* tsio_1 */
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>;
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};
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nor_pins: pinmux_pnor_adv_n {
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pinctrl-single,pins = <
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0x0ac MODE_PNOR /* nand_ce1_n */
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0x0b0 MODE_PNOR /* nand_ce0_n */
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0x0b4 MODE_PNOR /* nand_we_n */
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0x0b8 MODE_PNOR /* nand_wp_n */
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0x0bc MODE_PNOR /* nand_re_n */
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0x0c0 MODE_PNOR /* nand_rdy_bsy_n */
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0x0c4 MODE_PNOR /* nand_io0_0 */
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0x0c8 MODE_PNOR /* nand_io1_0 */
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0x0cc MODE_PNOR /* nand_io2_0 */
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0x0d0 MODE_PNOR /* nand_io3_0 */
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0x0d4 MODE_PNOR /* nand_io4_0 */
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0x0d8 MODE_PNOR /* nand_io5_0 */
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0x0dc MODE_PNOR /* nand_io6_0 */
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0x0e0 MODE_PNOR /* nand_io7_0 */
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0x0e4 MODE_PNOR /* nand_io8_0 */
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0x0e8 MODE_PNOR /* nand_io9_0 */
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0x0ec MODE_PNOR /* nand_io10_0 */
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0x0f0 MODE_PNOR /* nand_io11_0 */
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0x0f4 MODE_PNOR /* nand_io12_0 */
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0x0f8 MODE_PNOR /* nand_io13_0 */
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0x0fc MODE_PNOR /* nand_io14_0 */
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0x100 MODE_PNOR /* nand_io15_0 */
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0x104 MODE_PNOR /* nand_ale_0 */
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0x108 MODE_PNOR /* nand_cle_0 */
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0x040 MODE_PNOR /* pnor_adv_n */
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0x044 MODE_PNOR /* pnor_baa_n */
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0x048 MODE_PNOR /* pnor_bls_0_n */
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0x04c MODE_PNOR /* pnor_bls_1_n */
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0x050 MODE_PNOR /* pnor_cre */
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0x054 MODE_PNOR /* pnor_cs_2_n */
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0x058 MODE_PNOR /* pnor_cs_1_n */
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0x05c MODE_PNOR /* pnor_cs_0_n */
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0x060 MODE_PNOR /* pnor_we_n */
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0x064 MODE_PNOR /* pnor_oe_n */
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0x068 MODE_PNOR /* pnor_intr */
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0x06c MODE_PNOR /* pnor_dat_0 */
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0x070 MODE_PNOR /* pnor_dat_1 */
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0x074 MODE_PNOR /* pnor_dat_2 */
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0x078 MODE_PNOR /* pnor_dat_3 */
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0x07c MODE_PNOR /* pnor_dat_4 */
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0x080 MODE_PNOR /* pnor_dat_5 */
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0x084 MODE_PNOR /* pnor_dat_6 */
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0x088 MODE_PNOR /* pnor_dat_7 */
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0x08c MODE_PNOR /* pnor_dat_8 */
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0x090 MODE_PNOR /* pnor_dat_9 */
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0x094 MODE_PNOR /* pnor_dat_10 */
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0x098 MODE_PNOR /* pnor_dat_11 */
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0x09c MODE_PNOR /* pnor_dat_12 */
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0x0a0 MODE_PNOR /* pnor_dat_13 */
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0x0a4 MODE_PNOR /* pnor_dat_14 */
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0x0a8 MODE_PNOR /* pnor_dat_15 */
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>;
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};
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nand_pins: pinmux_nand_ce1_n {
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pinctrl-single,pins = <
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0x0ac MODE_NAND /* nand_ce1_n */
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0x0b0 MODE_NAND /* nand_ce0_n */
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0x0b4 MODE_NAND /* nand_we_n */
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0x0b8 MODE_NAND /* nand_wp_n */
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0x0bc MODE_NAND /* nand_re_n */
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0x0c0 MODE_NAND /* nand_rdy_bsy_n */
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0x0c4 MODE_NAND /* nand_io0_0 */
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0x0c8 MODE_NAND /* nand_io1_0 */
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0x0cc MODE_NAND /* nand_io2_0 */
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0x0d0 MODE_NAND /* nand_io3_0 */
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0x0d4 MODE_NAND /* nand_io4_0 */
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0x0d8 MODE_NAND /* nand_io5_0 */
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0x0dc MODE_NAND /* nand_io6_0 */
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0x0e0 MODE_NAND /* nand_io7_0 */
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0x0e4 MODE_NAND /* nand_io8_0 */
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0x0e8 MODE_NAND /* nand_io9_0 */
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0x0ec MODE_NAND /* nand_io10_0 */
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0x0f0 MODE_NAND /* nand_io11_0 */
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0x0f4 MODE_NAND /* nand_io12_0 */
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0x0f8 MODE_NAND /* nand_io13_0 */
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0x0fc MODE_NAND /* nand_io14_0 */
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0x100 MODE_NAND /* nand_io15_0 */
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0x104 MODE_NAND /* nand_ale_0 */
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0x108 MODE_NAND /* nand_cle_0 */
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>;
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};
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pwm0_pins: pinmux_pwm_0 {
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pinctrl-single,pins = <
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0x10c MODE_NITRO
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>;
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};
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pwm1_pins: pinmux_pwm_1 {
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pinctrl-single,pins = <
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0x110 MODE_NITRO
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>;
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};
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pwm2_pins: pinmux_pwm_2 {
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pinctrl-single,pins = <
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0x114 MODE_NITRO
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>;
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};
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pwm3_pins: pinmux_pwm_3 {
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pinctrl-single,pins = <
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0x118 MODE_NITRO
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>;
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};
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dbu_rxd_pins: pinmux_uart1_sin_nitro {
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pinctrl-single,pins = <
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0x11c MODE_NITRO /* dbu_rxd */
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0x120 MODE_NITRO /* dbu_txd */
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>;
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};
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uart1_pins: pinmux_uart1_sin_nand {
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pinctrl-single,pins = <
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0x11c MODE_NAND /* uart1_sin */
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0x120 MODE_NAND /* uart1_out */
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>;
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};
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uart2_pins: pinmux_uart2_sin {
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pinctrl-single,pins = <
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0x124 MODE_NITRO /* uart2_sin */
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0x128 MODE_NITRO /* uart2_out */
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>;
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};
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uart3_pins: pinmux_uart3_sin {
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pinctrl-single,pins = <
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0x12c MODE_NITRO /* uart3_sin */
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0x130 MODE_NITRO /* uart3_out */
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>;
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};
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i2s_pins: pinmux_i2s_bitclk {
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pinctrl-single,pins = <
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0x134 MODE_NITRO /* i2s_bitclk */
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0x138 MODE_NITRO /* i2s_sdout */
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0x13c MODE_NITRO /* i2s_sdin */
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0x140 MODE_NITRO /* i2s_ws */
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0x144 MODE_NITRO /* i2s_mclk */
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0x148 MODE_NITRO /* i2s_spdif_out */
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>;
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};
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qspi_pins: pinumx_qspi_hold_n {
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pinctrl-single,pins = <
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0x14c MODE_NAND /* qspi_hold_n */
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0x150 MODE_NAND /* qspi_wp_n */
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0x154 MODE_NAND /* qspi_sck */
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0x158 MODE_NAND /* qspi_cs_n */
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0x15c MODE_NAND /* qspi_mosi */
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0x160 MODE_NAND /* qspi_miso */
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>;
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};
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mdio_pins: pinumx_ext_mdio {
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pinctrl-single,pins = <
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0x164 MODE_NITRO /* ext_mdio */
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0x168 MODE_NITRO /* ext_mdc */
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>;
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};
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i2c0_pins: pinmux_i2c0_sda {
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pinctrl-single,pins = <
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0x16c MODE_NITRO /* i2c0_sda */
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0x170 MODE_NITRO /* i2c0_scl */
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>;
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};
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i2c1_pins: pinmux_i2c1_sda {
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pinctrl-single,pins = <
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0x174 MODE_NITRO /* i2c1_sda */
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0x178 MODE_NITRO /* i2c1_scl */
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>;
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};
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sdio0_pins: pinmux_sdio0_cd_l {
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pinctrl-single,pins = <
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0x17c MODE_NITRO /* sdio0_cd_l */
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0x180 MODE_NITRO /* sdio0_clk_sdcard */
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0x184 MODE_NITRO /* sdio0_data0 */
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0x188 MODE_NITRO /* sdio0_data1 */
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0x18c MODE_NITRO /* sdio0_data2 */
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0x190 MODE_NITRO /* sdio0_data3 */
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0x194 MODE_NITRO /* sdio0_data4 */
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0x198 MODE_NITRO /* sdio0_data5 */
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0x19c MODE_NITRO /* sdio0_data6 */
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0x1a0 MODE_NITRO /* sdio0_data7 */
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0x1a4 MODE_NITRO /* sdio0_cmd */
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0x1a8 MODE_NITRO /* sdio0_emmc_rst_n */
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0x1ac MODE_NITRO /* sdio0_led_on */
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0x1b0 MODE_NITRO /* sdio0_wp */
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>;
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};
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sdio1_pins: pinmux_sdio1_cd_l {
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pinctrl-single,pins = <
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0x1b4 MODE_NITRO /* sdio1_cd_l */
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0x1b8 MODE_NITRO /* sdio1_clk_sdcard */
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0x1bc MODE_NITRO /* sdio1_data0 */
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0x1c0 MODE_NITRO /* sdio1_data1 */
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0x1c4 MODE_NITRO /* sdio1_data2 */
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0x1c8 MODE_NITRO /* sdio1_data3 */
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0x1cc MODE_NITRO /* sdio1_data4 */
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0x1d0 MODE_NITRO /* sdio1_data5 */
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0x1d4 MODE_NITRO /* sdio1_data6 */
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0x1d8 MODE_NITRO /* sdio1_data7 */
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0x1dc MODE_NITRO /* sdio1_cmd */
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0x1e0 MODE_NITRO /* sdio1_emmc_rst_n */
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0x1e4 MODE_NITRO /* sdio1_led_on */
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0x1e8 MODE_NITRO /* sdio1_wp */
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>;
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};
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spi0_pins: pinmux_spi0_sck_nand {
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pinctrl-single,pins = <
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0x1ec MODE_NITRO /* spi0_sck */
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0x1f0 MODE_NITRO /* spi0_rxd */
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0x1f4 MODE_NITRO /* spi0_fss */
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0x1f8 MODE_NITRO /* spi0_txd */
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>;
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};
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spi1_pins: pinmux_spi1_sck_nand {
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pinctrl-single,pins = <
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0x1fc MODE_NITRO /* spi1_sck */
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0x200 MODE_NITRO /* spi1_rxd */
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0x204 MODE_NITRO /* spi1_fss */
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0x208 MODE_NITRO /* spi1_txd */
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>;
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};
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nuart_pins: pinmux_uart0_sin_nitro {
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pinctrl-single,pins = <
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0x20c MODE_NITRO /* nuart_rxd */
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0x210 MODE_NITRO /* nuart_txd */
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>;
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};
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uart0_pins: pinumux_uart0_sin_nand {
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pinctrl-single,pins = <
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0x20c MODE_NAND /* uart0_sin */
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0x210 MODE_NAND /* uart0_out */
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0x214 MODE_NAND /* uart0_rts */
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0x218 MODE_NAND /* uart0_cts */
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0x21c MODE_NAND /* uart0_dtr */
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0x220 MODE_NAND /* uart0_dcd */
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0x224 MODE_NAND /* uart0_dsr */
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0x228 MODE_NAND /* uart0_ri */
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|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
drdu2_pins: pinmux_drdu2_overcurrent {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
0x22c MODE_NITRO /* drdu2_overcurrent */
|
||
|
|
0x230 MODE_NITRO /* drdu2_vbus_ppc */
|
||
|
|
0x234 MODE_NITRO /* drdu2_vbus_present */
|
||
|
|
0x238 MODE_NITRO /* drdu2_id */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
drdu3_pins: pinmux_drdu3_overcurrent {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
0x23c MODE_NITRO /* drdu3_overcurrent */
|
||
|
|
0x240 MODE_NITRO /* drdu3_vbus_ppc */
|
||
|
|
0x244 MODE_NITRO /* drdu3_vbus_present */
|
||
|
|
0x248 MODE_NITRO /* drdu3_id */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb3h_pins: pinmux_usb3h_overcurrent {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
0x24c MODE_NITRO /* usb3h_overcurrent */
|
||
|
|
0x250 MODE_NITRO /* usb3h_vbus_ppc */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|