356 lines
7.9 KiB
Plaintext
356 lines
7.9 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright (C) 2019 Kontron Electronics GmbH
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*/
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/dts-v1/;
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#include "imx8mm-kontron-sl.dtsi"
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/ {
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model = "Kontron BL i.MX8MM (N801X S)";
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compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
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aliases {
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ethernet1 = &usbnet;
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rtc0 = &rx8900;
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rtc1 = &snvs_rtc;
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};
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/* fixed crystal dedicated to mcp2515 */
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osc_can: clock-osc-can {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <16000000>;
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clock-output-names = "osc-can";
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_led>;
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led1 {
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label = "led1";
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gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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led2 {
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label = "led2";
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gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
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};
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led3 {
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label = "led3";
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gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
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};
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led4 {
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label = "led4";
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gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
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};
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led5 {
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label = "led5";
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gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
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};
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led6 {
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label = "led6";
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gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
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};
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};
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pwm-beeper {
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compatible = "pwm-beeper";
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pwms = <&pwm2 0 5000 0>;
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};
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reg_rst_eth2: regulator-rst-eth2 {
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compatible = "regulator-fixed";
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regulator-name = "rst-usb-eth2";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_eth2>;
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gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_vdd_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "vdd-5v";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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status = "okay";
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can0: can@0 {
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compatible = "microchip,mcp2515";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can>;
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clocks = <&osc_can>;
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interrupt-parent = <&gpio4>;
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interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
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spi-max-frequency = <10000000>;
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vdd-supply = <®_vdd_3v3>;
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xceiver-supply = <®_vdd_5v>;
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};
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};
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&ecspi3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi3>;
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cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-connection-type = "rgmii-rxid";
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phy-handle = <ðphy>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy: ethernet-phy@0 {
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reg = <0>;
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reset-assert-us = <1>;
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reset-deassert-us = <15000>;
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reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&i2c4 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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status = "okay";
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rx8900: rtc@32 {
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compatible = "epson,rx8900";
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reg = <0x32>;
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};
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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uart-has-rtscts;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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linux,rs485-enabled-at-boot-time;
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uart-has-rtscts;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "otg";
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over-current-active-low;
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status = "okay";
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};
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&usbotg2 {
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dr_mode = "host";
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disable-over-current;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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usb1@1 {
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compatible = "usb424,9514";
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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usbnet: ethernet@1 {
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compatible = "usb424,ec00";
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reg = <1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
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vmmc-supply = <®_vdd_3v3>;
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vqmmc-supply = <®_nvcc_sd>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio>;
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pinctrl_can: cangrp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
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MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
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MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
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MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19
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>;
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};
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pinctrl_ecspi3: ecspi3grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82
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MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82
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MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82
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MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
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MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
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MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
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MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
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MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
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MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
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MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
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MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
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MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
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MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
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MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
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MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
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MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
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MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
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MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 /* PHY RST */
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MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* ETH IRQ */
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>;
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};
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pinctrl_gpio_led: gpioledgrp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
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MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19
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MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19
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MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19
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MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19
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MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19
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MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19
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>;
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};
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pinctrl_gpio: gpiogrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
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MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
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MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
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MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19
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MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
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MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
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MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
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MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
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MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140
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MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140
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MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140
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MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140
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MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140
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MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140
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MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140
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>;
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};
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pinctrl_usb_eth2: usbeth2grp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
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MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
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MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
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MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|