581 lines
12 KiB
Plaintext
581 lines
12 KiB
Plaintext
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi
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*
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* Copyright (c) 2021, Jami Kettunen <jamipkettunen@gmail.com>
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* Copyright (c) 2016, The Linux Foundation. All rights reserved.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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#include "msm8998.dtsi"
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#include "pm8005.dtsi"
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#include "pm8998.dtsi"
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#include "pmi8998.dtsi"
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/ {
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/* Required for bootloader to select correct board */
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qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* Use display framebuffer setup by the UEFI XBL bootloader for simplefb */
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framebuffer0: framebuffer@9d400000 {
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compatible = "simple-framebuffer";
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reg = <0x0 0x9d400000 0x0 0x2400000>;
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width = <1080>;
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height = <1920>;
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stride = <(1080 * 4)>;
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format = "a8r8g8b8";
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/*
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* That's a lot of clocks, but it's necessary due
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* to unused clk cleanup & no panel driver yet..
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*/
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clocks = <&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>,
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<&mmcc MDSS_VSYNC_CLK>,
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<&mmcc MDSS_MDP_CLK>,
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<&mmcc MDSS_BYTE0_CLK>,
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<&mmcc MDSS_BYTE0_INTF_CLK>,
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<&mmcc MDSS_PCLK0_CLK>,
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<&mmcc MDSS_ESC0_CLK>;
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power-domains = <&mmcc MDSS_GDSC>;
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};
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};
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reserved-memory {
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/* Bootloader display framebuffer region */
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cont_splash_mem: memory@9d400000 {
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reg = <0x0 0x9d400000 0x0 0x2400000>;
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no-map;
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};
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/* For getting crash logs using Android downstream kernels */
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ramoops@ac000000 {
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compatible = "ramoops";
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reg = <0x0 0xac000000 0x0 0x200000>;
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console-size = <0x80000>;
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pmsg-size = <0x40000>;
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record-size = <0x8000>;
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ftrace-size = <0x20000>;
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};
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/*
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* The following memory regions on downstream are "dynamically allocated"
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* but given the same addresses every time. Hard code them as these addresses
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* are where the OnePlus signed firmware expects them to be.
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*/
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ipa_fws_region: ipa@f6800000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xf6800000 0x0 0x5000>;
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no-map;
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};
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zap_shader_region: gpu@f6900000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xf6900000 0x0 0x2000>;
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no-map;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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label = "Volume buttons";
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autorepeat;
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pinctrl-names = "default";
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pinctrl-0 = <&vol_keys_default>;
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button-vol-down {
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label = "Volume down";
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gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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debounce-interval = <15>;
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wakeup-source;
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};
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button-vol-up {
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label = "Volume up";
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gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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debounce-interval = <15>;
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wakeup-source;
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};
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};
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gpio-hall-sensor {
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compatible = "gpio-keys";
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label = "Hall effect sensor";
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pinctrl-names = "default";
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pinctrl-0 = <&hall_sensor_default>;
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event-hall-sensor {
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label = "Hall Effect Sensor";
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gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_SW>;
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linux,code = <SW_LID>;
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linux,can-disable;
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wakeup-source;
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};
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};
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vph_pwr: vph-pwr-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vph_pwr";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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/*
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* OnePlus' ADSP firmware requires 30 MiB in total, so increase the adsp_mem
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* region by 4 MiB to account for this while relocating the other now
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* conflicting memory nodes accordingly.
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*/
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&adsp_mem {
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reg = <0x0 0x8b200000 0x0 0x1e00000>;
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};
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&mpss_mem {
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reg = <0x0 0x8d000000 0x0 0x7000000>;
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};
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&venus_mem {
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reg = <0x0 0x94000000 0x0 0x500000>;
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};
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&mba_mem {
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reg = <0x0 0x94500000 0x0 0x200000>;
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};
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&slpi_mem {
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reg = <0x0 0x94700000 0x0 0xf00000>;
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};
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&ipa_fw_mem {
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reg = <0x0 0x95600000 0x0 0x10000>;
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};
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&ipa_gsi_mem {
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reg = <0x0 0x95610000 0x0 0x5000>;
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};
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&gpu_mem {
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reg = <0x0 0x95615000 0x0 0x100000>;
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};
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&wlan_msa_mem {
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reg = <0x0 0x95715000 0x0 0x100000>;
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};
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&blsp1_i2c5 {
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status = "okay";
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touchscreen@20 {
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compatible = "syna,rmi4-i2c";
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reg = <0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&tlmm>;
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interrupts = <125 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&ts_int_active &ts_reset_active>;
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vdd-supply = <&vreg_l28_3p0>;
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vio-supply = <&vreg_l6a_1p8>;
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syna,reset-delay-ms = <20>;
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syna,startup-delay-ms = <20>;
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rmi4-f01@1 {
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reg = <0x01>;
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syna,nosleep-mode = <1>;
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};
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rmi4_f12: rmi4-f12@12 {
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reg = <0x12>;
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syna,rezero-wait-ms = <20>;
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syna,sensor-type = <1>;
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touchscreen-x-mm = <68>;
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touchscreen-y-mm = <122>;
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};
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};
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};
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&blsp1_i2c6 {
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status = "okay";
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nfc@28 {
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compatible = "nxp,nxp-nci-i2c";
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reg = <0x28>;
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interrupt-parent = <&tlmm>;
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interrupts = <92 IRQ_TYPE_LEVEL_HIGH>;
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enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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};
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};
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&blsp1_uart3 {
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status = "okay";
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bluetooth {
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compatible = "qcom,wcn3990-bt";
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vddio-supply = <&vreg_s4a_1p8>;
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vddxo-supply = <&vreg_l7a_1p8>;
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vddrf-supply = <&vreg_l17a_1p3>;
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vddch0-supply = <&vreg_l25a_3p3>;
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max-speed = <3200000>;
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};
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};
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&blsp1_uart3_on {
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rx-pins {
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/delete-property/ bias-disable;
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/*
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* Configure a pull-up on 46 (RX). This is needed to
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* avoid garbage data when the TX pin of the Bluetooth
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* module is in tri-state (module powered off or not
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* driving the signal yet).
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*/
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bias-pull-up;
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};
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cts-pins {
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/delete-property/ bias-disable;
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/*
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* Configure a pull-down on 47 (CTS) to match the pull
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* of the Bluetooth module.
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*/
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bias-pull-down;
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};
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};
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&blsp2_uart1 {
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status = "okay";
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};
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&pm8005_regulators {
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/* VDD_GFX supply */
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pm8005_s1: s1 {
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regulator-min-microvolt = <524000>;
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regulator-max-microvolt = <1100000>;
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regulator-enable-ramp-delay = <500>;
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/* Hack until we rig up the gpu consumer */
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regulator-always-on;
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};
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};
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&pm8998_gpios {
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vol_keys_default: vol-keys-state {
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pins = "gpio5", "gpio6";
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function = "normal";
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bias-pull-up;
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input-enable;
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qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
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};
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};
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&pmi8998_rradc {
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status = "okay";
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};
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&qusb2phy {
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status = "okay";
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vdd-supply = <&vreg_l1a_0p875>;
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vdda-pll-supply = <&vreg_l12a_1p8>;
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vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
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};
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&rpm_requests {
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regulators-0 {
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compatible = "qcom,rpm-pm8998-regulators";
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vdd_s1-supply = <&vph_pwr>;
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vdd_s2-supply = <&vph_pwr>;
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vdd_s3-supply = <&vph_pwr>;
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vdd_s4-supply = <&vph_pwr>;
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vdd_s5-supply = <&vph_pwr>;
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vdd_s6-supply = <&vph_pwr>;
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vdd_s7-supply = <&vph_pwr>;
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vdd_s8-supply = <&vph_pwr>;
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vdd_s9-supply = <&vph_pwr>;
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vdd_s10-supply = <&vph_pwr>;
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vdd_s11-supply = <&vph_pwr>;
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vdd_s12-supply = <&vph_pwr>;
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vdd_s13-supply = <&vph_pwr>;
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vdd_l1_l27-supply = <&vreg_s7a_1p025>;
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vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
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vdd_l3_l11-supply = <&vreg_s7a_1p025>;
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vdd_l4_l5-supply = <&vreg_s7a_1p025>;
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vdd_l6-supply = <&vreg_s5a_2p04>;
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vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
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vdd_l9-supply = <&vreg_bob>;
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vdd_l10_l23_l25-supply = <&vreg_bob>;
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vdd_l13_l19_l21-supply = <&vreg_bob>;
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vdd_l16_l28-supply = <&vreg_bob>;
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vdd_l18_l22-supply = <&vreg_bob>;
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vdd_l20_l24-supply = <&vreg_bob>;
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vdd_l26-supply = <&vreg_s3a_1p35>;
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vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
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vreg_s3a_1p35: s3 {
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regulator-min-microvolt = <1352000>;
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regulator-max-microvolt = <1352000>;
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};
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vreg_s4a_1p8: s4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-allow-set-load;
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};
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vreg_s5a_2p04: s5 {
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regulator-min-microvolt = <1904000>;
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regulator-max-microvolt = <2040000>;
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};
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vreg_s7a_1p025: s7 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1028000>;
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};
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vreg_l1a_0p875: l1 {
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <880000>;
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};
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vreg_l2a_1p2: l2 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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vreg_l3a_1p0: l3 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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};
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vreg_l5a_0p8: l5 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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};
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|
||
|
|
vreg_l6a_1p8: l6 {
|
||
|
|
regulator-min-microvolt = <1808000>;
|
||
|
|
regulator-max-microvolt = <1808000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l7a_1p8: l7 {
|
||
|
|
regulator-min-microvolt = <1800000>;
|
||
|
|
regulator-max-microvolt = <1800000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l8a_1p2: l8 {
|
||
|
|
regulator-min-microvolt = <1200000>;
|
||
|
|
regulator-max-microvolt = <1200000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l9a_1p8: l9 {
|
||
|
|
regulator-min-microvolt = <1808000>;
|
||
|
|
regulator-max-microvolt = <2960000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l10a_1p8: l10 {
|
||
|
|
regulator-min-microvolt = <1808000>;
|
||
|
|
regulator-max-microvolt = <2960000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l11a_1p0: l11 {
|
||
|
|
regulator-min-microvolt = <1000000>;
|
||
|
|
regulator-max-microvolt = <1000000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l12a_1p8: l12 {
|
||
|
|
regulator-min-microvolt = <1800000>;
|
||
|
|
regulator-max-microvolt = <1800000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l13a_2p95: l13 {
|
||
|
|
regulator-min-microvolt = <1808000>;
|
||
|
|
regulator-max-microvolt = <2960000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l14a_1p88: l14 {
|
||
|
|
regulator-min-microvolt = <1880000>;
|
||
|
|
regulator-max-microvolt = <1880000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l15a_1p8: l15 {
|
||
|
|
regulator-min-microvolt = <1800000>;
|
||
|
|
regulator-max-microvolt = <1800000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l16a_2p7: l16 {
|
||
|
|
regulator-min-microvolt = <2704000>;
|
||
|
|
regulator-max-microvolt = <2704000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l17a_1p3: l17 {
|
||
|
|
regulator-min-microvolt = <1304000>;
|
||
|
|
regulator-max-microvolt = <1304000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l18a_2p7: l18 {
|
||
|
|
regulator-min-microvolt = <2704000>;
|
||
|
|
regulator-max-microvolt = <2704000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l19a_3p0: l19 {
|
||
|
|
regulator-min-microvolt = <3008000>;
|
||
|
|
regulator-max-microvolt = <3008000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l20a_2p95: l20 {
|
||
|
|
regulator-min-microvolt = <2960000>;
|
||
|
|
regulator-max-microvolt = <2960000>;
|
||
|
|
regulator-allow-set-load;
|
||
|
|
};
|
||
|
|
vreg_l21a_2p95: l21 {
|
||
|
|
regulator-min-microvolt = <2960000>;
|
||
|
|
regulator-max-microvolt = <2960000>;
|
||
|
|
regulator-system-load = <800000>;
|
||
|
|
regulator-allow-set-load;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l22a_2p85: l22 {
|
||
|
|
regulator-min-microvolt = <2864000>;
|
||
|
|
regulator-max-microvolt = <2864000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l23a_3p3: l23 {
|
||
|
|
regulator-min-microvolt = <3312000>;
|
||
|
|
regulator-max-microvolt = <3312000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l24a_3p075: l24 {
|
||
|
|
regulator-min-microvolt = <3088000>;
|
||
|
|
regulator-max-microvolt = <3088000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l25a_3p3: l25 {
|
||
|
|
regulator-min-microvolt = <3104000>;
|
||
|
|
regulator-max-microvolt = <3312000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l26a_1p2: l26 {
|
||
|
|
regulator-min-microvolt = <1200000>;
|
||
|
|
regulator-max-microvolt = <1200000>;
|
||
|
|
regulator-allow-set-load;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_l28_3p0: l28 {
|
||
|
|
regulator-min-microvolt = <3008000>;
|
||
|
|
regulator-max-microvolt = <3008000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vreg_lvs1a_1p8: lvs1 { };
|
||
|
|
vreg_lvs2a_1p8: lvs2 { };
|
||
|
|
};
|
||
|
|
|
||
|
|
regulators-1 {
|
||
|
|
compatible = "qcom,rpm-pmi8998-regulators";
|
||
|
|
|
||
|
|
vdd_bob-supply = <&vph_pwr>;
|
||
|
|
|
||
|
|
vreg_bob: bob {
|
||
|
|
regulator-min-microvolt = <3312000>;
|
||
|
|
regulator-max-microvolt = <3600000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&tlmm {
|
||
|
|
gpio-reserved-ranges = <0 4>, <81 4>;
|
||
|
|
|
||
|
|
hall_sensor_default: hall-sensor-default-state {
|
||
|
|
pins = "gpio124";
|
||
|
|
function = "gpio";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
|
||
|
|
ts_int_active: ts-int-active-state {
|
||
|
|
pins = "gpio125";
|
||
|
|
function = "gpio";
|
||
|
|
drive-strength = <8>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
|
||
|
|
ts_reset_active: ts-reset-active-state {
|
||
|
|
pins = "gpio89";
|
||
|
|
function = "gpio";
|
||
|
|
drive-strength = <8>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
|
||
|
|
nfc_int_active: nfc-int-active-state {
|
||
|
|
pins = "gpio92";
|
||
|
|
function = "gpio";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
|
||
|
|
nfc_enable_active: nfc-enable-active-state {
|
||
|
|
pins = "gpio12", "gpio116";
|
||
|
|
function = "gpio";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&ufshc {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
vcc-supply = <&vreg_l20a_2p95>;
|
||
|
|
vccq-supply = <&vreg_l26a_1p2>;
|
||
|
|
vccq2-supply = <&vreg_s4a_1p8>;
|
||
|
|
vcc-max-microamp = <750000>;
|
||
|
|
vccq-max-microamp = <560000>;
|
||
|
|
vccq2-max-microamp = <750000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&ufsphy {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
vdda-phy-supply = <&vreg_l1a_0p875>;
|
||
|
|
vdda-pll-supply = <&vreg_l2a_1p2>;
|
||
|
|
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb3 {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
/* Disable USB3 clock requirement as the device only supports USB2 */
|
||
|
|
qcom,select-utmi-as-pipe-clk;
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb3_dwc3 {
|
||
|
|
/* Drop the unused USB 3 PHY */
|
||
|
|
phys = <&qusb2phy>;
|
||
|
|
phy-names = "usb2-phy";
|
||
|
|
|
||
|
|
/* Fastest mode for USB 2 */
|
||
|
|
maximum-speed = "high-speed";
|
||
|
|
|
||
|
|
/* Force to peripheral until we can switch modes */
|
||
|
|
dr_mode = "peripheral";
|
||
|
|
};
|
||
|
|
|
||
|
|
&wifi {
|
||
|
|
/* Leave disabled until MSS is functional */
|
||
|
|
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
|
||
|
|
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
|
||
|
|
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
|
||
|
|
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
|
||
|
|
};
|