linux-zen-server/arch/arm64/boot/dts/renesas/salvator-common.dtsi

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2023-08-30 17:53:23 +02:00
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for common parts of Salvator-X board variants
*
* Copyright (C) 2015-2016 Renesas Electronics Corp.
*/
/*
* SSI-AK4613
*
* This command is required when Playback/Capture
*
* amixer set "DVC Out" 100%
* amixer set "DVC In" 100%
*
* You can use Mute
*
* amixer set "DVC Out Mute" on
* amixer set "DVC In Mute" on
*
* You can use Volume Ramp
*
* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
* amixer set "DVC Out Ramp" on
* aplay xxx.wav &
* amixer set "DVC Out" 80% // Volume Down
* amixer set "DVC Out" 100% // Volume Up
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
i2c7 = &i2c_dvfs;
serial0 = &scif2;
serial1 = &hscif1;
ethernet0 = &avb;
mmc0 = &sdhi2;
mmc1 = &sdhi0;
mmc2 = &sdhi3;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
audio_clkout: audio-clkout {
/*
* This is same as <&rcar_sound 0>
* but needed to avoid cs2000/rcar_sound probe dead-lock
*/
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 50000>;
brightness-levels = <256 128 64 16 8 4 0>;
default-brightness-level = <6>;
power-supply = <&reg_12v>;
enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
};
cvbs-in {
compatible = "composite-video-connector";
label = "CVBS IN";
port {
cvbs_con: endpoint {
remote-endpoint = <&adv7482_ain7>;
};
};
};
hdmi-in {
compatible = "hdmi-connector";
label = "HDMI IN";
type = "a";
port {
hdmi_in_con: endpoint {
remote-endpoint = <&adv7482_hdmi>;
};
};
};
hdmi0-out {
compatible = "hdmi-connector";
label = "HDMI0 OUT";
type = "a";
port {
hdmi0_con: endpoint {
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
};
};
hdmi1-out {
compatible = "hdmi-connector";
label = "HDMI1 OUT";
type = "a";
port {
hdmi1_con: endpoint {
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&keys_pins>;
pinctrl-names = "default";
key-1 {
gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "SW4-1";
wakeup-source;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "SW4-2";
wakeup-source;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW4-3";
wakeup-source;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "SW4-4";
wakeup-source;
debounce-interval = <20>;
};
key-a {
gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_A>;
label = "TSW0";
wakeup-source;
debounce-interval = <20>;
};
key-b {
gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_B>;
label = "TSW1";
wakeup-source;
debounce-interval = <20>;
};
key-c {
gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_C>;
label = "TSW2";
wakeup-source;
debounce-interval = <20>;
};
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_12v: regulator-12v {
compatible = "regulator-fixed";
regulator-name = "fixed-12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-boot-on;
regulator-always-on;
};
sound_card: sound {
compatible = "audio-graph-card";
label = "rcar-sound";
dais = <&rsnd_port0 /* ak4613 */
&rsnd_port1 /* HDMI0 */
#ifdef SOC_HAS_HDMI1
&rsnd_port2 /* HDMI1 */
#endif
>;
};
vbus0_usb2: regulator-vbus0-usb2 {
compatible = "regulator-fixed";
regulator-name = "USB20_VBUS0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
vcc_sdhi3: regulator-vcc-sdhi3 {
compatible = "regulator-fixed";
regulator-name = "SDHI3 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vccq_sdhi3: regulator-vccq-sdhi3 {
compatible = "regulator-gpio";
regulator-name = "SDHI3 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
vga {
compatible = "vga-connector";
port {
vga_in: endpoint {
remote-endpoint = <&adv7123_out>;
};
};
};
vga-encoder {
compatible = "adi,adv7123";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7123_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
};
x12_clk: x12 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
/* External DU dot clocks */
x21_clk: x21-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33000000>;
};
x22_clk: x22-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33000000>;
};
x23_clk: x23-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
&a57_0 {
cpu-supply = <&dvfs>;
};
&audio_clk_a {
clock-frequency = <22579200>;
};
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
tx-internal-delay-ps = <2000>;
status = "okay";
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
};
};
&csi20 {
status = "okay";
ports {
port@0 {
csi20_in: endpoint {
clock-lanes = <0>;
data-lanes = <1>;
remote-endpoint = <&adv7482_txb>;
};
};
};
};
&csi40 {
status = "okay";
ports {
port@0 {
csi40_in: endpoint {
clock-lanes = <0>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&adv7482_txa>;
};
};
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
ports {
port@0 {
du_out_rgb: endpoint {
remote-endpoint = <&adv7123_in>;
};
};
};
};
&ehci0 {
dr_mode = "otg";
status = "okay";
};
&ehci1 {
status = "okay";
};
&extalr_clk {
clock-frequency = <32768>;
};
&hdmi0 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi0_out: endpoint {
remote-endpoint = <&hdmi0_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi0_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint1>;
};
};
};
};
#ifdef SOC_HAS_HDMI1
&hdmi1 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi1_out: endpoint {
remote-endpoint = <&hdmi1_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi1_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint2>;
};
};
};
};
&hdmi1_con {
remote-endpoint = <&rcar_dw_hdmi1_out>;
};
#endif /* SOC_HAS_HDMI1 */
&hscif1 {
pinctrl-0 = <&hscif1_pins>;
pinctrl-names = "default";
uart-has-rtscts;
/* Please only enable hscif1 or scif1 */
status = "okay";
};
&hsusb {
dr_mode = "otg";
status = "okay";
};
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <100000>;
ak4613: codec@10 {
compatible = "asahi-kasei,ak4613";
#sound-dai-cells = <0>;
reg = <0x10>;
clocks = <&rcar_sound 3>;
asahi-kasei,in1-single-end;
asahi-kasei,in2-single-end;
asahi-kasei,out1-single-end;
asahi-kasei,out2-single-end;
asahi-kasei,out3-single-end;
asahi-kasei,out4-single-end;
asahi-kasei,out5-single-end;
asahi-kasei,out6-single-end;
port {
ak4613_endpoint: endpoint {
remote-endpoint = <&rsnd_endpoint0>;
};
};
};
cs2000: clk_multiplier@4f {
#clock-cells = <0>;
compatible = "cirrus,cs2000-cp";
reg = <0x4f>;
clocks = <&audio_clkout>, <&x12_clk>;
clock-names = "clk_in", "ref_clk";
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24576000>; /* 1/1 divide */
};
};
&i2c4 {
status = "okay";
pca9654: gpio@20 {
compatible = "onnn,pca9654";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
video-receiver@70 {
compatible = "adi,adv7482";
reg = <0x70 0x71 0x72 0x73 0x74 0x75
0x60 0x61 0x62 0x63 0x64 0x65>;
reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
"infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
interrupt-parent = <&gpio6>;
interrupt-names = "intrq1", "intrq2";
interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
<31 IRQ_TYPE_LEVEL_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@7 {
reg = <7>;
adv7482_ain7: endpoint {
remote-endpoint = <&cvbs_con>;
};
};
port@8 {
reg = <8>;
adv7482_hdmi: endpoint {
remote-endpoint = <&hdmi_in_con>;
};
};
port@a {
reg = <10>;
adv7482_txa: endpoint {
clock-lanes = <0>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&csi40_in>;
};
};
port@b {
reg = <11>;
adv7482_txb: endpoint {
clock-lanes = <0>;
data-lanes = <1>;
remote-endpoint = <&csi20_in>;
};
};
};
};
csa_vdd: adc@7c {
compatible = "maxim,max9611";
reg = <0x7c>;
shunt-resistor-micro-ohms = <5000>;
};
csa_dvfs: adc@7f {
compatible = "maxim,max9611";
reg = <0x7f>;
shunt-resistor-micro-ohms = <5000>;
};
};
&i2c_dvfs {
status = "okay";
clock-frequency = <400000>;
pmic: pmic@30 {
pinctrl-0 = <&irq0_pins>;
pinctrl-names = "default";
compatible = "rohm,bd9571mwv";
reg = <0x30>;
interrupt-parent = <&intc_ex>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
rohm,ddr-backup-power = <0xf>;
rohm,rstbmode-level;
regulators {
dvfs: dvfs {
regulator-name = "dvfs";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1030000>;
regulator-boot-on;
regulator-always-on;
};
};
};
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
pagesize = <8>;
};
};
&ohci0 {
dr_mode = "otg";
status = "okay";
};
&ohci1 {
status = "okay";
};
&pcie_bus_clk {
clock-frequency = <100000000>;
};
&pciec0 {
status = "okay";
};
&pciec1 {
status = "okay";
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
avb_pins: avb {
mux {
groups = "avb_link", "avb_mdio", "avb_mii";
function = "avb";
};
pins_mdio {
groups = "avb_mdio";
drive-strength = <24>;
};
pins_mii_tx {
pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
drive-strength = <12>;
};
};
du_pins: du {
groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
function = "du";
};
hscif1_pins: hscif1 {
groups = "hscif1_data_a", "hscif1_ctrl_a";
function = "hscif1";
};
i2c2_pins: i2c2 {
groups = "i2c2_a";
function = "i2c2";
};
irq0_pins: irq0 {
groups = "intc_ex_irq0";
function = "intc_ex";
};
keys_pins: keys {
pins = "GP_5_17", "GP_5_20", "GP_5_22";
bias-pull-up;
};
pwm1_pins: pwm1 {
groups = "pwm1_a";
function = "pwm1";
};
scif1_pins: scif1 {
groups = "scif1_data_a", "scif1_ctrl";
function = "scif1";
};
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
scif_clk_pins: scif_clk {
groups = "scif_clk_a";
function = "scif_clk";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sdhi2_pins: sd2 {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
function = "sdhi2";
power-source = <1800>;
};
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
power-source = <3300>;
};
sdhi3_pins_uhs: sd3_uhs {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
power-source = <1800>;
};
sound_pins: sound {
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
function = "ssi";
};
sound_clk_pins: sound_clk {
groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
"audio_clkout_a", "audio_clkout3_a";
function = "audio_clk";
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
};
usb1_pins: usb1 {
mux {
groups = "usb1";
function = "usb1";
};
ovc {
pins = "GP_6_27";
bias-pull-up;
};
pwen {
pins = "GP_6_26";
bias-pull-down;
};
};
usb30_pins: usb30 {
groups = "usb30";
function = "usb30";
};
};
&pwm1 {
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
status = "okay";
};
&rcar_sound {
pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
pinctrl-names = "default";
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <12288000 11289600>;
status = "okay";
/* update <audio_clk_b> to <cs2000> */
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&cs2000>,
<&audio_clk_c>,
<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
ports {
#address-cells = <1>;
#size-cells = <0>;
rsnd_port0: port@0 {
reg = <0>;
rsnd_endpoint0: endpoint {
remote-endpoint = <&ak4613_endpoint>;
dai-format = "left_j";
bitclock-master = <&rsnd_endpoint0>;
frame-master = <&rsnd_endpoint0>;
playback = <&ssi0>, <&src0>, <&dvc0>;
capture = <&ssi1>, <&src1>, <&dvc1>;
};
};
rsnd_port1: port@1 {
reg = <1>;
rsnd_endpoint1: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint1>;
frame-master = <&rsnd_endpoint1>;
playback = <&ssi2>;
};
};
#ifdef SOC_HAS_HDMI1
rsnd_port2: port@2 {
reg = <2>;
rsnd_endpoint2: endpoint {
remote-endpoint = <&dw_hdmi1_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint2>;
frame-master = <&rsnd_endpoint2>;
playback = <&ssi3>;
};
};
#endif /* SOC_HAS_HDMI1 */
};
};
&rpc {
/* Left disabled. To be enabled by firmware when unlocked. */
flash@0 {
compatible = "cypress,hyperflash", "cfi-flash";
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
bootparam@0 {
reg = <0x00000000 0x040000>;
read-only;
};
bl2@40000 {
reg = <0x00040000 0x140000>;
read-only;
};
cert_header_sa6@180000 {
reg = <0x00180000 0x040000>;
read-only;
};
bl31@1c0000 {
reg = <0x001c0000 0x040000>;
read-only;
};
tee@200000 {
reg = <0x00200000 0x440000>;
read-only;
};
uboot@640000 {
reg = <0x00640000 0x100000>;
read-only;
};
dtb@740000 {
reg = <0x00740000 0x080000>;
};
kernel@7c0000 {
reg = <0x007c0000 0x1400000>;
};
user@1bc0000 {
reg = <0x01bc0000 0x2440000>;
};
};
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
#ifdef SOC_HAS_SATA
&sata {
status = "okay";
};
#endif /* SOC_HAS_SATA */
&scif1 {
pinctrl-0 = <&scif1_pins>;
pinctrl-names = "default";
uart-has-rtscts;
/* Please only enable hscif1 or scif1 */
/* status = "okay"; */
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&sdhi2 {
/* used for on-board 8bit eMMC */
pinctrl-0 = <&sdhi2_pins>;
pinctrl-1 = <&sdhi2_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
no-sd;
no-sdio;
non-removable;
fixed-emmc-driver-type = <1>;
full-pwr-cycle-in-suspend;
status = "okay";
};
&sdhi3 {
pinctrl-0 = <&sdhi3_pins>;
pinctrl-1 = <&sdhi3_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi3>;
vqmmc-supply = <&vccq_sdhi3>;
cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&ssi1 {
shared-pin;
};
&usb_extal_clk {
clock-frequency = <50000000>;
};
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
vbus-supply = <&vbus0_usb2>;
status = "okay";
};
&usb2_phy1 {
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_peri0 {
phys = <&usb3_phy0>;
phy-names = "usb";
companion = <&xhci0>;
status = "okay";
};
&usb3_phy0 {
status = "okay";
};
&usb3s0_clk {
clock-frequency = <100000000>;
};
&vin0 {
status = "okay";
};
&vin1 {
status = "okay";
};
&vin2 {
status = "okay";
};
&vin3 {
status = "okay";
};
&vin4 {
status = "okay";
};
&vin5 {
status = "okay";
};
&vin6 {
status = "okay";
};
&vin7 {
status = "okay";
};
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";
status = "okay";
};
#ifdef SOC_HAS_USB2_CH2
&ehci2 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&pfc {
usb2_pins: usb2 {
groups = "usb2";
function = "usb2";
};
};
&usb2_phy2 {
pinctrl-0 = <&usb2_pins>;
pinctrl-names = "default";
status = "okay";
};
#endif /* SOC_HAS_USB2_CH2 */