224 lines
7.1 KiB
C
224 lines
7.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Based on Ocelot Linux port, which is
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* Copyright 2001 MontaVista Software Inc.
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* Author: jsun@mvista.com or jsun@junsun.net
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*
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* Copyright 2003 ICT CAS
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* Author: Michael Guo <guoyi@ict.ac.cn>
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*
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* Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* Copyright (C) 2009 Lemote Inc.
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* Author: Wu Zhangjin, wuzhangjin@gmail.com
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*/
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#include <linux/export.h>
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#include <linux/pci_ids.h>
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#include <asm/bootinfo.h>
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#include <loongson.h>
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#include <boot_param.h>
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#include <builtin_dtbs.h>
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#include <workarounds.h>
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#define HOST_BRIDGE_CONFIG_ADDR ((void __iomem *)TO_UNCAC(0x1a000000))
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u32 cpu_clock_freq;
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EXPORT_SYMBOL(cpu_clock_freq);
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struct efi_memory_map_loongson *loongson_memmap;
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struct loongson_system_configuration loongson_sysconf;
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struct board_devices *eboard;
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struct interface_info *einter;
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struct loongson_special_attribute *especial;
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u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
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u64 loongson_chiptemp[MAX_PACKAGES];
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u64 loongson_freqctrl[MAX_PACKAGES];
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unsigned long long smp_group[4];
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const char *get_system_type(void)
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{
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return "Generic Loongson64 System";
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}
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void __init prom_dtb_init_env(void)
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{
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if ((fw_arg2 < CKSEG0 || fw_arg2 > CKSEG1)
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&& (fw_arg2 < XKPHYS || fw_arg2 > XKSEG))
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loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin;
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else
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loongson_fdt_blob = (void *)fw_arg2;
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}
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void __init prom_lefi_init_env(void)
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{
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struct boot_params *boot_p;
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struct loongson_params *loongson_p;
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struct system_loongson *esys;
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struct efi_cpuinfo_loongson *ecpu;
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struct irq_source_routing_table *eirq_source;
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u32 id;
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u16 vendor;
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/* firmware arguments are initialized in head.S */
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boot_p = (struct boot_params *)fw_arg2;
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loongson_p = &(boot_p->efi.smbios.lp);
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esys = (struct system_loongson *)
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((u64)loongson_p + loongson_p->system_offset);
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ecpu = (struct efi_cpuinfo_loongson *)
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((u64)loongson_p + loongson_p->cpu_offset);
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eboard = (struct board_devices *)
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((u64)loongson_p + loongson_p->boarddev_table_offset);
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einter = (struct interface_info *)
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((u64)loongson_p + loongson_p->interface_offset);
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especial = (struct loongson_special_attribute *)
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((u64)loongson_p + loongson_p->special_offset);
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eirq_source = (struct irq_source_routing_table *)
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((u64)loongson_p + loongson_p->irq_offset);
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loongson_memmap = (struct efi_memory_map_loongson *)
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((u64)loongson_p + loongson_p->memory_offset);
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cpu_clock_freq = ecpu->cpu_clock_freq;
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loongson_sysconf.cputype = ecpu->cputype;
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switch (ecpu->cputype) {
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case Legacy_3A:
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case Loongson_3A:
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loongson_sysconf.cores_per_node = 4;
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loongson_sysconf.cores_per_package = 4;
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smp_group[0] = 0x900000003ff01000;
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smp_group[1] = 0x900010003ff01000;
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smp_group[2] = 0x900020003ff01000;
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smp_group[3] = 0x900030003ff01000;
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loongson_chipcfg[0] = 0x900000001fe00180;
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loongson_chipcfg[1] = 0x900010001fe00180;
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loongson_chipcfg[2] = 0x900020001fe00180;
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loongson_chipcfg[3] = 0x900030001fe00180;
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loongson_chiptemp[0] = 0x900000001fe0019c;
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loongson_chiptemp[1] = 0x900010001fe0019c;
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loongson_chiptemp[2] = 0x900020001fe0019c;
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loongson_chiptemp[3] = 0x900030001fe0019c;
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loongson_freqctrl[0] = 0x900000001fe001d0;
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loongson_freqctrl[1] = 0x900010001fe001d0;
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loongson_freqctrl[2] = 0x900020001fe001d0;
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loongson_freqctrl[3] = 0x900030001fe001d0;
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loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
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break;
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case Legacy_3B:
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case Loongson_3B:
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loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
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loongson_sysconf.cores_per_package = 8;
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smp_group[0] = 0x900000003ff01000;
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smp_group[1] = 0x900010003ff05000;
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smp_group[2] = 0x900020003ff09000;
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smp_group[3] = 0x900030003ff0d000;
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loongson_chipcfg[0] = 0x900000001fe00180;
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loongson_chipcfg[1] = 0x900020001fe00180;
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loongson_chipcfg[2] = 0x900040001fe00180;
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loongson_chipcfg[3] = 0x900060001fe00180;
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loongson_chiptemp[0] = 0x900000001fe0019c;
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loongson_chiptemp[1] = 0x900020001fe0019c;
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loongson_chiptemp[2] = 0x900040001fe0019c;
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loongson_chiptemp[3] = 0x900060001fe0019c;
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loongson_freqctrl[0] = 0x900000001fe001d0;
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loongson_freqctrl[1] = 0x900020001fe001d0;
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loongson_freqctrl[2] = 0x900040001fe001d0;
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loongson_freqctrl[3] = 0x900060001fe001d0;
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loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
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break;
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default:
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loongson_sysconf.cores_per_node = 1;
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loongson_sysconf.cores_per_package = 1;
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loongson_chipcfg[0] = 0x900000001fe00180;
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}
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loongson_sysconf.nr_cpus = ecpu->nr_cpus;
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loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
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loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
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if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
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loongson_sysconf.nr_cpus = NR_CPUS;
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loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
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loongson_sysconf.cores_per_node - 1) /
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loongson_sysconf.cores_per_node;
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loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
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if (loongson_sysconf.dma_mask_bits < 32 ||
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loongson_sysconf.dma_mask_bits > 64)
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loongson_sysconf.dma_mask_bits = 32;
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loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
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loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
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loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
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loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
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pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
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loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
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loongson_sysconf.vgabios_addr);
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loongson_sysconf.workarounds |= esys->workarounds;
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pr_info("CpuClock = %u\n", cpu_clock_freq);
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/* Read the ID of PCI host bridge to detect bridge type */
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id = readl(HOST_BRIDGE_CONFIG_ADDR);
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vendor = id & 0xffff;
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switch (vendor) {
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case PCI_VENDOR_ID_LOONGSON:
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pr_info("The bridge chip is LS7A\n");
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loongson_sysconf.bridgetype = LS7A;
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loongson_sysconf.early_config = ls7a_early_config;
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break;
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case PCI_VENDOR_ID_AMD:
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case PCI_VENDOR_ID_ATI:
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pr_info("The bridge chip is RS780E or SR5690\n");
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loongson_sysconf.bridgetype = RS780E;
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loongson_sysconf.early_config = rs780e_early_config;
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break;
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default:
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pr_info("The bridge chip is VIRTUAL\n");
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loongson_sysconf.bridgetype = VIRTUAL;
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loongson_sysconf.early_config = virtual_early_config;
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loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin;
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break;
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}
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if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
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switch (read_c0_prid() & PRID_REV_MASK) {
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case PRID_REV_LOONGSON3A_R1:
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case PRID_REV_LOONGSON3A_R2_0:
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case PRID_REV_LOONGSON3A_R2_1:
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case PRID_REV_LOONGSON3A_R3_0:
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case PRID_REV_LOONGSON3A_R3_1:
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switch (loongson_sysconf.bridgetype) {
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case LS7A:
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loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin;
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break;
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case RS780E:
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loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
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break;
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default:
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break;
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}
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break;
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case PRID_REV_LOONGSON3B_R1:
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case PRID_REV_LOONGSON3B_R2:
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if (loongson_sysconf.bridgetype == RS780E)
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loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
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break;
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default:
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break;
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}
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} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
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if (loongson_sysconf.bridgetype == LS7A)
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loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;
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}
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if (!loongson_fdt_blob)
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pr_err("Failed to determine built-in Loongson64 dtb\n");
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}
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