299 lines
6.2 KiB
C
299 lines
6.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Macro used to simplify coding multi-line assembler.
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* Some of the bit test macro can simplify down to one line
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* depending on the mask value.
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*
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* Copyright (C) 2004 Microtronix Datacom Ltd.
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*
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* All rights reserved.
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*/
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#ifndef _ASM_NIOS2_ASMMACROS_H
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#define _ASM_NIOS2_ASMMACROS_H
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/*
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* ANDs reg2 with mask and places the result in reg1.
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*
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* You cannnot use the same register for reg1 & reg2.
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*/
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.macro ANDI32 reg1, reg2, mask
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.if \mask & 0xffff
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.if \mask & 0xffff0000
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movhi \reg1, %hi(\mask)
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movui \reg1, %lo(\mask)
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and \reg1, \reg1, \reg2
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.else
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andi \reg1, \reg2, %lo(\mask)
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.endif
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.else
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andhi \reg1, \reg2, %hi(\mask)
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.endif
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.endm
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/*
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* ORs reg2 with mask and places the result in reg1.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro ORI32 reg1, reg2, mask
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.if \mask & 0xffff
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.if \mask & 0xffff0000
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orhi \reg1, \reg2, %hi(\mask)
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ori \reg1, \reg2, %lo(\mask)
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.else
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ori \reg1, \reg2, %lo(\mask)
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.endif
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.else
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orhi \reg1, \reg2, %hi(\mask)
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.endif
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.endm
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/*
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* XORs reg2 with mask and places the result in reg1.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro XORI32 reg1, reg2, mask
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.if \mask & 0xffff
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.if \mask & 0xffff0000
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xorhi \reg1, \reg2, %hi(\mask)
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xori \reg1, \reg1, %lo(\mask)
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.else
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xori \reg1, \reg2, %lo(\mask)
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.endif
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.else
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xorhi \reg1, \reg2, %hi(\mask)
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.endif
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.endm
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/*
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* This is a support macro for BTBZ & BTBNZ. It checks
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* the bit to make sure it is valid 32 value.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro BT reg1, reg2, bit
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.if \bit > 31
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.err
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.else
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.if \bit < 16
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andi \reg1, \reg2, (1 << \bit)
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.else
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andhi \reg1, \reg2, (1 << (\bit - 16))
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.endif
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.endif
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.endm
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/*
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* Tests the bit in reg2 and branches to label if the
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* bit is zero. The result of the bit test is stored in reg1.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro BTBZ reg1, reg2, bit, label
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BT \reg1, \reg2, \bit
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beq \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and branches to label if the
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* bit is non-zero. The result of the bit test is stored in reg1.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro BTBNZ reg1, reg2, bit, label
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BT \reg1, \reg2, \bit
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bne \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and then compliments the bit in reg2.
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* The result of the bit test is stored in reg1.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTC reg1, reg2, bit
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.if \bit > 31
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.err
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.else
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.if \bit < 16
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andi \reg1, \reg2, (1 << \bit)
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xori \reg2, \reg2, (1 << \bit)
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.else
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andhi \reg1, \reg2, (1 << (\bit - 16))
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xorhi \reg2, \reg2, (1 << (\bit - 16))
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.endif
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.endif
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.endm
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/*
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* Tests the bit in reg2 and then sets the bit in reg2.
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* The result of the bit test is stored in reg1.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTS reg1, reg2, bit
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.if \bit > 31
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.err
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.else
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.if \bit < 16
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andi \reg1, \reg2, (1 << \bit)
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ori \reg2, \reg2, (1 << \bit)
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.else
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andhi \reg1, \reg2, (1 << (\bit - 16))
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orhi \reg2, \reg2, (1 << (\bit - 16))
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.endif
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.endif
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.endm
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/*
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* Tests the bit in reg2 and then resets the bit in reg2.
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* The result of the bit test is stored in reg1.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTR reg1, reg2, bit
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.if \bit > 31
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.err
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.else
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.if \bit < 16
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andi \reg1, \reg2, (1 << \bit)
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andi \reg2, \reg2, %lo(~(1 << \bit))
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.else
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andhi \reg1, \reg2, (1 << (\bit - 16))
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andhi \reg2, \reg2, %lo(~(1 << (\bit - 16)))
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.endif
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.endif
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.endm
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/*
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* Tests the bit in reg2 and then compliments the bit in reg2.
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* The result of the bit test is stored in reg1. If the
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* original bit was zero it branches to label.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTCBZ reg1, reg2, bit, label
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BTC \reg1, \reg2, \bit
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beq \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and then compliments the bit in reg2.
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* The result of the bit test is stored in reg1. If the
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* original bit was non-zero it branches to label.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTCBNZ reg1, reg2, bit, label
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BTC \reg1, \reg2, \bit
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bne \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and then sets the bit in reg2.
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* The result of the bit test is stored in reg1. If the
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* original bit was zero it branches to label.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTSBZ reg1, reg2, bit, label
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BTS \reg1, \reg2, \bit
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beq \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and then sets the bit in reg2.
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* The result of the bit test is stored in reg1. If the
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* original bit was non-zero it branches to label.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTSBNZ reg1, reg2, bit, label
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BTS \reg1, \reg2, \bit
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bne \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and then resets the bit in reg2.
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* The result of the bit test is stored in reg1. If the
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* original bit was zero it branches to label.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTRBZ reg1, reg2, bit, label
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BTR \reg1, \reg2, \bit
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bne \reg1, r0, \label
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.endm
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/*
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* Tests the bit in reg2 and then resets the bit in reg2.
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* The result of the bit test is stored in reg1. If the
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* original bit was non-zero it branches to label.
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*
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* It is NOT safe to use the same register for reg1 & reg2.
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*/
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.macro BTRBNZ reg1, reg2, bit, label
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BTR \reg1, \reg2, \bit
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bne \reg1, r0, \label
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.endm
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/*
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* Tests the bits in mask against reg2 stores the result in reg1.
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* If the all the bits in the mask are zero it branches to label.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro TSTBZ reg1, reg2, mask, label
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ANDI32 \reg1, \reg2, \mask
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beq \reg1, r0, \label
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.endm
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/*
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* Tests the bits in mask against reg2 stores the result in reg1.
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* If the any of the bits in the mask are 1 it branches to label.
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*
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* It is safe to use the same register for reg1 & reg2.
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*/
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.macro TSTBNZ reg1, reg2, mask, label
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ANDI32 \reg1, \reg2, \mask
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bne \reg1, r0, \label
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.endm
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/*
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* Pushes reg onto the stack.
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*/
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.macro PUSH reg
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addi sp, sp, -4
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stw \reg, 0(sp)
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.endm
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/*
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* Pops the top of the stack into reg.
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*/
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.macro POP reg
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ldw \reg, 0(sp)
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addi sp, sp, 4
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.endm
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#endif /* _ASM_NIOS2_ASMMACROS_H */
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