552 lines
12 KiB
C
552 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* iomap.c - Implement iomap interface for PA-RISC
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* Copyright (c) 2004 Matthew Wilcox
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*/
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/export.h>
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#include <asm/io.h>
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/*
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* The iomap space on 32-bit PA-RISC is intended to look like this:
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* 00000000-7fffffff virtual mapped IO
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* 80000000-8fffffff ISA/EISA port space that can't be virtually mapped
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* 90000000-9fffffff Dino port space
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* a0000000-afffffff Astro port space
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* b0000000-bfffffff PAT port space
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* c0000000-cfffffff non-swapped memory IO
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* f0000000-ffffffff legacy IO memory pointers
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*
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* For the moment, here's what it looks like:
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* 80000000-8fffffff All ISA/EISA port space
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* f0000000-ffffffff legacy IO memory pointers
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*
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* On 64-bit, everything is extended, so:
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* 8000000000000000-8fffffffffffffff All ISA/EISA port space
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* f000000000000000-ffffffffffffffff legacy IO memory pointers
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*/
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/*
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* Technically, this should be 'if (VMALLOC_START < addr < VMALLOC_END),
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* but that's slow and we know it'll be within the first 2GB.
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*/
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#ifdef CONFIG_64BIT
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#define INDIRECT_ADDR(addr) (((unsigned long)(addr) & 1UL<<63) != 0)
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#define ADDR_TO_REGION(addr) (((unsigned long)addr >> 60) & 7)
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#define IOPORT_MAP_BASE (8UL << 60)
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#else
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#define INDIRECT_ADDR(addr) (((unsigned long)(addr) & 1UL<<31) != 0)
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#define ADDR_TO_REGION(addr) (((unsigned long)addr >> 28) & 7)
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#define IOPORT_MAP_BASE (8UL << 28)
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#endif
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struct iomap_ops {
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unsigned int (*read8)(const void __iomem *);
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unsigned int (*read16)(const void __iomem *);
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unsigned int (*read16be)(const void __iomem *);
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unsigned int (*read32)(const void __iomem *);
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unsigned int (*read32be)(const void __iomem *);
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#ifdef CONFIG_64BIT
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u64 (*read64)(const void __iomem *);
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u64 (*read64be)(const void __iomem *);
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#endif
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void (*write8)(u8, void __iomem *);
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void (*write16)(u16, void __iomem *);
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void (*write16be)(u16, void __iomem *);
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void (*write32)(u32, void __iomem *);
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void (*write32be)(u32, void __iomem *);
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#ifdef CONFIG_64BIT
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void (*write64)(u64, void __iomem *);
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void (*write64be)(u64, void __iomem *);
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#endif
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void (*read8r)(const void __iomem *, void *, unsigned long);
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void (*read16r)(const void __iomem *, void *, unsigned long);
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void (*read32r)(const void __iomem *, void *, unsigned long);
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void (*write8r)(void __iomem *, const void *, unsigned long);
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void (*write16r)(void __iomem *, const void *, unsigned long);
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void (*write32r)(void __iomem *, const void *, unsigned long);
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};
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/* Generic ioport ops. To be replaced later by specific dino/elroy/wax code */
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#define ADDR2PORT(addr) ((unsigned long __force)(addr) & 0xffffff)
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static unsigned int ioport_read8(const void __iomem *addr)
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{
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return inb(ADDR2PORT(addr));
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}
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static unsigned int ioport_read16(const void __iomem *addr)
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{
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return inw(ADDR2PORT(addr));
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}
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static unsigned int ioport_read32(const void __iomem *addr)
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{
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return inl(ADDR2PORT(addr));
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}
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static void ioport_write8(u8 datum, void __iomem *addr)
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{
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outb(datum, ADDR2PORT(addr));
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}
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static void ioport_write16(u16 datum, void __iomem *addr)
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{
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outw(datum, ADDR2PORT(addr));
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}
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static void ioport_write32(u32 datum, void __iomem *addr)
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{
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outl(datum, ADDR2PORT(addr));
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}
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static void ioport_read8r(const void __iomem *addr, void *dst, unsigned long count)
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{
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insb(ADDR2PORT(addr), dst, count);
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}
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static void ioport_read16r(const void __iomem *addr, void *dst, unsigned long count)
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{
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insw(ADDR2PORT(addr), dst, count);
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}
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static void ioport_read32r(const void __iomem *addr, void *dst, unsigned long count)
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{
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insl(ADDR2PORT(addr), dst, count);
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}
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static void ioport_write8r(void __iomem *addr, const void *s, unsigned long n)
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{
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outsb(ADDR2PORT(addr), s, n);
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}
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static void ioport_write16r(void __iomem *addr, const void *s, unsigned long n)
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{
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outsw(ADDR2PORT(addr), s, n);
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}
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static void ioport_write32r(void __iomem *addr, const void *s, unsigned long n)
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{
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outsl(ADDR2PORT(addr), s, n);
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}
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static const struct iomap_ops ioport_ops = {
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.read8 = ioport_read8,
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.read16 = ioport_read16,
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.read16be = ioport_read16,
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.read32 = ioport_read32,
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.read32be = ioport_read32,
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.write8 = ioport_write8,
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.write16 = ioport_write16,
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.write16be = ioport_write16,
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.write32 = ioport_write32,
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.write32be = ioport_write32,
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.read8r = ioport_read8r,
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.read16r = ioport_read16r,
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.read32r = ioport_read32r,
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.write8r = ioport_write8r,
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.write16r = ioport_write16r,
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.write32r = ioport_write32r,
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};
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/* Legacy I/O memory ops */
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static unsigned int iomem_read8(const void __iomem *addr)
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{
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return readb(addr);
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}
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static unsigned int iomem_read16(const void __iomem *addr)
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{
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return readw(addr);
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}
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static unsigned int iomem_read16be(const void __iomem *addr)
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{
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return __raw_readw(addr);
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}
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static unsigned int iomem_read32(const void __iomem *addr)
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{
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return readl(addr);
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}
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static unsigned int iomem_read32be(const void __iomem *addr)
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{
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return __raw_readl(addr);
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}
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#ifdef CONFIG_64BIT
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static u64 iomem_read64(const void __iomem *addr)
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{
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return readq(addr);
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}
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static u64 iomem_read64be(const void __iomem *addr)
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{
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return __raw_readq(addr);
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}
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#endif
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static void iomem_write8(u8 datum, void __iomem *addr)
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{
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writeb(datum, addr);
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}
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static void iomem_write16(u16 datum, void __iomem *addr)
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{
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writew(datum, addr);
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}
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static void iomem_write16be(u16 datum, void __iomem *addr)
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{
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__raw_writew(datum, addr);
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}
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static void iomem_write32(u32 datum, void __iomem *addr)
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{
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writel(datum, addr);
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}
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static void iomem_write32be(u32 datum, void __iomem *addr)
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{
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__raw_writel(datum, addr);
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}
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#ifdef CONFIG_64BIT
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static void iomem_write64(u64 datum, void __iomem *addr)
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{
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writeq(datum, addr);
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}
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static void iomem_write64be(u64 datum, void __iomem *addr)
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{
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__raw_writeq(datum, addr);
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}
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#endif
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static void iomem_read8r(const void __iomem *addr, void *dst, unsigned long count)
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{
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while (count--) {
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*(u8 *)dst = __raw_readb(addr);
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dst++;
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}
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}
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static void iomem_read16r(const void __iomem *addr, void *dst, unsigned long count)
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{
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while (count--) {
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*(u16 *)dst = __raw_readw(addr);
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dst += 2;
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}
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}
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static void iomem_read32r(const void __iomem *addr, void *dst, unsigned long count)
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{
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while (count--) {
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*(u32 *)dst = __raw_readl(addr);
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dst += 4;
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}
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}
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static void iomem_write8r(void __iomem *addr, const void *s, unsigned long n)
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{
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while (n--) {
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__raw_writeb(*(u8 *)s, addr);
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s++;
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}
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}
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static void iomem_write16r(void __iomem *addr, const void *s, unsigned long n)
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{
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while (n--) {
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__raw_writew(*(u16 *)s, addr);
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s += 2;
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}
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}
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static void iomem_write32r(void __iomem *addr, const void *s, unsigned long n)
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{
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while (n--) {
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__raw_writel(*(u32 *)s, addr);
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s += 4;
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}
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}
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static const struct iomap_ops iomem_ops = {
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.read8 = iomem_read8,
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.read16 = iomem_read16,
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.read16be = iomem_read16be,
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.read32 = iomem_read32,
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.read32be = iomem_read32be,
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#ifdef CONFIG_64BIT
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.read64 = iomem_read64,
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.read64be = iomem_read64be,
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#endif
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.write8 = iomem_write8,
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.write16 = iomem_write16,
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.write16be = iomem_write16be,
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.write32 = iomem_write32,
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.write32be = iomem_write32be,
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#ifdef CONFIG_64BIT
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.write64 = iomem_write64,
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.write64be = iomem_write64be,
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#endif
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.read8r = iomem_read8r,
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.read16r = iomem_read16r,
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.read32r = iomem_read32r,
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.write8r = iomem_write8r,
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.write16r = iomem_write16r,
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.write32r = iomem_write32r,
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};
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static const struct iomap_ops *iomap_ops[8] = {
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[0] = &ioport_ops,
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[7] = &iomem_ops
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};
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unsigned int ioread8(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read8(addr);
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return *((u8 *)addr);
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}
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unsigned int ioread16(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read16(addr);
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return le16_to_cpup((u16 *)addr);
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}
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unsigned int ioread16be(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read16be(addr);
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return *((u16 *)addr);
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}
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unsigned int ioread32(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read32(addr);
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return le32_to_cpup((u32 *)addr);
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}
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unsigned int ioread32be(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read32be(addr);
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return *((u32 *)addr);
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}
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#ifdef CONFIG_64BIT
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u64 ioread64(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read64(addr);
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return le64_to_cpup((u64 *)addr);
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}
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u64 ioread64be(const void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read64be(addr);
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return *((u64 *)addr);
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}
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#endif
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void iowrite8(u8 datum, void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write8(datum, addr);
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} else {
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*((u8 *)addr) = datum;
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}
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}
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void iowrite16(u16 datum, void __iomem *addr)
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{
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||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write16(datum, addr);
|
||
|
|
} else {
|
||
|
|
*((u16 *)addr) = cpu_to_le16(datum);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite16be(u16 datum, void __iomem *addr)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write16be(datum, addr);
|
||
|
|
} else {
|
||
|
|
*((u16 *)addr) = datum;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite32(u32 datum, void __iomem *addr)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write32(datum, addr);
|
||
|
|
} else {
|
||
|
|
*((u32 *)addr) = cpu_to_le32(datum);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite32be(u32 datum, void __iomem *addr)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write32be(datum, addr);
|
||
|
|
} else {
|
||
|
|
*((u32 *)addr) = datum;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef CONFIG_64BIT
|
||
|
|
void iowrite64(u64 datum, void __iomem *addr)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write64(datum, addr);
|
||
|
|
} else {
|
||
|
|
*((u64 *)addr) = cpu_to_le64(datum);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite64be(u64 datum, void __iomem *addr)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write64be(datum, addr);
|
||
|
|
} else {
|
||
|
|
*((u64 *)addr) = datum;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Repeating interfaces */
|
||
|
|
|
||
|
|
void ioread8_rep(const void __iomem *addr, void *dst, unsigned long count)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->read8r(addr, dst, count);
|
||
|
|
} else {
|
||
|
|
while (count--) {
|
||
|
|
*(u8 *)dst = *(u8 *)addr;
|
||
|
|
dst++;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void ioread16_rep(const void __iomem *addr, void *dst, unsigned long count)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->read16r(addr, dst, count);
|
||
|
|
} else {
|
||
|
|
while (count--) {
|
||
|
|
*(u16 *)dst = *(u16 *)addr;
|
||
|
|
dst += 2;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void ioread32_rep(const void __iomem *addr, void *dst, unsigned long count)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->read32r(addr, dst, count);
|
||
|
|
} else {
|
||
|
|
while (count--) {
|
||
|
|
*(u32 *)dst = *(u32 *)addr;
|
||
|
|
dst += 4;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write8r(addr, src, count);
|
||
|
|
} else {
|
||
|
|
while (count--) {
|
||
|
|
*(u8 *)addr = *(u8 *)src;
|
||
|
|
src++;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write16r(addr, src, count);
|
||
|
|
} else {
|
||
|
|
while (count--) {
|
||
|
|
*(u16 *)addr = *(u16 *)src;
|
||
|
|
src += 2;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
|
||
|
|
{
|
||
|
|
if (unlikely(INDIRECT_ADDR(addr))) {
|
||
|
|
iomap_ops[ADDR_TO_REGION(addr)]->write32r(addr, src, count);
|
||
|
|
} else {
|
||
|
|
while (count--) {
|
||
|
|
*(u32 *)addr = *(u32 *)src;
|
||
|
|
src += 4;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Mapping interfaces */
|
||
|
|
|
||
|
|
void __iomem *ioport_map(unsigned long port, unsigned int nr)
|
||
|
|
{
|
||
|
|
return (void __iomem *)(IOPORT_MAP_BASE | port);
|
||
|
|
}
|
||
|
|
|
||
|
|
void ioport_unmap(void __iomem *addr)
|
||
|
|
{
|
||
|
|
if (!INDIRECT_ADDR(addr)) {
|
||
|
|
iounmap(addr);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef CONFIG_PCI
|
||
|
|
void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
|
||
|
|
{
|
||
|
|
if (!INDIRECT_ADDR(addr)) {
|
||
|
|
iounmap(addr);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(pci_iounmap);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
EXPORT_SYMBOL(ioread8);
|
||
|
|
EXPORT_SYMBOL(ioread16);
|
||
|
|
EXPORT_SYMBOL(ioread16be);
|
||
|
|
EXPORT_SYMBOL(ioread32);
|
||
|
|
EXPORT_SYMBOL(ioread32be);
|
||
|
|
#ifdef CONFIG_64BIT
|
||
|
|
EXPORT_SYMBOL(ioread64);
|
||
|
|
EXPORT_SYMBOL(ioread64be);
|
||
|
|
#endif
|
||
|
|
EXPORT_SYMBOL(iowrite8);
|
||
|
|
EXPORT_SYMBOL(iowrite16);
|
||
|
|
EXPORT_SYMBOL(iowrite16be);
|
||
|
|
EXPORT_SYMBOL(iowrite32);
|
||
|
|
EXPORT_SYMBOL(iowrite32be);
|
||
|
|
#ifdef CONFIG_64BIT
|
||
|
|
EXPORT_SYMBOL(iowrite64);
|
||
|
|
EXPORT_SYMBOL(iowrite64be);
|
||
|
|
#endif
|
||
|
|
EXPORT_SYMBOL(ioread8_rep);
|
||
|
|
EXPORT_SYMBOL(ioread16_rep);
|
||
|
|
EXPORT_SYMBOL(ioread32_rep);
|
||
|
|
EXPORT_SYMBOL(iowrite8_rep);
|
||
|
|
EXPORT_SYMBOL(iowrite16_rep);
|
||
|
|
EXPORT_SYMBOL(iowrite32_rep);
|
||
|
|
EXPORT_SYMBOL(ioport_map);
|
||
|
|
EXPORT_SYMBOL(ioport_unmap);
|