167 lines
4.1 KiB
ArmAsm
167 lines
4.1 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0 */
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/* atomic.S: These things are too big to do inline.
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*
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* Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net)
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*/
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#include <linux/linkage.h>
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#include <asm/asi.h>
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#include <asm/backoff.h>
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#include <asm/export.h>
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.text
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/* Three versions of the atomic routines, one that
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* does not return a value and does not perform
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* memory barriers, and a two which return
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* a value, the new and old value resp. and does the
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* barriers.
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*/
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#define ATOMIC_OP(op) \
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ENTRY(arch_atomic_##op) /* %o0 = increment, %o1 = atomic_ptr */ \
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BACKOFF_SETUP(%o2); \
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1: lduw [%o1], %g1; \
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op %g1, %o0, %g7; \
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cas [%o1], %g1, %g7; \
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cmp %g1, %g7; \
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bne,pn %icc, BACKOFF_LABEL(2f, 1b); \
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nop; \
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retl; \
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nop; \
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2: BACKOFF_SPIN(%o2, %o3, 1b); \
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ENDPROC(arch_atomic_##op); \
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EXPORT_SYMBOL(arch_atomic_##op);
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#define ATOMIC_OP_RETURN(op) \
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ENTRY(arch_atomic_##op##_return) /* %o0 = increment, %o1 = atomic_ptr */\
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BACKOFF_SETUP(%o2); \
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1: lduw [%o1], %g1; \
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op %g1, %o0, %g7; \
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cas [%o1], %g1, %g7; \
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cmp %g1, %g7; \
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bne,pn %icc, BACKOFF_LABEL(2f, 1b); \
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op %g1, %o0, %g1; \
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retl; \
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sra %g1, 0, %o0; \
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2: BACKOFF_SPIN(%o2, %o3, 1b); \
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ENDPROC(arch_atomic_##op##_return); \
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EXPORT_SYMBOL(arch_atomic_##op##_return);
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#define ATOMIC_FETCH_OP(op) \
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ENTRY(arch_atomic_fetch_##op) /* %o0 = increment, %o1 = atomic_ptr */ \
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BACKOFF_SETUP(%o2); \
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1: lduw [%o1], %g1; \
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op %g1, %o0, %g7; \
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cas [%o1], %g1, %g7; \
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cmp %g1, %g7; \
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bne,pn %icc, BACKOFF_LABEL(2f, 1b); \
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nop; \
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retl; \
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sra %g1, 0, %o0; \
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2: BACKOFF_SPIN(%o2, %o3, 1b); \
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ENDPROC(arch_atomic_fetch_##op); \
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EXPORT_SYMBOL(arch_atomic_fetch_##op);
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ATOMIC_OP(add)
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ATOMIC_OP_RETURN(add)
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ATOMIC_FETCH_OP(add)
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ATOMIC_OP(sub)
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ATOMIC_OP_RETURN(sub)
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ATOMIC_FETCH_OP(sub)
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ATOMIC_OP(and)
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ATOMIC_FETCH_OP(and)
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ATOMIC_OP(or)
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ATOMIC_FETCH_OP(or)
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ATOMIC_OP(xor)
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ATOMIC_FETCH_OP(xor)
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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#define ATOMIC64_OP(op) \
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ENTRY(arch_atomic64_##op) /* %o0 = increment, %o1 = atomic_ptr */ \
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BACKOFF_SETUP(%o2); \
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1: ldx [%o1], %g1; \
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op %g1, %o0, %g7; \
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casx [%o1], %g1, %g7; \
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cmp %g1, %g7; \
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bne,pn %xcc, BACKOFF_LABEL(2f, 1b); \
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nop; \
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retl; \
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nop; \
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2: BACKOFF_SPIN(%o2, %o3, 1b); \
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ENDPROC(arch_atomic64_##op); \
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EXPORT_SYMBOL(arch_atomic64_##op);
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#define ATOMIC64_OP_RETURN(op) \
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ENTRY(arch_atomic64_##op##_return) /* %o0 = increment, %o1 = atomic_ptr */ \
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BACKOFF_SETUP(%o2); \
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1: ldx [%o1], %g1; \
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op %g1, %o0, %g7; \
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casx [%o1], %g1, %g7; \
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cmp %g1, %g7; \
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bne,pn %xcc, BACKOFF_LABEL(2f, 1b); \
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nop; \
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retl; \
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op %g1, %o0, %o0; \
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2: BACKOFF_SPIN(%o2, %o3, 1b); \
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ENDPROC(arch_atomic64_##op##_return); \
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EXPORT_SYMBOL(arch_atomic64_##op##_return);
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#define ATOMIC64_FETCH_OP(op) \
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ENTRY(arch_atomic64_fetch_##op) /* %o0 = increment, %o1 = atomic_ptr */ \
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BACKOFF_SETUP(%o2); \
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1: ldx [%o1], %g1; \
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op %g1, %o0, %g7; \
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casx [%o1], %g1, %g7; \
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cmp %g1, %g7; \
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bne,pn %xcc, BACKOFF_LABEL(2f, 1b); \
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nop; \
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retl; \
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mov %g1, %o0; \
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2: BACKOFF_SPIN(%o2, %o3, 1b); \
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ENDPROC(arch_atomic64_fetch_##op); \
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EXPORT_SYMBOL(arch_atomic64_fetch_##op);
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ATOMIC64_OP(add)
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ATOMIC64_OP_RETURN(add)
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ATOMIC64_FETCH_OP(add)
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ATOMIC64_OP(sub)
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ATOMIC64_OP_RETURN(sub)
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ATOMIC64_FETCH_OP(sub)
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ATOMIC64_OP(and)
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ATOMIC64_FETCH_OP(and)
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ATOMIC64_OP(or)
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ATOMIC64_FETCH_OP(or)
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ATOMIC64_OP(xor)
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ATOMIC64_FETCH_OP(xor)
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#undef ATOMIC64_FETCH_OP
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#undef ATOMIC64_OP_RETURN
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#undef ATOMIC64_OP
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ENTRY(arch_atomic64_dec_if_positive) /* %o0 = atomic_ptr */
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BACKOFF_SETUP(%o2)
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1: ldx [%o0], %g1
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brlez,pn %g1, 3f
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sub %g1, 1, %g7
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casx [%o0], %g1, %g7
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cmp %g1, %g7
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bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
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nop
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3: retl
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sub %g1, 1, %o0
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2: BACKOFF_SPIN(%o2, %o3, 1b)
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ENDPROC(arch_atomic64_dec_if_positive)
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EXPORT_SYMBOL(arch_atomic64_dec_if_positive)
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