851 lines
22 KiB
C
851 lines
22 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Resource Director Technology(RDT)
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* - Monitoring code
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*
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* Copyright (C) 2017 Intel Corporation
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*
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* Author:
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* Vikas Shivappa <vikas.shivappa@intel.com>
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*
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* This replaces the cqm.c based on perf but we reuse a lot of
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* code and datastructures originally from Peter Zijlstra and Matt Fleming.
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*
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* More information about RDT be found in the Intel (R) x86 Architecture
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* Software Developer Manual June 2016, volume 3, section 17.17.
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*/
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#include <linux/module.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <asm/cpu_device_id.h>
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#include <asm/resctrl.h>
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#include "internal.h"
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struct rmid_entry {
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u32 rmid;
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int busy;
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struct list_head list;
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};
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/**
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* @rmid_free_lru A least recently used list of free RMIDs
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* These RMIDs are guaranteed to have an occupancy less than the
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* threshold occupancy
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*/
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static LIST_HEAD(rmid_free_lru);
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/**
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* @rmid_limbo_count count of currently unused but (potentially)
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* dirty RMIDs.
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* This counts RMIDs that no one is currently using but that
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* may have a occupancy value > resctrl_rmid_realloc_threshold. User can
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* change the threshold occupancy value.
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*/
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static unsigned int rmid_limbo_count;
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/**
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* @rmid_entry - The entry in the limbo and free lists.
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*/
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static struct rmid_entry *rmid_ptrs;
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/*
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* Global boolean for rdt_monitor which is true if any
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* resource monitoring is enabled.
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*/
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bool rdt_mon_capable;
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/*
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* Global to indicate which monitoring events are enabled.
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*/
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unsigned int rdt_mon_features;
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/*
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* This is the threshold cache occupancy in bytes at which we will consider an
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* RMID available for re-allocation.
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*/
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unsigned int resctrl_rmid_realloc_threshold;
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/*
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* This is the maximum value for the reallocation threshold, in bytes.
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*/
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unsigned int resctrl_rmid_realloc_limit;
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#define CF(cf) ((unsigned long)(1048576 * (cf) + 0.5))
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/*
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* The correction factor table is documented in Documentation/x86/resctrl.rst.
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* If rmid > rmid threshold, MBM total and local values should be multiplied
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* by the correction factor.
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*
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* The original table is modified for better code:
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*
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* 1. The threshold 0 is changed to rmid count - 1 so don't do correction
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* for the case.
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* 2. MBM total and local correction table indexed by core counter which is
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* equal to (x86_cache_max_rmid + 1) / 8 - 1 and is from 0 up to 27.
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* 3. The correction factor is normalized to 2^20 (1048576) so it's faster
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* to calculate corrected value by shifting:
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* corrected_value = (original_value * correction_factor) >> 20
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*/
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static const struct mbm_correction_factor_table {
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u32 rmidthreshold;
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u64 cf;
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} mbm_cf_table[] __initconst = {
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{7, CF(1.000000)},
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{15, CF(1.000000)},
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{15, CF(0.969650)},
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{31, CF(1.000000)},
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{31, CF(1.066667)},
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{31, CF(0.969650)},
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{47, CF(1.142857)},
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{63, CF(1.000000)},
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{63, CF(1.185115)},
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{63, CF(1.066553)},
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{79, CF(1.454545)},
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{95, CF(1.000000)},
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{95, CF(1.230769)},
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{95, CF(1.142857)},
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{95, CF(1.066667)},
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{127, CF(1.000000)},
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{127, CF(1.254863)},
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{127, CF(1.185255)},
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{151, CF(1.000000)},
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{127, CF(1.066667)},
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{167, CF(1.000000)},
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{159, CF(1.454334)},
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{183, CF(1.000000)},
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{127, CF(0.969744)},
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{191, CF(1.280246)},
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{191, CF(1.230921)},
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{215, CF(1.000000)},
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{191, CF(1.143118)},
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};
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static u32 mbm_cf_rmidthreshold __read_mostly = UINT_MAX;
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static u64 mbm_cf __read_mostly;
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static inline u64 get_corrected_mbm_count(u32 rmid, unsigned long val)
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{
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/* Correct MBM value. */
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if (rmid > mbm_cf_rmidthreshold)
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val = (val * mbm_cf) >> 20;
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return val;
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}
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static inline struct rmid_entry *__rmid_entry(u32 rmid)
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{
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struct rmid_entry *entry;
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entry = &rmid_ptrs[rmid];
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WARN_ON(entry->rmid != rmid);
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return entry;
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}
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static int __rmid_read(u32 rmid, enum resctrl_event_id eventid, u64 *val)
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{
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u64 msr_val;
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/*
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* As per the SDM, when IA32_QM_EVTSEL.EvtID (bits 7:0) is configured
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* with a valid event code for supported resource type and the bits
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* IA32_QM_EVTSEL.RMID (bits 41:32) are configured with valid RMID,
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* IA32_QM_CTR.data (bits 61:0) reports the monitored data.
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* IA32_QM_CTR.Error (bit 63) and IA32_QM_CTR.Unavailable (bit 62)
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* are error bits.
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*/
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wrmsr(MSR_IA32_QM_EVTSEL, eventid, rmid);
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rdmsrl(MSR_IA32_QM_CTR, msr_val);
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if (msr_val & RMID_VAL_ERROR)
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return -EIO;
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if (msr_val & RMID_VAL_UNAVAIL)
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return -EINVAL;
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*val = msr_val;
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return 0;
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}
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static struct arch_mbm_state *get_arch_mbm_state(struct rdt_hw_domain *hw_dom,
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u32 rmid,
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enum resctrl_event_id eventid)
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{
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switch (eventid) {
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case QOS_L3_OCCUP_EVENT_ID:
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return NULL;
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case QOS_L3_MBM_TOTAL_EVENT_ID:
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return &hw_dom->arch_mbm_total[rmid];
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case QOS_L3_MBM_LOCAL_EVENT_ID:
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return &hw_dom->arch_mbm_local[rmid];
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}
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/* Never expect to get here */
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WARN_ON_ONCE(1);
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return NULL;
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}
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void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d,
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u32 rmid, enum resctrl_event_id eventid)
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{
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struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);
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struct arch_mbm_state *am;
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am = get_arch_mbm_state(hw_dom, rmid, eventid);
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if (am) {
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memset(am, 0, sizeof(*am));
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/* Record any initial, non-zero count value. */
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__rmid_read(rmid, eventid, &am->prev_msr);
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}
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}
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/*
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* Assumes that hardware counters are also reset and thus that there is
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* no need to record initial non-zero counts.
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*/
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void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d)
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{
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struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);
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if (is_mbm_total_enabled())
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memset(hw_dom->arch_mbm_total, 0,
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sizeof(*hw_dom->arch_mbm_total) * r->num_rmid);
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if (is_mbm_local_enabled())
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memset(hw_dom->arch_mbm_local, 0,
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sizeof(*hw_dom->arch_mbm_local) * r->num_rmid);
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}
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static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width)
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{
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u64 shift = 64 - width, chunks;
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chunks = (cur_msr << shift) - (prev_msr << shift);
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return chunks >> shift;
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}
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int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d,
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u32 rmid, enum resctrl_event_id eventid, u64 *val)
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{
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struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
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struct rdt_hw_domain *hw_dom = resctrl_to_arch_dom(d);
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struct arch_mbm_state *am;
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u64 msr_val, chunks;
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int ret;
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if (!cpumask_test_cpu(smp_processor_id(), &d->cpu_mask))
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return -EINVAL;
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ret = __rmid_read(rmid, eventid, &msr_val);
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if (ret)
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return ret;
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am = get_arch_mbm_state(hw_dom, rmid, eventid);
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if (am) {
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am->chunks += mbm_overflow_count(am->prev_msr, msr_val,
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hw_res->mbm_width);
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chunks = get_corrected_mbm_count(rmid, am->chunks);
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am->prev_msr = msr_val;
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} else {
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chunks = msr_val;
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}
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*val = chunks * hw_res->mon_scale;
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return 0;
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}
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/*
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* Check the RMIDs that are marked as busy for this domain. If the
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* reported LLC occupancy is below the threshold clear the busy bit and
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* decrement the count. If the busy count gets to zero on an RMID, we
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* free the RMID
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*/
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void __check_limbo(struct rdt_domain *d, bool force_free)
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{
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struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
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struct rmid_entry *entry;
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u32 crmid = 1, nrmid;
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bool rmid_dirty;
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u64 val = 0;
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/*
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* Skip RMID 0 and start from RMID 1 and check all the RMIDs that
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* are marked as busy for occupancy < threshold. If the occupancy
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* is less than the threshold decrement the busy counter of the
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* RMID and move it to the free list when the counter reaches 0.
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*/
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for (;;) {
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nrmid = find_next_bit(d->rmid_busy_llc, r->num_rmid, crmid);
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if (nrmid >= r->num_rmid)
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break;
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entry = __rmid_entry(nrmid);
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if (resctrl_arch_rmid_read(r, d, entry->rmid,
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QOS_L3_OCCUP_EVENT_ID, &val)) {
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rmid_dirty = true;
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} else {
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rmid_dirty = (val >= resctrl_rmid_realloc_threshold);
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}
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if (force_free || !rmid_dirty) {
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clear_bit(entry->rmid, d->rmid_busy_llc);
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if (!--entry->busy) {
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rmid_limbo_count--;
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list_add_tail(&entry->list, &rmid_free_lru);
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}
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}
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crmid = nrmid + 1;
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}
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}
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bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d)
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{
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return find_first_bit(d->rmid_busy_llc, r->num_rmid) != r->num_rmid;
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}
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/*
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* As of now the RMIDs allocation is global.
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* However we keep track of which packages the RMIDs
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* are used to optimize the limbo list management.
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*/
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int alloc_rmid(void)
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{
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struct rmid_entry *entry;
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lockdep_assert_held(&rdtgroup_mutex);
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if (list_empty(&rmid_free_lru))
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return rmid_limbo_count ? -EBUSY : -ENOSPC;
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entry = list_first_entry(&rmid_free_lru,
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struct rmid_entry, list);
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list_del(&entry->list);
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return entry->rmid;
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}
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static void add_rmid_to_limbo(struct rmid_entry *entry)
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{
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struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
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struct rdt_domain *d;
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int cpu, err;
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u64 val = 0;
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entry->busy = 0;
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cpu = get_cpu();
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list_for_each_entry(d, &r->domains, list) {
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if (cpumask_test_cpu(cpu, &d->cpu_mask)) {
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err = resctrl_arch_rmid_read(r, d, entry->rmid,
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QOS_L3_OCCUP_EVENT_ID,
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&val);
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if (err || val <= resctrl_rmid_realloc_threshold)
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continue;
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}
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/*
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* For the first limbo RMID in the domain,
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* setup up the limbo worker.
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*/
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if (!has_busy_rmid(r, d))
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cqm_setup_limbo_handler(d, CQM_LIMBOCHECK_INTERVAL);
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set_bit(entry->rmid, d->rmid_busy_llc);
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entry->busy++;
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}
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put_cpu();
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if (entry->busy)
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rmid_limbo_count++;
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else
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list_add_tail(&entry->list, &rmid_free_lru);
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}
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void free_rmid(u32 rmid)
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{
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struct rmid_entry *entry;
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if (!rmid)
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return;
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lockdep_assert_held(&rdtgroup_mutex);
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entry = __rmid_entry(rmid);
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if (is_llc_occupancy_enabled())
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add_rmid_to_limbo(entry);
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else
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list_add_tail(&entry->list, &rmid_free_lru);
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}
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static int __mon_event_count(u32 rmid, struct rmid_read *rr)
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{
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struct mbm_state *m;
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u64 tval = 0;
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if (rr->first)
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resctrl_arch_reset_rmid(rr->r, rr->d, rmid, rr->evtid);
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rr->err = resctrl_arch_rmid_read(rr->r, rr->d, rmid, rr->evtid, &tval);
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if (rr->err)
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return rr->err;
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switch (rr->evtid) {
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case QOS_L3_OCCUP_EVENT_ID:
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rr->val += tval;
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return 0;
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case QOS_L3_MBM_TOTAL_EVENT_ID:
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m = &rr->d->mbm_total[rmid];
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break;
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case QOS_L3_MBM_LOCAL_EVENT_ID:
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m = &rr->d->mbm_local[rmid];
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break;
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default:
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/*
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* Code would never reach here because an invalid
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* event id would fail in resctrl_arch_rmid_read().
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*/
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return -EINVAL;
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}
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if (rr->first) {
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memset(m, 0, sizeof(struct mbm_state));
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return 0;
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}
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rr->val += tval;
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return 0;
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}
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/*
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* mbm_bw_count() - Update bw count from values previously read by
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* __mon_event_count().
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||
|
* @rmid: The rmid used to identify the cached mbm_state.
|
||
|
* @rr: The struct rmid_read populated by __mon_event_count().
|
||
|
*
|
||
|
* Supporting function to calculate the memory bandwidth
|
||
|
* and delta bandwidth in MBps. The chunks value previously read by
|
||
|
* __mon_event_count() is compared with the chunks value from the previous
|
||
|
* invocation. This must be called once per second to maintain values in MBps.
|
||
|
*/
|
||
|
static void mbm_bw_count(u32 rmid, struct rmid_read *rr)
|
||
|
{
|
||
|
struct mbm_state *m = &rr->d->mbm_local[rmid];
|
||
|
u64 cur_bw, bytes, cur_bytes;
|
||
|
|
||
|
cur_bytes = rr->val;
|
||
|
bytes = cur_bytes - m->prev_bw_bytes;
|
||
|
m->prev_bw_bytes = cur_bytes;
|
||
|
|
||
|
cur_bw = bytes / SZ_1M;
|
||
|
|
||
|
if (m->delta_comp)
|
||
|
m->delta_bw = abs(cur_bw - m->prev_bw);
|
||
|
m->delta_comp = false;
|
||
|
m->prev_bw = cur_bw;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* This is called via IPI to read the CQM/MBM counters
|
||
|
* on a domain.
|
||
|
*/
|
||
|
void mon_event_count(void *info)
|
||
|
{
|
||
|
struct rdtgroup *rdtgrp, *entry;
|
||
|
struct rmid_read *rr = info;
|
||
|
struct list_head *head;
|
||
|
int ret;
|
||
|
|
||
|
rdtgrp = rr->rgrp;
|
||
|
|
||
|
ret = __mon_event_count(rdtgrp->mon.rmid, rr);
|
||
|
|
||
|
/*
|
||
|
* For Ctrl groups read data from child monitor groups and
|
||
|
* add them together. Count events which are read successfully.
|
||
|
* Discard the rmid_read's reporting errors.
|
||
|
*/
|
||
|
head = &rdtgrp->mon.crdtgrp_list;
|
||
|
|
||
|
if (rdtgrp->type == RDTCTRL_GROUP) {
|
||
|
list_for_each_entry(entry, head, mon.crdtgrp_list) {
|
||
|
if (__mon_event_count(entry->mon.rmid, rr) == 0)
|
||
|
ret = 0;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* __mon_event_count() calls for newly created monitor groups may
|
||
|
* report -EINVAL/Unavailable if the monitor hasn't seen any traffic.
|
||
|
* Discard error if any of the monitor event reads succeeded.
|
||
|
*/
|
||
|
if (ret == 0)
|
||
|
rr->err = 0;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Feedback loop for MBA software controller (mba_sc)
|
||
|
*
|
||
|
* mba_sc is a feedback loop where we periodically read MBM counters and
|
||
|
* adjust the bandwidth percentage values via the IA32_MBA_THRTL_MSRs so
|
||
|
* that:
|
||
|
*
|
||
|
* current bandwidth(cur_bw) < user specified bandwidth(user_bw)
|
||
|
*
|
||
|
* This uses the MBM counters to measure the bandwidth and MBA throttle
|
||
|
* MSRs to control the bandwidth for a particular rdtgrp. It builds on the
|
||
|
* fact that resctrl rdtgroups have both monitoring and control.
|
||
|
*
|
||
|
* The frequency of the checks is 1s and we just tag along the MBM overflow
|
||
|
* timer. Having 1s interval makes the calculation of bandwidth simpler.
|
||
|
*
|
||
|
* Although MBA's goal is to restrict the bandwidth to a maximum, there may
|
||
|
* be a need to increase the bandwidth to avoid unnecessarily restricting
|
||
|
* the L2 <-> L3 traffic.
|
||
|
*
|
||
|
* Since MBA controls the L2 external bandwidth where as MBM measures the
|
||
|
* L3 external bandwidth the following sequence could lead to such a
|
||
|
* situation.
|
||
|
*
|
||
|
* Consider an rdtgroup which had high L3 <-> memory traffic in initial
|
||
|
* phases -> mba_sc kicks in and reduced bandwidth percentage values -> but
|
||
|
* after some time rdtgroup has mostly L2 <-> L3 traffic.
|
||
|
*
|
||
|
* In this case we may restrict the rdtgroup's L2 <-> L3 traffic as its
|
||
|
* throttle MSRs already have low percentage values. To avoid
|
||
|
* unnecessarily restricting such rdtgroups, we also increase the bandwidth.
|
||
|
*/
|
||
|
static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_domain *dom_mbm)
|
||
|
{
|
||
|
u32 closid, rmid, cur_msr_val, new_msr_val;
|
||
|
struct mbm_state *pmbm_data, *cmbm_data;
|
||
|
u32 cur_bw, delta_bw, user_bw;
|
||
|
struct rdt_resource *r_mba;
|
||
|
struct rdt_domain *dom_mba;
|
||
|
struct list_head *head;
|
||
|
struct rdtgroup *entry;
|
||
|
|
||
|
if (!is_mbm_local_enabled())
|
||
|
return;
|
||
|
|
||
|
r_mba = &rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl;
|
||
|
|
||
|
closid = rgrp->closid;
|
||
|
rmid = rgrp->mon.rmid;
|
||
|
pmbm_data = &dom_mbm->mbm_local[rmid];
|
||
|
|
||
|
dom_mba = get_domain_from_cpu(smp_processor_id(), r_mba);
|
||
|
if (!dom_mba) {
|
||
|
pr_warn_once("Failure to get domain for MBA update\n");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
cur_bw = pmbm_data->prev_bw;
|
||
|
user_bw = dom_mba->mbps_val[closid];
|
||
|
delta_bw = pmbm_data->delta_bw;
|
||
|
|
||
|
/* MBA resource doesn't support CDP */
|
||
|
cur_msr_val = resctrl_arch_get_config(r_mba, dom_mba, closid, CDP_NONE);
|
||
|
|
||
|
/*
|
||
|
* For Ctrl groups read data from child monitor groups.
|
||
|
*/
|
||
|
head = &rgrp->mon.crdtgrp_list;
|
||
|
list_for_each_entry(entry, head, mon.crdtgrp_list) {
|
||
|
cmbm_data = &dom_mbm->mbm_local[entry->mon.rmid];
|
||
|
cur_bw += cmbm_data->prev_bw;
|
||
|
delta_bw += cmbm_data->delta_bw;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Scale up/down the bandwidth linearly for the ctrl group. The
|
||
|
* bandwidth step is the bandwidth granularity specified by the
|
||
|
* hardware.
|
||
|
*
|
||
|
* The delta_bw is used when increasing the bandwidth so that we
|
||
|
* dont alternately increase and decrease the control values
|
||
|
* continuously.
|
||
|
*
|
||
|
* For ex: consider cur_bw = 90MBps, user_bw = 100MBps and if
|
||
|
* bandwidth step is 20MBps(> user_bw - cur_bw), we would keep
|
||
|
* switching between 90 and 110 continuously if we only check
|
||
|
* cur_bw < user_bw.
|
||
|
*/
|
||
|
if (cur_msr_val > r_mba->membw.min_bw && user_bw < cur_bw) {
|
||
|
new_msr_val = cur_msr_val - r_mba->membw.bw_gran;
|
||
|
} else if (cur_msr_val < MAX_MBA_BW &&
|
||
|
(user_bw > (cur_bw + delta_bw))) {
|
||
|
new_msr_val = cur_msr_val + r_mba->membw.bw_gran;
|
||
|
} else {
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
resctrl_arch_update_one(r_mba, dom_mba, closid, CDP_NONE, new_msr_val);
|
||
|
|
||
|
/*
|
||
|
* Delta values are updated dynamically package wise for each
|
||
|
* rdtgrp every time the throttle MSR changes value.
|
||
|
*
|
||
|
* This is because (1)the increase in bandwidth is not perfectly
|
||
|
* linear and only "approximately" linear even when the hardware
|
||
|
* says it is linear.(2)Also since MBA is a core specific
|
||
|
* mechanism, the delta values vary based on number of cores used
|
||
|
* by the rdtgrp.
|
||
|
*/
|
||
|
pmbm_data->delta_comp = true;
|
||
|
list_for_each_entry(entry, head, mon.crdtgrp_list) {
|
||
|
cmbm_data = &dom_mbm->mbm_local[entry->mon.rmid];
|
||
|
cmbm_data->delta_comp = true;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static void mbm_update(struct rdt_resource *r, struct rdt_domain *d, int rmid)
|
||
|
{
|
||
|
struct rmid_read rr;
|
||
|
|
||
|
rr.first = false;
|
||
|
rr.r = r;
|
||
|
rr.d = d;
|
||
|
|
||
|
/*
|
||
|
* This is protected from concurrent reads from user
|
||
|
* as both the user and we hold the global mutex.
|
||
|
*/
|
||
|
if (is_mbm_total_enabled()) {
|
||
|
rr.evtid = QOS_L3_MBM_TOTAL_EVENT_ID;
|
||
|
rr.val = 0;
|
||
|
__mon_event_count(rmid, &rr);
|
||
|
}
|
||
|
if (is_mbm_local_enabled()) {
|
||
|
rr.evtid = QOS_L3_MBM_LOCAL_EVENT_ID;
|
||
|
rr.val = 0;
|
||
|
__mon_event_count(rmid, &rr);
|
||
|
|
||
|
/*
|
||
|
* Call the MBA software controller only for the
|
||
|
* control groups and when user has enabled
|
||
|
* the software controller explicitly.
|
||
|
*/
|
||
|
if (is_mba_sc(NULL))
|
||
|
mbm_bw_count(rmid, &rr);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Handler to scan the limbo list and move the RMIDs
|
||
|
* to free list whose occupancy < threshold_occupancy.
|
||
|
*/
|
||
|
void cqm_handle_limbo(struct work_struct *work)
|
||
|
{
|
||
|
unsigned long delay = msecs_to_jiffies(CQM_LIMBOCHECK_INTERVAL);
|
||
|
int cpu = smp_processor_id();
|
||
|
struct rdt_resource *r;
|
||
|
struct rdt_domain *d;
|
||
|
|
||
|
mutex_lock(&rdtgroup_mutex);
|
||
|
|
||
|
r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
|
||
|
d = container_of(work, struct rdt_domain, cqm_limbo.work);
|
||
|
|
||
|
__check_limbo(d, false);
|
||
|
|
||
|
if (has_busy_rmid(r, d))
|
||
|
schedule_delayed_work_on(cpu, &d->cqm_limbo, delay);
|
||
|
|
||
|
mutex_unlock(&rdtgroup_mutex);
|
||
|
}
|
||
|
|
||
|
void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_ms)
|
||
|
{
|
||
|
unsigned long delay = msecs_to_jiffies(delay_ms);
|
||
|
int cpu;
|
||
|
|
||
|
cpu = cpumask_any(&dom->cpu_mask);
|
||
|
dom->cqm_work_cpu = cpu;
|
||
|
|
||
|
schedule_delayed_work_on(cpu, &dom->cqm_limbo, delay);
|
||
|
}
|
||
|
|
||
|
void mbm_handle_overflow(struct work_struct *work)
|
||
|
{
|
||
|
unsigned long delay = msecs_to_jiffies(MBM_OVERFLOW_INTERVAL);
|
||
|
struct rdtgroup *prgrp, *crgrp;
|
||
|
int cpu = smp_processor_id();
|
||
|
struct list_head *head;
|
||
|
struct rdt_resource *r;
|
||
|
struct rdt_domain *d;
|
||
|
|
||
|
mutex_lock(&rdtgroup_mutex);
|
||
|
|
||
|
if (!static_branch_likely(&rdt_mon_enable_key))
|
||
|
goto out_unlock;
|
||
|
|
||
|
r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
|
||
|
d = container_of(work, struct rdt_domain, mbm_over.work);
|
||
|
|
||
|
list_for_each_entry(prgrp, &rdt_all_groups, rdtgroup_list) {
|
||
|
mbm_update(r, d, prgrp->mon.rmid);
|
||
|
|
||
|
head = &prgrp->mon.crdtgrp_list;
|
||
|
list_for_each_entry(crgrp, head, mon.crdtgrp_list)
|
||
|
mbm_update(r, d, crgrp->mon.rmid);
|
||
|
|
||
|
if (is_mba_sc(NULL))
|
||
|
update_mba_bw(prgrp, d);
|
||
|
}
|
||
|
|
||
|
schedule_delayed_work_on(cpu, &d->mbm_over, delay);
|
||
|
|
||
|
out_unlock:
|
||
|
mutex_unlock(&rdtgroup_mutex);
|
||
|
}
|
||
|
|
||
|
void mbm_setup_overflow_handler(struct rdt_domain *dom, unsigned long delay_ms)
|
||
|
{
|
||
|
unsigned long delay = msecs_to_jiffies(delay_ms);
|
||
|
int cpu;
|
||
|
|
||
|
if (!static_branch_likely(&rdt_mon_enable_key))
|
||
|
return;
|
||
|
cpu = cpumask_any(&dom->cpu_mask);
|
||
|
dom->mbm_work_cpu = cpu;
|
||
|
schedule_delayed_work_on(cpu, &dom->mbm_over, delay);
|
||
|
}
|
||
|
|
||
|
static int dom_data_init(struct rdt_resource *r)
|
||
|
{
|
||
|
struct rmid_entry *entry = NULL;
|
||
|
int i, nr_rmids;
|
||
|
|
||
|
nr_rmids = r->num_rmid;
|
||
|
rmid_ptrs = kcalloc(nr_rmids, sizeof(struct rmid_entry), GFP_KERNEL);
|
||
|
if (!rmid_ptrs)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
for (i = 0; i < nr_rmids; i++) {
|
||
|
entry = &rmid_ptrs[i];
|
||
|
INIT_LIST_HEAD(&entry->list);
|
||
|
|
||
|
entry->rmid = i;
|
||
|
list_add_tail(&entry->list, &rmid_free_lru);
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* RMID 0 is special and is always allocated. It's used for all
|
||
|
* tasks that are not monitored.
|
||
|
*/
|
||
|
entry = __rmid_entry(0);
|
||
|
list_del(&entry->list);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static struct mon_evt llc_occupancy_event = {
|
||
|
.name = "llc_occupancy",
|
||
|
.evtid = QOS_L3_OCCUP_EVENT_ID,
|
||
|
};
|
||
|
|
||
|
static struct mon_evt mbm_total_event = {
|
||
|
.name = "mbm_total_bytes",
|
||
|
.evtid = QOS_L3_MBM_TOTAL_EVENT_ID,
|
||
|
};
|
||
|
|
||
|
static struct mon_evt mbm_local_event = {
|
||
|
.name = "mbm_local_bytes",
|
||
|
.evtid = QOS_L3_MBM_LOCAL_EVENT_ID,
|
||
|
};
|
||
|
|
||
|
/*
|
||
|
* Initialize the event list for the resource.
|
||
|
*
|
||
|
* Note that MBM events are also part of RDT_RESOURCE_L3 resource
|
||
|
* because as per the SDM the total and local memory bandwidth
|
||
|
* are enumerated as part of L3 monitoring.
|
||
|
*/
|
||
|
static void l3_mon_evt_init(struct rdt_resource *r)
|
||
|
{
|
||
|
INIT_LIST_HEAD(&r->evt_list);
|
||
|
|
||
|
if (is_llc_occupancy_enabled())
|
||
|
list_add_tail(&llc_occupancy_event.list, &r->evt_list);
|
||
|
if (is_mbm_total_enabled())
|
||
|
list_add_tail(&mbm_total_event.list, &r->evt_list);
|
||
|
if (is_mbm_local_enabled())
|
||
|
list_add_tail(&mbm_local_event.list, &r->evt_list);
|
||
|
}
|
||
|
|
||
|
int __init rdt_get_mon_l3_config(struct rdt_resource *r)
|
||
|
{
|
||
|
unsigned int mbm_offset = boot_cpu_data.x86_cache_mbm_width_offset;
|
||
|
struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
|
||
|
unsigned int threshold;
|
||
|
int ret;
|
||
|
|
||
|
resctrl_rmid_realloc_limit = boot_cpu_data.x86_cache_size * 1024;
|
||
|
hw_res->mon_scale = boot_cpu_data.x86_cache_occ_scale;
|
||
|
r->num_rmid = boot_cpu_data.x86_cache_max_rmid + 1;
|
||
|
hw_res->mbm_width = MBM_CNTR_WIDTH_BASE;
|
||
|
|
||
|
if (mbm_offset > 0 && mbm_offset <= MBM_CNTR_WIDTH_OFFSET_MAX)
|
||
|
hw_res->mbm_width += mbm_offset;
|
||
|
else if (mbm_offset > MBM_CNTR_WIDTH_OFFSET_MAX)
|
||
|
pr_warn("Ignoring impossible MBM counter offset\n");
|
||
|
|
||
|
/*
|
||
|
* A reasonable upper limit on the max threshold is the number
|
||
|
* of lines tagged per RMID if all RMIDs have the same number of
|
||
|
* lines tagged in the LLC.
|
||
|
*
|
||
|
* For a 35MB LLC and 56 RMIDs, this is ~1.8% of the LLC.
|
||
|
*/
|
||
|
threshold = resctrl_rmid_realloc_limit / r->num_rmid;
|
||
|
|
||
|
/*
|
||
|
* Because num_rmid may not be a power of two, round the value
|
||
|
* to the nearest multiple of hw_res->mon_scale so it matches a
|
||
|
* value the hardware will measure. mon_scale may not be a power of 2.
|
||
|
*/
|
||
|
resctrl_rmid_realloc_threshold = resctrl_arch_round_mon_val(threshold);
|
||
|
|
||
|
ret = dom_data_init(r);
|
||
|
if (ret)
|
||
|
return ret;
|
||
|
|
||
|
if (rdt_cpu_has(X86_FEATURE_BMEC)) {
|
||
|
if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) {
|
||
|
mbm_total_event.configurable = true;
|
||
|
mbm_config_rftype_init("mbm_total_bytes_config");
|
||
|
}
|
||
|
if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) {
|
||
|
mbm_local_event.configurable = true;
|
||
|
mbm_config_rftype_init("mbm_local_bytes_config");
|
||
|
}
|
||
|
}
|
||
|
|
||
|
l3_mon_evt_init(r);
|
||
|
|
||
|
r->mon_capable = true;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
void __init intel_rdt_mbm_apply_quirk(void)
|
||
|
{
|
||
|
int cf_index;
|
||
|
|
||
|
cf_index = (boot_cpu_data.x86_cache_max_rmid + 1) / 8 - 1;
|
||
|
if (cf_index >= ARRAY_SIZE(mbm_cf_table)) {
|
||
|
pr_info("No MBM correction factor available\n");
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
mbm_cf_rmidthreshold = mbm_cf_table[cf_index].rmidthreshold;
|
||
|
mbm_cf = mbm_cf_table[cf_index].cf;
|
||
|
}
|