105 lines
2.4 KiB
C
105 lines
2.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2019-2021 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef GAUDI2_FW_IF_H
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#define GAUDI2_FW_IF_H
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#define GAUDI2_EVENT_QUEUE_MSIX_IDX 0
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#define UBOOT_FW_OFFSET 0x100000 /* 1MB in SRAM */
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#define LINUX_FW_OFFSET 0x800000 /* 8BM in DDR */
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#define GAUDI2_PLL_FREQ_LOW 200000000 /* 200 MHz */
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#define GAUDI2_SP_SRAM_BASE_ADDR 0x27FE0000
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#define GAUDI2_MAILBOX_BASE_ADDR 0x27FE1800
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#define GAUDI2_NUM_MME 4
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#define NUM_OF_GPIOS_PER_PORT 16
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#define GAUDI2_WD_GPIO (62 % NUM_OF_GPIOS_PER_PORT)
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#define GAUDI2_ARCPID_TX_MB_SIZE 0x1000
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#define GAUDI2_ARCPID_RX_MB_SIZE 0x400
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#define GAUDI2_ARM_TX_MB_SIZE 0x400
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#define GAUDI2_ARM_RX_MB_SIZE 0x1800
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#define GAUDI2_DCCM_BASE_ADDR 0x27020000
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#define GAUDI2_ARM_TX_MB_ADDR GAUDI2_MAILBOX_BASE_ADDR
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#define GAUDI2_ARM_RX_MB_ADDR (GAUDI2_ARM_TX_MB_ADDR + \
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GAUDI2_ARM_TX_MB_SIZE)
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#define GAUDI2_ARCPID_TX_MB_ADDR (GAUDI2_ARM_RX_MB_ADDR + GAUDI2_ARM_RX_MB_SIZE)
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#define GAUDI2_ARCPID_RX_MB_ADDR (GAUDI2_ARCPID_TX_MB_ADDR + GAUDI2_ARCPID_TX_MB_SIZE)
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#define GAUDI2_ARM_TX_MB_OFFSET (GAUDI2_ARM_TX_MB_ADDR - \
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GAUDI2_SP_SRAM_BASE_ADDR)
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#define GAUDI2_ARM_RX_MB_OFFSET (GAUDI2_ARM_RX_MB_ADDR - \
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GAUDI2_SP_SRAM_BASE_ADDR)
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enum gaudi2_fw_status {
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GAUDI2_PID_STATUS_UP = 0x1, /* PID on ARC0 is up */
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GAUDI2_ARM_STATUS_UP = 0x2, /* ARM Linux Boot complete */
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GAUDI2_MGMT_STATUS_UP = 0x3, /* ARC1 Mgmt is up */
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GAUDI2_STATUS_LAST = 0xFF
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};
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struct gaudi2_cold_rst_data {
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union {
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struct {
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u32 recovery_flag: 1;
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u32 validation_flag: 1;
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u32 efuse_read_flag: 1;
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u32 spsram_init_done : 1;
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u32 fake_security_enable : 1;
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u32 fake_sig_validation_en : 1;
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u32 bist_skip_enable : 1;
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u32 bist_need_iatu_config : 1;
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u32 reserved : 24;
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};
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__le32 data;
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};
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};
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enum gaudi2_rst_src {
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HL_COLD_RST = 1,
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HL_MANUAL_RST = 2,
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HL_PRSTN_RST = 4,
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HL_SOFT_RST = 8,
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HL_WD_RST = 16,
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HL_FW_ALL_RST = 32,
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HL_SW_ALL_RST = 64,
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HL_FLR_RST = 128,
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HL_ECC_DERR_RST = 256
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};
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struct gaudi2_redundancy_ctx {
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__le32 redundant_hbm;
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__le32 redundant_edma;
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__le32 redundant_tpc;
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__le32 redundant_vdec;
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__le64 hbm_mask;
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__le64 edma_mask;
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__le64 tpc_mask;
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__le64 vdec_mask;
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__le64 mme_mask;
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__le64 nic_mask;
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__le64 rtr_mask;
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__le64 hmmu_hif_iso;
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__le64 xbar_edge_iso;
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__le64 hmmu_hif_mask;
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__le64 xbar_edge_mask;
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__u8 mme_pe_iso[GAUDI2_NUM_MME];
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__le32 full_hbm_mode; /* true on full (non binning hbm)*/
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} __packed;
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#endif /* GAUDI2_FW_IF_H */
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