543 lines
15 KiB
C
543 lines
15 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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*
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dma-direction.h>
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#include <linux/dma-mapping.h>
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#include <linux/firmware.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/mhi.h>
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#include <linux/module.h>
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#include <linux/random.h>
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#include <linux/slab.h>
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#include <linux/wait.h>
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#include "internal.h"
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/* Setup RDDM vector table for RDDM transfer and program RXVEC */
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int mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
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struct image_info *img_info)
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{
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struct mhi_buf *mhi_buf = img_info->mhi_buf;
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struct bhi_vec_entry *bhi_vec = img_info->bhi_vec;
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void __iomem *base = mhi_cntrl->bhie;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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u32 sequence_id;
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unsigned int i;
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int ret;
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for (i = 0; i < img_info->entries - 1; i++, mhi_buf++, bhi_vec++) {
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bhi_vec->dma_addr = mhi_buf->dma_addr;
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bhi_vec->size = mhi_buf->len;
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}
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dev_dbg(dev, "BHIe programming for RDDM\n");
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mhi_write_reg(mhi_cntrl, base, BHIE_RXVECADDR_HIGH_OFFS,
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upper_32_bits(mhi_buf->dma_addr));
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mhi_write_reg(mhi_cntrl, base, BHIE_RXVECADDR_LOW_OFFS,
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lower_32_bits(mhi_buf->dma_addr));
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mhi_write_reg(mhi_cntrl, base, BHIE_RXVECSIZE_OFFS, mhi_buf->len);
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sequence_id = MHI_RANDOM_U32_NONZERO(BHIE_RXVECSTATUS_SEQNUM_BMSK);
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ret = mhi_write_reg_field(mhi_cntrl, base, BHIE_RXVECDB_OFFS,
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BHIE_RXVECDB_SEQNUM_BMSK, sequence_id);
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if (ret) {
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dev_err(dev, "Failed to write sequence ID for BHIE_RXVECDB\n");
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return ret;
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}
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dev_dbg(dev, "Address: %p and len: 0x%zx sequence: %u\n",
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&mhi_buf->dma_addr, mhi_buf->len, sequence_id);
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return 0;
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}
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/* Collect RDDM buffer during kernel panic */
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static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
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{
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int ret;
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u32 rx_status;
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enum mhi_ee_type ee;
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const u32 delayus = 2000;
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u32 retry = (mhi_cntrl->timeout_ms * 1000) / delayus;
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const u32 rddm_timeout_us = 200000;
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int rddm_retry = rddm_timeout_us / delayus;
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void __iomem *base = mhi_cntrl->bhie;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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dev_dbg(dev, "Entered with pm_state:%s dev_state:%s ee:%s\n",
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to_mhi_pm_state_str(mhi_cntrl->pm_state),
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mhi_state_str(mhi_cntrl->dev_state),
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TO_MHI_EXEC_STR(mhi_cntrl->ee));
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/*
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* This should only be executing during a kernel panic, we expect all
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* other cores to shutdown while we're collecting RDDM buffer. After
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* returning from this function, we expect the device to reset.
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*
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* Normaly, we read/write pm_state only after grabbing the
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* pm_lock, since we're in a panic, skipping it. Also there is no
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* gurantee that this state change would take effect since
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* we're setting it w/o grabbing pm_lock
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*/
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mhi_cntrl->pm_state = MHI_PM_LD_ERR_FATAL_DETECT;
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/* update should take the effect immediately */
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smp_wmb();
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/*
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* Make sure device is not already in RDDM. In case the device asserts
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* and a kernel panic follows, device will already be in RDDM.
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* Do not trigger SYS ERR again and proceed with waiting for
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* image download completion.
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*/
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ee = mhi_get_exec_env(mhi_cntrl);
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if (ee == MHI_EE_MAX)
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goto error_exit_rddm;
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if (ee != MHI_EE_RDDM) {
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dev_dbg(dev, "Trigger device into RDDM mode using SYS ERR\n");
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mhi_set_mhi_state(mhi_cntrl, MHI_STATE_SYS_ERR);
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dev_dbg(dev, "Waiting for device to enter RDDM\n");
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while (rddm_retry--) {
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ee = mhi_get_exec_env(mhi_cntrl);
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if (ee == MHI_EE_RDDM)
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break;
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udelay(delayus);
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}
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if (rddm_retry <= 0) {
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/* Hardware reset so force device to enter RDDM */
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dev_dbg(dev,
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"Did not enter RDDM, do a host req reset\n");
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mhi_soc_reset(mhi_cntrl);
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udelay(delayus);
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}
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ee = mhi_get_exec_env(mhi_cntrl);
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}
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dev_dbg(dev,
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"Waiting for RDDM image download via BHIe, current EE:%s\n",
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TO_MHI_EXEC_STR(ee));
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while (retry--) {
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ret = mhi_read_reg_field(mhi_cntrl, base, BHIE_RXVECSTATUS_OFFS,
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BHIE_RXVECSTATUS_STATUS_BMSK, &rx_status);
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if (ret)
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return -EIO;
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if (rx_status == BHIE_RXVECSTATUS_STATUS_XFER_COMPL)
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return 0;
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udelay(delayus);
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}
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ee = mhi_get_exec_env(mhi_cntrl);
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ret = mhi_read_reg(mhi_cntrl, base, BHIE_RXVECSTATUS_OFFS, &rx_status);
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dev_err(dev, "RXVEC_STATUS: 0x%x\n", rx_status);
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error_exit_rddm:
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dev_err(dev, "RDDM transfer failed. Current EE: %s\n",
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TO_MHI_EXEC_STR(ee));
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return -EIO;
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}
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/* Download RDDM image from device */
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int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic)
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{
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void __iomem *base = mhi_cntrl->bhie;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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u32 rx_status;
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if (in_panic)
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return __mhi_download_rddm_in_panic(mhi_cntrl);
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dev_dbg(dev, "Waiting for RDDM image download via BHIe\n");
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/* Wait for the image download to complete */
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wait_event_timeout(mhi_cntrl->state_event,
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mhi_read_reg_field(mhi_cntrl, base,
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BHIE_RXVECSTATUS_OFFS,
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BHIE_RXVECSTATUS_STATUS_BMSK,
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&rx_status) || rx_status,
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msecs_to_jiffies(mhi_cntrl->timeout_ms));
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return (rx_status == BHIE_RXVECSTATUS_STATUS_XFER_COMPL) ? 0 : -EIO;
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}
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EXPORT_SYMBOL_GPL(mhi_download_rddm_image);
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static int mhi_fw_load_bhie(struct mhi_controller *mhi_cntrl,
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const struct mhi_buf *mhi_buf)
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{
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void __iomem *base = mhi_cntrl->bhie;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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rwlock_t *pm_lock = &mhi_cntrl->pm_lock;
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u32 tx_status, sequence_id;
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int ret;
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read_lock_bh(pm_lock);
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if (!MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) {
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read_unlock_bh(pm_lock);
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return -EIO;
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}
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sequence_id = MHI_RANDOM_U32_NONZERO(BHIE_TXVECSTATUS_SEQNUM_BMSK);
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dev_dbg(dev, "Starting image download via BHIe. Sequence ID: %u\n",
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sequence_id);
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mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_HIGH_OFFS,
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upper_32_bits(mhi_buf->dma_addr));
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mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_LOW_OFFS,
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lower_32_bits(mhi_buf->dma_addr));
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mhi_write_reg(mhi_cntrl, base, BHIE_TXVECSIZE_OFFS, mhi_buf->len);
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ret = mhi_write_reg_field(mhi_cntrl, base, BHIE_TXVECDB_OFFS,
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BHIE_TXVECDB_SEQNUM_BMSK, sequence_id);
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read_unlock_bh(pm_lock);
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if (ret)
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return ret;
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/* Wait for the image download to complete */
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ret = wait_event_timeout(mhi_cntrl->state_event,
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MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) ||
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mhi_read_reg_field(mhi_cntrl, base,
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BHIE_TXVECSTATUS_OFFS,
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BHIE_TXVECSTATUS_STATUS_BMSK,
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&tx_status) || tx_status,
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msecs_to_jiffies(mhi_cntrl->timeout_ms));
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if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) ||
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tx_status != BHIE_TXVECSTATUS_STATUS_XFER_COMPL)
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return -EIO;
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return (!ret) ? -ETIMEDOUT : 0;
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}
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static int mhi_fw_load_bhi(struct mhi_controller *mhi_cntrl,
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dma_addr_t dma_addr,
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size_t size)
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{
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u32 tx_status, val, session_id;
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int i, ret;
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void __iomem *base = mhi_cntrl->bhi;
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rwlock_t *pm_lock = &mhi_cntrl->pm_lock;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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struct {
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char *name;
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u32 offset;
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} error_reg[] = {
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{ "ERROR_CODE", BHI_ERRCODE },
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{ "ERROR_DBG1", BHI_ERRDBG1 },
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{ "ERROR_DBG2", BHI_ERRDBG2 },
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{ "ERROR_DBG3", BHI_ERRDBG3 },
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{ NULL },
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};
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read_lock_bh(pm_lock);
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if (!MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) {
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read_unlock_bh(pm_lock);
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goto invalid_pm_state;
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}
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session_id = MHI_RANDOM_U32_NONZERO(BHI_TXDB_SEQNUM_BMSK);
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dev_dbg(dev, "Starting image download via BHI. Session ID: %u\n",
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session_id);
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mhi_write_reg(mhi_cntrl, base, BHI_STATUS, 0);
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mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_HIGH,
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upper_32_bits(dma_addr));
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mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_LOW,
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lower_32_bits(dma_addr));
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mhi_write_reg(mhi_cntrl, base, BHI_IMGSIZE, size);
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mhi_write_reg(mhi_cntrl, base, BHI_IMGTXDB, session_id);
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read_unlock_bh(pm_lock);
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/* Wait for the image download to complete */
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ret = wait_event_timeout(mhi_cntrl->state_event,
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MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state) ||
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mhi_read_reg_field(mhi_cntrl, base, BHI_STATUS,
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BHI_STATUS_MASK, &tx_status) || tx_status,
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msecs_to_jiffies(mhi_cntrl->timeout_ms));
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if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state))
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goto invalid_pm_state;
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if (tx_status == BHI_STATUS_ERROR) {
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dev_err(dev, "Image transfer failed\n");
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read_lock_bh(pm_lock);
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if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) {
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for (i = 0; error_reg[i].name; i++) {
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ret = mhi_read_reg(mhi_cntrl, base,
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error_reg[i].offset, &val);
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if (ret)
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break;
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dev_err(dev, "Reg: %s value: 0x%x\n",
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error_reg[i].name, val);
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}
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}
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read_unlock_bh(pm_lock);
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goto invalid_pm_state;
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}
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return (!ret) ? -ETIMEDOUT : 0;
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invalid_pm_state:
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return -EIO;
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}
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void mhi_free_bhie_table(struct mhi_controller *mhi_cntrl,
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struct image_info *image_info)
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{
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int i;
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struct mhi_buf *mhi_buf = image_info->mhi_buf;
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for (i = 0; i < image_info->entries; i++, mhi_buf++)
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dma_free_coherent(mhi_cntrl->cntrl_dev, mhi_buf->len,
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mhi_buf->buf, mhi_buf->dma_addr);
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kfree(image_info->mhi_buf);
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kfree(image_info);
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}
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int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl,
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struct image_info **image_info,
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size_t alloc_size)
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{
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size_t seg_size = mhi_cntrl->seg_len;
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int segments = DIV_ROUND_UP(alloc_size, seg_size) + 1;
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int i;
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struct image_info *img_info;
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struct mhi_buf *mhi_buf;
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img_info = kzalloc(sizeof(*img_info), GFP_KERNEL);
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if (!img_info)
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return -ENOMEM;
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/* Allocate memory for entries */
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img_info->mhi_buf = kcalloc(segments, sizeof(*img_info->mhi_buf),
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GFP_KERNEL);
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if (!img_info->mhi_buf)
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goto error_alloc_mhi_buf;
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/* Allocate and populate vector table */
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mhi_buf = img_info->mhi_buf;
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for (i = 0; i < segments; i++, mhi_buf++) {
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|
|
size_t vec_size = seg_size;
|
||
|
|
|
||
|
|
/* Vector table is the last entry */
|
||
|
|
if (i == segments - 1)
|
||
|
|
vec_size = sizeof(struct bhi_vec_entry) * i;
|
||
|
|
|
||
|
|
mhi_buf->len = vec_size;
|
||
|
|
mhi_buf->buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev,
|
||
|
|
vec_size, &mhi_buf->dma_addr,
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!mhi_buf->buf)
|
||
|
|
goto error_alloc_segment;
|
||
|
|
}
|
||
|
|
|
||
|
|
img_info->bhi_vec = img_info->mhi_buf[segments - 1].buf;
|
||
|
|
img_info->entries = segments;
|
||
|
|
*image_info = img_info;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
error_alloc_segment:
|
||
|
|
for (--i, --mhi_buf; i >= 0; i--, mhi_buf--)
|
||
|
|
dma_free_coherent(mhi_cntrl->cntrl_dev, mhi_buf->len,
|
||
|
|
mhi_buf->buf, mhi_buf->dma_addr);
|
||
|
|
|
||
|
|
error_alloc_mhi_buf:
|
||
|
|
kfree(img_info);
|
||
|
|
|
||
|
|
return -ENOMEM;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void mhi_firmware_copy(struct mhi_controller *mhi_cntrl,
|
||
|
|
const struct firmware *firmware,
|
||
|
|
struct image_info *img_info)
|
||
|
|
{
|
||
|
|
size_t remainder = firmware->size;
|
||
|
|
size_t to_cpy;
|
||
|
|
const u8 *buf = firmware->data;
|
||
|
|
struct mhi_buf *mhi_buf = img_info->mhi_buf;
|
||
|
|
struct bhi_vec_entry *bhi_vec = img_info->bhi_vec;
|
||
|
|
|
||
|
|
while (remainder) {
|
||
|
|
to_cpy = min(remainder, mhi_buf->len);
|
||
|
|
memcpy(mhi_buf->buf, buf, to_cpy);
|
||
|
|
bhi_vec->dma_addr = mhi_buf->dma_addr;
|
||
|
|
bhi_vec->size = to_cpy;
|
||
|
|
|
||
|
|
buf += to_cpy;
|
||
|
|
remainder -= to_cpy;
|
||
|
|
bhi_vec++;
|
||
|
|
mhi_buf++;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
|
||
|
|
{
|
||
|
|
const struct firmware *firmware = NULL;
|
||
|
|
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||
|
|
enum mhi_pm_state new_state;
|
||
|
|
const char *fw_name;
|
||
|
|
void *buf;
|
||
|
|
dma_addr_t dma_addr;
|
||
|
|
size_t size;
|
||
|
|
int i, ret;
|
||
|
|
|
||
|
|
if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
|
||
|
|
dev_err(dev, "Device MHI is not in valid state\n");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* save hardware info from BHI */
|
||
|
|
ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_SERIALNU,
|
||
|
|
&mhi_cntrl->serial_number);
|
||
|
|
if (ret)
|
||
|
|
dev_err(dev, "Could not capture serial number via BHI\n");
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(mhi_cntrl->oem_pk_hash); i++) {
|
||
|
|
ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_OEMPKHASH(i),
|
||
|
|
&mhi_cntrl->oem_pk_hash[i]);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(dev, "Could not capture OEM PK HASH via BHI\n");
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* wait for ready on pass through or any other execution environment */
|
||
|
|
if (!MHI_FW_LOAD_CAPABLE(mhi_cntrl->ee))
|
||
|
|
goto fw_load_ready_state;
|
||
|
|
|
||
|
|
fw_name = (mhi_cntrl->ee == MHI_EE_EDL) ?
|
||
|
|
mhi_cntrl->edl_image : mhi_cntrl->fw_image;
|
||
|
|
|
||
|
|
if (!fw_name || (mhi_cntrl->fbc_download && (!mhi_cntrl->sbl_size ||
|
||
|
|
!mhi_cntrl->seg_len))) {
|
||
|
|
dev_err(dev,
|
||
|
|
"No firmware image defined or !sbl_size || !seg_len\n");
|
||
|
|
goto error_fw_load;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = request_firmware(&firmware, fw_name, dev);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(dev, "Error loading firmware: %d\n", ret);
|
||
|
|
goto error_fw_load;
|
||
|
|
}
|
||
|
|
|
||
|
|
size = (mhi_cntrl->fbc_download) ? mhi_cntrl->sbl_size : firmware->size;
|
||
|
|
|
||
|
|
/* SBL size provided is maximum size, not necessarily the image size */
|
||
|
|
if (size > firmware->size)
|
||
|
|
size = firmware->size;
|
||
|
|
|
||
|
|
buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, size, &dma_addr,
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!buf) {
|
||
|
|
release_firmware(firmware);
|
||
|
|
goto error_fw_load;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Download image using BHI */
|
||
|
|
memcpy(buf, firmware->data, size);
|
||
|
|
ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size);
|
||
|
|
dma_free_coherent(mhi_cntrl->cntrl_dev, size, buf, dma_addr);
|
||
|
|
|
||
|
|
/* Error or in EDL mode, we're done */
|
||
|
|
if (ret) {
|
||
|
|
dev_err(dev, "MHI did not load image over BHI, ret: %d\n", ret);
|
||
|
|
release_firmware(firmware);
|
||
|
|
goto error_fw_load;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Wait for ready since EDL image was loaded */
|
||
|
|
if (fw_name == mhi_cntrl->edl_image) {
|
||
|
|
release_firmware(firmware);
|
||
|
|
goto fw_load_ready_state;
|
||
|
|
}
|
||
|
|
|
||
|
|
write_lock_irq(&mhi_cntrl->pm_lock);
|
||
|
|
mhi_cntrl->dev_state = MHI_STATE_RESET;
|
||
|
|
write_unlock_irq(&mhi_cntrl->pm_lock);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* If we're doing fbc, populate vector tables while
|
||
|
|
* device transitioning into MHI READY state
|
||
|
|
*/
|
||
|
|
if (mhi_cntrl->fbc_download) {
|
||
|
|
ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image,
|
||
|
|
firmware->size);
|
||
|
|
if (ret) {
|
||
|
|
release_firmware(firmware);
|
||
|
|
goto error_fw_load;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Load the firmware into BHIE vec table */
|
||
|
|
mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image);
|
||
|
|
}
|
||
|
|
|
||
|
|
release_firmware(firmware);
|
||
|
|
|
||
|
|
fw_load_ready_state:
|
||
|
|
/* Transitioning into MHI RESET->READY state */
|
||
|
|
ret = mhi_ready_state_transition(mhi_cntrl);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(dev, "MHI did not enter READY state\n");
|
||
|
|
goto error_ready_state;
|
||
|
|
}
|
||
|
|
|
||
|
|
dev_info(dev, "Wait for device to enter SBL or Mission mode\n");
|
||
|
|
return;
|
||
|
|
|
||
|
|
error_ready_state:
|
||
|
|
if (mhi_cntrl->fbc_download) {
|
||
|
|
mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image);
|
||
|
|
mhi_cntrl->fbc_image = NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
error_fw_load:
|
||
|
|
write_lock_irq(&mhi_cntrl->pm_lock);
|
||
|
|
new_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_FW_DL_ERR);
|
||
|
|
write_unlock_irq(&mhi_cntrl->pm_lock);
|
||
|
|
if (new_state == MHI_PM_FW_DL_ERR)
|
||
|
|
wake_up_all(&mhi_cntrl->state_event);
|
||
|
|
}
|
||
|
|
|
||
|
|
int mhi_download_amss_image(struct mhi_controller *mhi_cntrl)
|
||
|
|
{
|
||
|
|
struct image_info *image_info = mhi_cntrl->fbc_image;
|
||
|
|
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||
|
|
enum mhi_pm_state new_state;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (!image_info)
|
||
|
|
return -EIO;
|
||
|
|
|
||
|
|
ret = mhi_fw_load_bhie(mhi_cntrl,
|
||
|
|
/* Vector table is the last entry */
|
||
|
|
&image_info->mhi_buf[image_info->entries - 1]);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(dev, "MHI did not load AMSS, ret:%d\n", ret);
|
||
|
|
write_lock_irq(&mhi_cntrl->pm_lock);
|
||
|
|
new_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_FW_DL_ERR);
|
||
|
|
write_unlock_irq(&mhi_cntrl->pm_lock);
|
||
|
|
if (new_state == MHI_PM_FW_DL_ERR)
|
||
|
|
wake_up_all(&mhi_cntrl->state_event);
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|