63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Shunli Wang <shunli.wang@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt2701-clk.h>
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static const struct mtk_gate_regs eth_cg_regs = {
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.sta_ofs = 0x0030,
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};
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#define GATE_ETH(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, ð_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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static const struct mtk_gate eth_clks[] = {
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GATE_DUMMY(CLK_DUMMY, "eth_dummy"),
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GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),
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GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
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GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7),
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GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
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GATE_ETH(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11),
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GATE_ETH(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14),
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GATE_ETH(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17),
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GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),
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};
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static u16 rst_ofs[] = { 0x34, };
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static const struct mtk_clk_rst_desc clk_rst_desc = {
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.version = MTK_RST_SIMPLE,
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.rst_bank_ofs = rst_ofs,
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.rst_bank_nr = ARRAY_SIZE(rst_ofs),
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};
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static const struct mtk_clk_desc eth_desc = {
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.clks = eth_clks,
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.num_clks = ARRAY_SIZE(eth_clks),
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.rst_desc = &clk_rst_desc,
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};
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static const struct of_device_id of_match_clk_mt2701_eth[] = {
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{ .compatible = "mediatek,mt2701-ethsys", .data = ð_desc },
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{ /* sentinel */ }
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};
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static struct platform_driver clk_mt2701_eth_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt2701-eth",
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.of_match_table = of_match_clk_mt2701_eth,
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},
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};
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builtin_platform_driver(clk_mt2701_eth_drv);
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