157 lines
5.7 KiB
Plaintext
157 lines
5.7 KiB
Plaintext
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# SPDX-License-Identifier: GPL-2.0-only
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menuconfig PM_DEVFREQ
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bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
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select SRCU
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select PM_OPP
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help
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A device may have a list of frequencies and voltages available.
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devfreq, a generic DVFS framework can be registered for a device
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in order to let the governor provided to devfreq choose an
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operating frequency based on the device driver's policy.
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Each device may have its own governor and policy. Devfreq can
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reevaluate the device state periodically and/or based on the
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notification to "nb", a notifier block, of devfreq.
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Like some CPUs with CPUfreq, a device may have multiple clocks.
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However, because the clock frequencies of a single device are
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determined by the single device's state, an instance of devfreq
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is attached to a single device and returns a "representative"
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clock frequency of the device, which is also attached
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to a device by 1-to-1. The device registering devfreq takes the
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responsibility to "interpret" the representative frequency and
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to set its every clock accordingly with the "target" callback
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given to devfreq.
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When OPP is used with the devfreq device, it is recommended to
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register devfreq's nb to the OPP's notifier head. If OPP is
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used with the devfreq device, you may use OPP helper
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functions defined in devfreq.h.
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if PM_DEVFREQ
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comment "DEVFREQ Governors"
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config DEVFREQ_GOV_SIMPLE_ONDEMAND
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tristate "Simple Ondemand"
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help
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Chooses frequency based on the recent load on the device. Works
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similar as ONDEMAND governor of CPUFREQ does. A device with
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Simple-Ondemand should be able to provide busy/total counter
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values that imply the usage rate. A device may provide tuned
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values to the governor with data field at devfreq_add_device().
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config DEVFREQ_GOV_PERFORMANCE
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tristate "Performance"
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help
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Sets the frequency at the maximum available frequency.
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This governor always returns UINT_MAX as frequency so that
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the DEVFREQ framework returns the highest frequency available
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at any time.
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config DEVFREQ_GOV_POWERSAVE
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tristate "Powersave"
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help
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Sets the frequency at the minimum available frequency.
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This governor always returns 0 as frequency so that
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the DEVFREQ framework returns the lowest frequency available
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at any time.
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config DEVFREQ_GOV_USERSPACE
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tristate "Userspace"
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help
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Sets the frequency at the user specified one.
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This governor returns the user configured frequency if there
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has been an input to /sys/devices/.../userspace/set_freq.
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Otherwise, the governor does not change the frequency
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given at the initialization.
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config DEVFREQ_GOV_PASSIVE
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tristate "Passive"
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help
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Sets the frequency based on the frequency of its parent devfreq
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device. This governor does not change the frequency by itself
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through sysfs entries. The passive governor recommends that
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devfreq device uses the OPP table to get the frequency/voltage.
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comment "DEVFREQ Drivers"
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config ARM_EXYNOS_BUS_DEVFREQ
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tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver"
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depends on ARCH_EXYNOS || COMPILE_TEST
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select DEVFREQ_GOV_SIMPLE_ONDEMAND
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select DEVFREQ_GOV_PASSIVE
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select DEVFREQ_EVENT_EXYNOS_PPMU
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select PM_DEVFREQ_EVENT
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help
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This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
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Memory bus has one more group of memory bus (e.g, MIF and INT block).
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Each memory bus group could contain many memoby bus block. It reads
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PPMU counters of memory controllers by using DEVFREQ-event device
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and adjusts the operating frequencies and voltages with OPP support.
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This does not yet operate with optimal voltages.
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config ARM_IMX_BUS_DEVFREQ
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tristate "i.MX Generic Bus DEVFREQ Driver"
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depends on ARCH_MXC || COMPILE_TEST
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select DEVFREQ_GOV_USERSPACE
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help
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This adds the generic DEVFREQ driver for i.MX interconnects. It
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allows adjusting NIC/NOC frequency.
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config ARM_IMX8M_DDRC_DEVFREQ
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tristate "i.MX8M DDRC DEVFREQ Driver"
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depends on (ARCH_MXC && HAVE_ARM_SMCCC) || \
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(COMPILE_TEST && HAVE_ARM_SMCCC)
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select DEVFREQ_GOV_USERSPACE
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help
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This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows
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adjusting DRAM frequency.
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config ARM_TEGRA_DEVFREQ
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tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"
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depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
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ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \
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ARCH_TEGRA_210_SOC || \
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COMPILE_TEST
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depends on COMMON_CLK
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help
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This adds the DEVFREQ driver for the Tegra family of SoCs.
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It reads ACTMON counters of memory controllers and adjusts the
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operating frequencies and voltages with OPP support.
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config ARM_MEDIATEK_CCI_DEVFREQ
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tristate "MEDIATEK CCI DEVFREQ Driver"
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depends on ARM_MEDIATEK_CPUFREQ || COMPILE_TEST
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select DEVFREQ_GOV_PASSIVE
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help
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This adds a devfreq driver for MediaTek Cache Coherent Interconnect
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which is shared the same regulators with the cpu cluster. It can track
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buck voltages and update a proper CCI frequency. Use the notification
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to get the regulator status.
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config ARM_RK3399_DMC_DEVFREQ
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tristate "ARM RK3399 DMC DEVFREQ Driver"
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depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \
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(COMPILE_TEST && HAVE_ARM_SMCCC)
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select DEVFREQ_EVENT_ROCKCHIP_DFI
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select DEVFREQ_GOV_SIMPLE_ONDEMAND
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select PM_DEVFREQ_EVENT
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help
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This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
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It sets the frequency for the memory controller and reads the usage counts
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from hardware.
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config ARM_SUN8I_A33_MBUS_DEVFREQ
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tristate "sun8i/sun50i MBUS DEVFREQ Driver"
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depends on ARCH_SUNXI || COMPILE_TEST
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depends on COMMON_CLK
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select DEVFREQ_GOV_SIMPLE_ONDEMAND
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help
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This adds the DEVFREQ driver for the MBUS controller in some
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Allwinner sun8i (A33 through H3) and sun50i (A64 and H5) SoCs.
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source "drivers/devfreq/event/Kconfig"
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endif # PM_DEVFREQ
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