62 lines
2.2 KiB
C
62 lines
2.2 KiB
C
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/*
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* Copyright 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "amdgpu.h"
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#include "df_v4_3.h"
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#include "df/df_4_3_offset.h"
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#include "df/df_4_3_sh_mask.h"
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static bool df_v4_3_query_ras_poison_mode(struct amdgpu_device *adev)
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{
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uint32_t hw_assert_msklo, hw_assert_mskhi;
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uint32_t v0, v1, v28, v31;
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hw_assert_msklo = RREG32_SOC15(DF, 0,
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regDF_CS_UMC_AON0_HardwareAssertMaskLow);
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hw_assert_mskhi = RREG32_SOC15(DF, 0,
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regDF_NCS_PG0_HardwareAssertMaskHigh);
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v0 = REG_GET_FIELD(hw_assert_msklo,
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DF_CS_UMC_AON0_HardwareAssertMaskLow, HWAssertMsk0);
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v1 = REG_GET_FIELD(hw_assert_msklo,
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DF_CS_UMC_AON0_HardwareAssertMaskLow, HWAssertMsk1);
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v28 = REG_GET_FIELD(hw_assert_mskhi,
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DF_NCS_PG0_HardwareAssertMaskHigh, HWAssertMsk28);
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v31 = REG_GET_FIELD(hw_assert_mskhi,
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DF_NCS_PG0_HardwareAssertMaskHigh, HWAssertMsk31);
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if (v0 && v1 && v28 && v31)
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return true;
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else if (!v0 && !v1 && !v28 && !v31)
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return false;
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else {
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dev_warn(adev->dev, "DF poison setting is inconsistent(%d:%d:%d:%d)!\n",
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v0, v1, v28, v31);
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return false;
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}
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}
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const struct amdgpu_df_funcs df_v4_3_funcs = {
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.query_ras_poison_mode = df_v4_3_query_ras_poison_mode,
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};
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