363 lines
12 KiB
C
363 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright 2016-2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "kfd_kernel_queue.h"
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#include "kfd_device_queue_manager.h"
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#include "kfd_pm4_headers_ai.h"
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#include "kfd_pm4_headers_aldebaran.h"
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#include "kfd_pm4_opcodes.h"
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#include "gc/gc_10_1_0_sh_mask.h"
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static int pm_map_process_v9(struct packet_manager *pm,
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uint32_t *buffer, struct qcm_process_device *qpd)
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{
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struct pm4_mes_map_process *packet;
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uint64_t vm_page_table_base_addr = qpd->page_table_base;
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packet = (struct pm4_mes_map_process *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_map_process));
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packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,
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sizeof(struct pm4_mes_map_process));
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packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
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packet->bitfields2.process_quantum = 10;
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packet->bitfields2.pasid = qpd->pqm->process->pasid;
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packet->bitfields14.gds_size = qpd->gds_size & 0x3F;
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packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF;
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packet->bitfields14.num_gws = (qpd->mapped_gws_queue) ? qpd->num_gws : 0;
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packet->bitfields14.num_oac = qpd->num_oac;
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packet->bitfields14.sdma_enable = 1;
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packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count;
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packet->sh_mem_config = qpd->sh_mem_config;
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packet->sh_mem_bases = qpd->sh_mem_bases;
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if (qpd->tba_addr) {
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packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8);
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/* On GFX9, unlike GFX10, bit TRAP_EN of SQ_SHADER_TBA_HI is
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* not defined, so setting it won't do any harm.
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*/
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packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8)
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| 1 << SQ_SHADER_TBA_HI__TRAP_EN__SHIFT;
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packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8);
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packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8);
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}
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packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);
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packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);
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packet->vm_context_page_table_base_addr_lo32 =
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lower_32_bits(vm_page_table_base_addr);
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packet->vm_context_page_table_base_addr_hi32 =
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upper_32_bits(vm_page_table_base_addr);
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return 0;
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}
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static int pm_map_process_aldebaran(struct packet_manager *pm,
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uint32_t *buffer, struct qcm_process_device *qpd)
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{
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struct pm4_mes_map_process_aldebaran *packet;
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uint64_t vm_page_table_base_addr = qpd->page_table_base;
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packet = (struct pm4_mes_map_process_aldebaran *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_map_process_aldebaran));
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packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,
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sizeof(struct pm4_mes_map_process_aldebaran));
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packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
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packet->bitfields2.process_quantum = 10;
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packet->bitfields2.pasid = qpd->pqm->process->pasid;
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packet->bitfields14.gds_size = qpd->gds_size & 0x3F;
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packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF;
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packet->bitfields14.num_gws = (qpd->mapped_gws_queue) ? qpd->num_gws : 0;
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packet->bitfields14.num_oac = qpd->num_oac;
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packet->bitfields14.sdma_enable = 1;
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packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count;
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packet->sh_mem_config = qpd->sh_mem_config;
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packet->sh_mem_bases = qpd->sh_mem_bases;
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if (qpd->tba_addr) {
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packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8);
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packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8);
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packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8);
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}
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packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);
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packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);
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packet->vm_context_page_table_base_addr_lo32 =
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lower_32_bits(vm_page_table_base_addr);
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packet->vm_context_page_table_base_addr_hi32 =
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upper_32_bits(vm_page_table_base_addr);
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return 0;
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}
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static int pm_runlist_v9(struct packet_manager *pm, uint32_t *buffer,
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uint64_t ib, size_t ib_size_in_dwords, bool chain)
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{
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struct pm4_mes_runlist *packet;
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int concurrent_proc_cnt = 0;
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struct kfd_dev *kfd = pm->dqm->dev;
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/* Determine the number of processes to map together to HW:
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* it can not exceed the number of VMIDs available to the
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* scheduler, and it is determined by the smaller of the number
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* of processes in the runlist and kfd module parameter
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* hws_max_conc_proc.
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* Note: the arbitration between the number of VMIDs and
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* hws_max_conc_proc has been done in
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* kgd2kfd_device_init().
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*/
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concurrent_proc_cnt = min(pm->dqm->processes_count,
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kfd->max_proc_per_quantum);
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packet = (struct pm4_mes_runlist *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_runlist));
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packet->header.u32All = pm_build_pm4_header(IT_RUN_LIST,
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sizeof(struct pm4_mes_runlist));
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packet->bitfields4.ib_size = ib_size_in_dwords;
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packet->bitfields4.chain = chain ? 1 : 0;
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packet->bitfields4.offload_polling = 0;
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packet->bitfields4.chained_runlist_idle_disable = chain ? 1 : 0;
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packet->bitfields4.valid = 1;
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packet->bitfields4.process_cnt = concurrent_proc_cnt;
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packet->ordinal2 = lower_32_bits(ib);
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packet->ib_base_hi = upper_32_bits(ib);
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return 0;
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}
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static int pm_set_resources_v9(struct packet_manager *pm, uint32_t *buffer,
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struct scheduling_resources *res)
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{
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struct pm4_mes_set_resources *packet;
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packet = (struct pm4_mes_set_resources *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_set_resources));
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packet->header.u32All = pm_build_pm4_header(IT_SET_RESOURCES,
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sizeof(struct pm4_mes_set_resources));
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packet->bitfields2.queue_type =
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queue_type__mes_set_resources__hsa_interface_queue_hiq;
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packet->bitfields2.vmid_mask = res->vmid_mask;
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packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100;
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packet->bitfields7.oac_mask = res->oac_mask;
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packet->bitfields8.gds_heap_base = res->gds_heap_base;
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packet->bitfields8.gds_heap_size = res->gds_heap_size;
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packet->gws_mask_lo = lower_32_bits(res->gws_mask);
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packet->gws_mask_hi = upper_32_bits(res->gws_mask);
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packet->queue_mask_lo = lower_32_bits(res->queue_mask);
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packet->queue_mask_hi = upper_32_bits(res->queue_mask);
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return 0;
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}
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static inline bool pm_use_ext_eng(struct kfd_dev *dev)
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{
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return dev->adev->ip_versions[SDMA0_HWIP][0] >= IP_VERSION(5, 2, 0);
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}
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static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer,
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struct queue *q, bool is_static)
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{
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struct pm4_mes_map_queues *packet;
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bool use_static = is_static;
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packet = (struct pm4_mes_map_queues *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_map_queues));
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packet->header.u32All = pm_build_pm4_header(IT_MAP_QUEUES,
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sizeof(struct pm4_mes_map_queues));
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packet->bitfields2.num_queues = 1;
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packet->bitfields2.queue_sel =
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queue_sel__mes_map_queues__map_to_hws_determined_queue_slots_vi;
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packet->bitfields2.engine_sel =
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engine_sel__mes_map_queues__compute_vi;
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packet->bitfields2.gws_control_queue = q->gws ? 1 : 0;
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packet->bitfields2.extended_engine_sel =
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extended_engine_sel__mes_map_queues__legacy_engine_sel;
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packet->bitfields2.queue_type =
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queue_type__mes_map_queues__normal_compute_vi;
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switch (q->properties.type) {
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case KFD_QUEUE_TYPE_COMPUTE:
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if (use_static)
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packet->bitfields2.queue_type =
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queue_type__mes_map_queues__normal_latency_static_queue_vi;
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break;
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case KFD_QUEUE_TYPE_DIQ:
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packet->bitfields2.queue_type =
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queue_type__mes_map_queues__debug_interface_queue_vi;
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break;
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case KFD_QUEUE_TYPE_SDMA:
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case KFD_QUEUE_TYPE_SDMA_XGMI:
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use_static = false; /* no static queues under SDMA */
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if (q->properties.sdma_engine_id < 2 && !pm_use_ext_eng(q->device))
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packet->bitfields2.engine_sel = q->properties.sdma_engine_id +
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engine_sel__mes_map_queues__sdma0_vi;
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else {
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packet->bitfields2.extended_engine_sel =
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extended_engine_sel__mes_map_queues__sdma0_to_7_sel;
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packet->bitfields2.engine_sel = q->properties.sdma_engine_id;
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}
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break;
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default:
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WARN(1, "queue type %d", q->properties.type);
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return -EINVAL;
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}
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packet->bitfields3.doorbell_offset =
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q->properties.doorbell_off;
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packet->mqd_addr_lo =
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lower_32_bits(q->gart_mqd_addr);
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packet->mqd_addr_hi =
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upper_32_bits(q->gart_mqd_addr);
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packet->wptr_addr_lo =
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lower_32_bits((uint64_t)q->properties.write_ptr);
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packet->wptr_addr_hi =
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upper_32_bits((uint64_t)q->properties.write_ptr);
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return 0;
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}
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static int pm_unmap_queues_v9(struct packet_manager *pm, uint32_t *buffer,
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enum kfd_unmap_queues_filter filter,
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uint32_t filter_param, bool reset)
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{
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struct pm4_mes_unmap_queues *packet;
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packet = (struct pm4_mes_unmap_queues *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_unmap_queues));
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packet->header.u32All = pm_build_pm4_header(IT_UNMAP_QUEUES,
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sizeof(struct pm4_mes_unmap_queues));
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packet->bitfields2.extended_engine_sel = pm_use_ext_eng(pm->dqm->dev) ?
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extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel :
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extended_engine_sel__mes_unmap_queues__legacy_engine_sel;
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packet->bitfields2.engine_sel =
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engine_sel__mes_unmap_queues__compute;
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if (reset)
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packet->bitfields2.action =
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action__mes_unmap_queues__reset_queues;
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else
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packet->bitfields2.action =
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action__mes_unmap_queues__preempt_queues;
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switch (filter) {
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case KFD_UNMAP_QUEUES_FILTER_BY_PASID:
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__perform_request_on_pasid_queues;
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packet->bitfields3a.pasid = filter_param;
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break;
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case KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES:
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__unmap_all_queues;
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break;
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case KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES:
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/* in this case, we do not preempt static queues */
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__unmap_all_non_static_queues;
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break;
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default:
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WARN(1, "filter %d", filter);
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return -EINVAL;
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}
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return 0;
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}
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static int pm_query_status_v9(struct packet_manager *pm, uint32_t *buffer,
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uint64_t fence_address, uint64_t fence_value)
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{
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struct pm4_mes_query_status *packet;
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packet = (struct pm4_mes_query_status *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_query_status));
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packet->header.u32All = pm_build_pm4_header(IT_QUERY_STATUS,
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sizeof(struct pm4_mes_query_status));
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packet->bitfields2.context_id = 0;
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packet->bitfields2.interrupt_sel =
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interrupt_sel__mes_query_status__completion_status;
|
||
|
|
packet->bitfields2.command =
|
||
|
|
command__mes_query_status__fence_only_after_write_ack;
|
||
|
|
|
||
|
|
packet->addr_hi = upper_32_bits((uint64_t)fence_address);
|
||
|
|
packet->addr_lo = lower_32_bits((uint64_t)fence_address);
|
||
|
|
packet->data_hi = upper_32_bits((uint64_t)fence_value);
|
||
|
|
packet->data_lo = lower_32_bits((uint64_t)fence_value);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
const struct packet_manager_funcs kfd_v9_pm_funcs = {
|
||
|
|
.map_process = pm_map_process_v9,
|
||
|
|
.runlist = pm_runlist_v9,
|
||
|
|
.set_resources = pm_set_resources_v9,
|
||
|
|
.map_queues = pm_map_queues_v9,
|
||
|
|
.unmap_queues = pm_unmap_queues_v9,
|
||
|
|
.query_status = pm_query_status_v9,
|
||
|
|
.release_mem = NULL,
|
||
|
|
.map_process_size = sizeof(struct pm4_mes_map_process),
|
||
|
|
.runlist_size = sizeof(struct pm4_mes_runlist),
|
||
|
|
.set_resources_size = sizeof(struct pm4_mes_set_resources),
|
||
|
|
.map_queues_size = sizeof(struct pm4_mes_map_queues),
|
||
|
|
.unmap_queues_size = sizeof(struct pm4_mes_unmap_queues),
|
||
|
|
.query_status_size = sizeof(struct pm4_mes_query_status),
|
||
|
|
.release_mem_size = 0,
|
||
|
|
};
|
||
|
|
|
||
|
|
const struct packet_manager_funcs kfd_aldebaran_pm_funcs = {
|
||
|
|
.map_process = pm_map_process_aldebaran,
|
||
|
|
.runlist = pm_runlist_v9,
|
||
|
|
.set_resources = pm_set_resources_v9,
|
||
|
|
.map_queues = pm_map_queues_v9,
|
||
|
|
.unmap_queues = pm_unmap_queues_v9,
|
||
|
|
.query_status = pm_query_status_v9,
|
||
|
|
.release_mem = NULL,
|
||
|
|
.map_process_size = sizeof(struct pm4_mes_map_process_aldebaran),
|
||
|
|
.runlist_size = sizeof(struct pm4_mes_runlist),
|
||
|
|
.set_resources_size = sizeof(struct pm4_mes_set_resources),
|
||
|
|
.map_queues_size = sizeof(struct pm4_mes_map_queues),
|
||
|
|
.unmap_queues_size = sizeof(struct pm4_mes_unmap_queues),
|
||
|
|
.query_status_size = sizeof(struct pm4_mes_query_status),
|
||
|
|
.release_mem_size = 0,
|
||
|
|
};
|