98 lines
4.1 KiB
C
98 lines
4.1 KiB
C
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/*
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* Copyright 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef _DCN31_RESOURCE_H_
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#define _DCN31_RESOURCE_H_
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#include "core_types.h"
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#define TO_DCN31_RES_POOL(pool)\
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container_of(pool, struct dcn31_resource_pool, base)
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extern struct _vcs_dpi_ip_params_st dcn3_1_ip;
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struct dcn31_resource_pool {
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struct resource_pool base;
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};
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bool dcn31_validate_bandwidth(struct dc *dc,
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struct dc_state *context,
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bool fast_validate);
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void dcn31_calculate_wm_and_dlg(
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struct dc *dc, struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int pipe_cnt,
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int vlevel);
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int dcn31_populate_dml_pipes_from_context(
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struct dc *dc, struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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bool fast_validate);
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void
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dcn31_populate_dml_writeback_from_context(struct dc *dc,
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struct resource_context *res_ctx,
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display_e2e_pipe_params_st *pipes);
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void
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dcn31_set_mcif_arb_params(struct dc *dc,
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struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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int pipe_cnt);
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struct resource_pool *dcn31_create_resource_pool(
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const struct dc_init_data *init_data,
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struct dc *dc);
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/*temp: B0 specific before switch to dcn313 headers*/
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#ifndef regPHYPLLF_PIXCLK_RESYNC_CNTL
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#define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
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#define regPHYPLLF_PIXCLK_RESYNC_CNTL_BASE_IDX 1
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#define regPHYPLLG_PIXCLK_RESYNC_CNTL 0x005f
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#define regPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX 1
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//PHYPLLF_PIXCLK_RESYNC_CNTL
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_RESYNC_ENABLE__SHIFT 0x0
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_DEEP_COLOR_DTO_ENABLE_STATUS__SHIFT 0x1
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_DCCG_DEEP_COLOR_CNTL__SHIFT 0x4
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_DOUBLE_RATE_ENABLE__SHIFT 0x9
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_RESYNC_ENABLE_MASK 0x00000001L
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_DEEP_COLOR_DTO_ENABLE_STATUS_MASK 0x00000002L
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_DCCG_DEEP_COLOR_CNTL_MASK 0x00000030L
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE_MASK 0x00000100L
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#define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_DOUBLE_RATE_ENABLE_MASK 0x00000200L
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//PHYPLLG_PIXCLK_RESYNC_CNTL
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_PIXCLK_RESYNC_ENABLE__SHIFT 0x0
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_DEEP_COLOR_DTO_ENABLE_STATUS__SHIFT 0x1
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_DCCG_DEEP_COLOR_CNTL__SHIFT 0x4
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_PIXCLK_ENABLE__SHIFT 0x8
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_PIXCLK_DOUBLE_RATE_ENABLE__SHIFT 0x9
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_PIXCLK_RESYNC_ENABLE_MASK 0x00000001L
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_DEEP_COLOR_DTO_ENABLE_STATUS_MASK 0x00000002L
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_DCCG_DEEP_COLOR_CNTL_MASK 0x00000030L
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_PIXCLK_ENABLE_MASK 0x00000100L
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#define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_PIXCLK_DOUBLE_RATE_ENABLE_MASK 0x00000200L
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#endif
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#endif /* _DCN31_RESOURCE_H_ */
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