457 lines
12 KiB
C
457 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* i.MX IPUv3 Graphics driver
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*
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* Copyright (C) 2011 Sascha Hauer, Pengutronix
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/errno.h>
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <video/imx-ipu-v3.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_gem_dma_helper.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include "imx-drm.h"
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#include "ipuv3-plane.h"
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#define DRIVER_DESC "i.MX IPUv3 Graphics"
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struct ipu_crtc {
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struct device *dev;
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struct drm_crtc base;
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/* plane[0] is the full plane, plane[1] is the partial plane */
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struct ipu_plane *plane[2];
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struct ipu_dc *dc;
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struct ipu_di *di;
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int irq;
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struct drm_pending_vblank_event *event;
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};
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static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
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{
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return container_of(crtc, struct ipu_crtc, base);
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}
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static void ipu_crtc_atomic_enable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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ipu_prg_enable(ipu);
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ipu_dc_enable(ipu);
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ipu_dc_enable_channel(ipu_crtc->dc);
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ipu_di_enable(ipu_crtc->di);
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}
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static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc,
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struct drm_crtc_state *old_crtc_state)
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{
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bool disable_partial = false;
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bool disable_full = false;
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struct drm_plane *plane;
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drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) {
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if (plane == &ipu_crtc->plane[0]->base)
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disable_full = true;
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if (ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base)
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disable_partial = true;
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}
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if (disable_partial)
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ipu_plane_disable(ipu_crtc->plane[1], true);
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if (disable_full)
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ipu_plane_disable(ipu_crtc->plane[0], true);
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}
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static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
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crtc);
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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ipu_dc_disable_channel(ipu_crtc->dc);
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ipu_di_disable(ipu_crtc->di);
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/*
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* Planes must be disabled before DC clock is removed, as otherwise the
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* attached IDMACs will be left in undefined state, possibly hanging
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* the IPU or even system.
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*/
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ipu_crtc_disable_planes(ipu_crtc, old_crtc_state);
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ipu_dc_disable(ipu);
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ipu_prg_disable(ipu);
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drm_crtc_vblank_off(crtc);
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spin_lock_irq(&crtc->dev->event_lock);
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if (crtc->state->event && !crtc->state->active) {
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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crtc->state->event = NULL;
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}
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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static void imx_drm_crtc_reset(struct drm_crtc *crtc)
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{
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struct imx_crtc_state *state;
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if (crtc->state)
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__drm_atomic_helper_crtc_destroy_state(crtc->state);
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kfree(to_imx_crtc_state(crtc->state));
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crtc->state = NULL;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (state)
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__drm_atomic_helper_crtc_reset(crtc, &state->base);
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}
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static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
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{
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struct imx_crtc_state *state;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
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WARN_ON(state->base.crtc != crtc);
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state->base.crtc = crtc;
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return &state->base;
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}
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static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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__drm_atomic_helper_crtc_destroy_state(state);
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kfree(to_imx_crtc_state(state));
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}
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static int ipu_enable_vblank(struct drm_crtc *crtc)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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enable_irq(ipu_crtc->irq);
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return 0;
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}
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static void ipu_disable_vblank(struct drm_crtc *crtc)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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disable_irq_nosync(ipu_crtc->irq);
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}
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static const struct drm_crtc_funcs ipu_crtc_funcs = {
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.set_config = drm_atomic_helper_set_config,
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.page_flip = drm_atomic_helper_page_flip,
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.reset = imx_drm_crtc_reset,
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.atomic_duplicate_state = imx_drm_crtc_duplicate_state,
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.atomic_destroy_state = imx_drm_crtc_destroy_state,
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.enable_vblank = ipu_enable_vblank,
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.disable_vblank = ipu_disable_vblank,
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};
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static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
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{
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struct ipu_crtc *ipu_crtc = dev_id;
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struct drm_crtc *crtc = &ipu_crtc->base;
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unsigned long flags;
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int i;
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drm_crtc_handle_vblank(crtc);
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if (ipu_crtc->event) {
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for (i = 0; i < ARRAY_SIZE(ipu_crtc->plane); i++) {
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struct ipu_plane *plane = ipu_crtc->plane[i];
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if (!plane)
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continue;
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if (ipu_plane_atomic_update_pending(&plane->base))
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break;
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}
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if (i == ARRAY_SIZE(ipu_crtc->plane)) {
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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drm_crtc_send_vblank_event(crtc, ipu_crtc->event);
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ipu_crtc->event = NULL;
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drm_crtc_vblank_put(crtc);
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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}
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}
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return IRQ_HANDLED;
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}
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static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct videomode vm;
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int ret;
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drm_display_mode_to_videomode(adjusted_mode, &vm);
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ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
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if (ret)
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return false;
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if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
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return false;
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drm_display_mode_from_videomode(&vm, adjusted_mode);
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return true;
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}
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static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
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crtc);
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u32 primary_plane_mask = drm_plane_mask(crtc->primary);
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if (crtc_state->active && (primary_plane_mask & crtc_state->plane_mask) == 0)
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return -EINVAL;
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return 0;
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}
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static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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drm_crtc_vblank_on(crtc);
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}
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static void ipu_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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spin_lock_irq(&crtc->dev->event_lock);
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if (crtc->state->event) {
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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WARN_ON(drm_crtc_vblank_get(crtc));
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ipu_crtc->event = crtc->state->event;
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crtc->state->event = NULL;
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}
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_encoder *encoder;
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct drm_display_mode *mode = &crtc->state->adjusted_mode;
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struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
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struct ipu_di_signal_cfg sig_cfg = {};
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unsigned long encoder_types = 0;
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dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
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mode->hdisplay);
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dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
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mode->vdisplay);
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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if (encoder->crtc == crtc)
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encoder_types |= BIT(encoder->encoder_type);
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}
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dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
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__func__, encoder_types);
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/*
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* If we have DAC or LDB, then we need the IPU DI clock to be
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* the same as the LDB DI clock. For TVDAC, derive the IPU DI
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* clock from 27 MHz TVE_DI clock, but allow to divide it.
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*/
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if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
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BIT(DRM_MODE_ENCODER_LVDS)))
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sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
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else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
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sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
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else
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sig_cfg.clkflags = 0;
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sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
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/* Default to driving pixel data on negative clock edges */
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sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
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DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE);
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sig_cfg.bus_format = imx_crtc_state->bus_format;
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sig_cfg.v_to_h_sync = 0;
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sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
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sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
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drm_display_mode_to_videomode(mode, &sig_cfg.mode);
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if (!IS_ALIGNED(sig_cfg.mode.hactive, 8)) {
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unsigned int new_hactive = ALIGN(sig_cfg.mode.hactive, 8);
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dev_warn(ipu_crtc->dev, "8-pixel align hactive %d -> %d\n",
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sig_cfg.mode.hactive, new_hactive);
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sig_cfg.mode.hfront_porch = new_hactive - sig_cfg.mode.hactive;
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sig_cfg.mode.hactive = new_hactive;
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}
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ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
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mode->flags & DRM_MODE_FLAG_INTERLACE,
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imx_crtc_state->bus_format, sig_cfg.mode.hactive);
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ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
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}
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static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
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.mode_fixup = ipu_crtc_mode_fixup,
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.mode_set_nofb = ipu_crtc_mode_set_nofb,
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.atomic_check = ipu_crtc_atomic_check,
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.atomic_begin = ipu_crtc_atomic_begin,
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.atomic_flush = ipu_crtc_atomic_flush,
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.atomic_disable = ipu_crtc_atomic_disable,
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.atomic_enable = ipu_crtc_atomic_enable,
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};
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static void ipu_put_resources(struct drm_device *dev, void *ptr)
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{
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struct ipu_crtc *ipu_crtc = ptr;
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if (!IS_ERR_OR_NULL(ipu_crtc->dc))
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ipu_dc_put(ipu_crtc->dc);
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if (!IS_ERR_OR_NULL(ipu_crtc->di))
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ipu_di_put(ipu_crtc->di);
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}
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static int ipu_get_resources(struct drm_device *dev, struct ipu_crtc *ipu_crtc,
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struct ipu_client_platformdata *pdata)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
|
||
|
|
if (IS_ERR(ipu_crtc->dc))
|
||
|
|
return PTR_ERR(ipu_crtc->dc);
|
||
|
|
|
||
|
|
ret = drmm_add_action_or_reset(dev, ipu_put_resources, ipu_crtc);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
ipu_crtc->di = ipu_di_get(ipu, pdata->di);
|
||
|
|
if (IS_ERR(ipu_crtc->di))
|
||
|
|
return PTR_ERR(ipu_crtc->di);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
|
||
|
|
{
|
||
|
|
struct ipu_client_platformdata *pdata = dev->platform_data;
|
||
|
|
struct ipu_soc *ipu = dev_get_drvdata(dev->parent);
|
||
|
|
struct drm_device *drm = data;
|
||
|
|
struct ipu_plane *primary_plane;
|
||
|
|
struct ipu_crtc *ipu_crtc;
|
||
|
|
struct drm_crtc *crtc;
|
||
|
|
int dp = -EINVAL;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (pdata->dp >= 0)
|
||
|
|
dp = IPU_DP_FLOW_SYNC_BG;
|
||
|
|
primary_plane = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
|
||
|
|
DRM_PLANE_TYPE_PRIMARY);
|
||
|
|
if (IS_ERR(primary_plane))
|
||
|
|
return PTR_ERR(primary_plane);
|
||
|
|
|
||
|
|
ipu_crtc = drmm_crtc_alloc_with_planes(drm, struct ipu_crtc, base,
|
||
|
|
&primary_plane->base, NULL,
|
||
|
|
&ipu_crtc_funcs, NULL);
|
||
|
|
if (IS_ERR(ipu_crtc))
|
||
|
|
return PTR_ERR(ipu_crtc);
|
||
|
|
|
||
|
|
ipu_crtc->dev = dev;
|
||
|
|
ipu_crtc->plane[0] = primary_plane;
|
||
|
|
|
||
|
|
crtc = &ipu_crtc->base;
|
||
|
|
crtc->port = pdata->of_node;
|
||
|
|
drm_crtc_helper_add(crtc, &ipu_helper_funcs);
|
||
|
|
|
||
|
|
ret = ipu_get_resources(drm, ipu_crtc, pdata);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
|
||
|
|
ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If this crtc is using the DP, add an overlay plane */
|
||
|
|
if (pdata->dp >= 0 && pdata->dma[1] > 0) {
|
||
|
|
ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
|
||
|
|
IPU_DP_FLOW_SYNC_FG,
|
||
|
|
drm_crtc_mask(&ipu_crtc->base),
|
||
|
|
DRM_PLANE_TYPE_OVERLAY);
|
||
|
|
if (IS_ERR(ipu_crtc->plane[1]))
|
||
|
|
ipu_crtc->plane[1] = NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
|
||
|
|
ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
|
||
|
|
"imx_drm", ipu_crtc);
|
||
|
|
if (ret < 0) {
|
||
|
|
dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
/* Only enable IRQ when we actually need it to trigger work. */
|
||
|
|
disable_irq(ipu_crtc->irq);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct component_ops ipu_crtc_ops = {
|
||
|
|
.bind = ipu_drm_bind,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int ipu_drm_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct device *dev = &pdev->dev;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (!dev->platform_data)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return component_add(dev, &ipu_crtc_ops);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ipu_drm_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
component_del(&pdev->dev, &ipu_crtc_ops);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
struct platform_driver ipu_drm_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "imx-ipuv3-crtc",
|
||
|
|
},
|
||
|
|
.probe = ipu_drm_probe,
|
||
|
|
.remove = ipu_drm_remove,
|
||
|
|
};
|