254 lines
6.2 KiB
C
254 lines
6.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ddbridge-mci.h: Digital Devices micro code interface
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*
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* Copyright (C) 2017-2018 Digital Devices GmbH
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* Marcus Metzler <mocm@metzlerbros.de>
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* Ralph Metzler <rjkm@metzlerbros.de>
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*/
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#ifndef _DDBRIDGE_MCI_H_
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#define _DDBRIDGE_MCI_H_
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#define MCI_DEMOD_MAX 8
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#define MCI_TUNER_MAX 4
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#define DEMOD_UNUSED (0xFF)
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#define MCI_CONTROL (0x500)
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#define MCI_COMMAND (0x600)
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#define MCI_RESULT (0x680)
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#define MCI_COMMAND_SIZE (0x80)
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#define MCI_RESULT_SIZE (0x80)
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#define MCI_CONTROL_START_COMMAND (0x00000001)
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#define MCI_CONTROL_ENABLE_DONE_INTERRUPT (0x00000002)
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#define MCI_CONTROL_RESET (0x00008000)
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#define MCI_CONTROL_READY (0x00010000)
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#define SX8_TSCONFIG (0x280)
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#define SX8_TSCONFIG_MODE_MASK (0x00000003)
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#define SX8_TSCONFIG_MODE_OFF (0x00000000)
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#define SX8_TSCONFIG_MODE_NORMAL (0x00000001)
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#define SX8_TSCONFIG_MODE_IQ (0x00000003)
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/*
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* IQMode is only available on MaxSX8 on a single tuner
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*
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* IQ_MODE_SAMPLES
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* sampling rate is 1550/24 MHz (64.583 MHz)
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* channel agc is frozen, to allow stitching the FFT results together
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*
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* IQ_MODE_VTM
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* sampling rate is the supplied symbolrate
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* channel agc is active
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*
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* in both cases down sampling is done with a RRC Filter (currently fixed to
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* alpha = 0.05) which causes some (ca 5%) aliasing at the edges from
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* outside the spectrum
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*/
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#define SX8_TSCONFIG_TSHEADER (0x00000004)
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#define SX8_TSCONFIG_BURST (0x00000008)
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#define SX8_TSCONFIG_BURSTSIZE_MASK (0x00000030)
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#define SX8_TSCONFIG_BURSTSIZE_2K (0x00000000)
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#define SX8_TSCONFIG_BURSTSIZE_4K (0x00000010)
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#define SX8_TSCONFIG_BURSTSIZE_8K (0x00000020)
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#define SX8_TSCONFIG_BURSTSIZE_16K (0x00000030)
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#define SX8_DEMOD_STOPPED (0)
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#define SX8_DEMOD_IQ_MODE (1)
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#define SX8_DEMOD_WAIT_SIGNAL (2)
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#define SX8_DEMOD_WAIT_MATYPE (3)
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#define SX8_DEMOD_TIMEOUT (14)
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#define SX8_DEMOD_LOCKED (15)
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#define MCI_CMD_STOP (0x01)
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#define MCI_CMD_GETSTATUS (0x02)
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#define MCI_CMD_GETSIGNALINFO (0x03)
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#define MCI_CMD_RFPOWER (0x04)
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#define MCI_CMD_SEARCH_DVBS (0x10)
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#define MCI_CMD_GET_IQSYMBOL (0x30)
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#define SX8_CMD_INPUT_ENABLE (0x40)
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#define SX8_CMD_INPUT_DISABLE (0x41)
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#define SX8_CMD_START_IQ (0x42)
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#define SX8_CMD_STOP_IQ (0x43)
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#define SX8_CMD_ENABLE_IQOUTPUT (0x44)
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#define SX8_CMD_DISABLE_IQOUTPUT (0x45)
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#define MCI_STATUS_OK (0x00)
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#define MCI_STATUS_UNSUPPORTED (0x80)
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#define MCI_STATUS_RETRY (0xFD)
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#define MCI_STATUS_NOT_READY (0xFE)
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#define MCI_STATUS_ERROR (0xFF)
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#define MCI_SUCCESS(status) ((status & MCI_STATUS_UNSUPPORTED) == 0)
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struct mci_command {
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union {
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u32 command_word;
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struct {
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u8 command;
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u8 tuner;
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u8 demod;
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u8 output;
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};
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};
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union {
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u32 params[31];
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struct {
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/*
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* Bit 0: DVB-S Enabled
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* Bit 1: DVB-S2 Enabled
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* Bit 7: InputStreamID
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*/
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u8 flags;
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/*
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* Bit 0: QPSK,
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* Bit 1: 8PSK/8APSK
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* Bit 2: 16APSK
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* Bit 3: 32APSK
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* Bit 4: 64APSK
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* Bit 5: 128APSK
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* Bit 6: 256APSK
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*/
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u8 s2_modulation_mask;
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u8 rsvd1;
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u8 retry;
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u32 frequency;
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u32 symbol_rate;
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u8 input_stream_id;
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u8 rsvd2[3];
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u32 scrambling_sequence_index;
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u32 frequency_range;
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} dvbs2_search;
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struct {
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u8 tap;
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u8 rsvd;
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u16 point;
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} get_iq_symbol;
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struct {
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/*
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* Bit 0: 0=VTM/1=SCAN
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* Bit 1: Set Gain
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*/
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u8 flags;
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u8 roll_off;
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u8 rsvd1;
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u8 rsvd2;
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u32 frequency;
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u32 symbol_rate; /* Only in VTM mode */
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u16 gain;
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} sx8_start_iq;
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struct {
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/*
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* Bit 1:0 = STVVGLNA Gain.
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* 0 = AGC, 1 = 0dB, 2 = Minimum, 3 = Maximum
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*/
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u8 flags;
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} sx8_input_enable;
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};
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};
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struct mci_result {
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union {
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u32 status_word;
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struct {
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u8 status;
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u8 mode;
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u16 time;
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};
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};
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union {
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u32 result[27];
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struct {
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/* 1 = DVB-S, 2 = DVB-S2X */
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u8 standard;
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/* puncture rate for DVB-S */
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u8 pls_code;
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/* 2-0: rolloff */
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u8 roll_off;
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u8 rsvd;
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/* actual frequency in Hz */
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u32 frequency;
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/* actual symbolrate in Hz */
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u32 symbol_rate;
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/* channel power in dBm x 100 */
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s16 channel_power;
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/* band power in dBm x 100 */
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s16 band_power;
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/*
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* SNR in dB x 100
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* Note: negative values are valid in DVB-S2
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*/
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s16 signal_to_noise;
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s16 rsvd2;
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/*
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* Counter for packet errors
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* (set to 0 on start command)
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*/
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u32 packet_errors;
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/* Bit error rate: PreRS in DVB-S, PreBCH in DVB-S2X */
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u32 ber_numerator;
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u32 ber_denominator;
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} dvbs2_signal_info;
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struct {
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s16 i;
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s16 q;
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} iq_symbol;
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};
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u32 version[4];
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};
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struct mci_base {
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struct list_head mci_list;
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void *key;
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struct ddb_link *link;
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struct completion completion;
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struct device *dev;
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struct mutex tuner_lock; /* concurrent tuner access lock */
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struct mutex mci_lock; /* concurrent MCI access lock */
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int count;
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int type;
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};
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struct mci {
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struct mci_base *base;
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struct dvb_frontend fe;
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int nr;
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int demod;
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int tuner;
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};
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struct mci_cfg {
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int type;
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struct dvb_frontend_ops *fe_ops;
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u32 base_size;
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u32 state_size;
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int (*init)(struct mci *mci);
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int (*base_init)(struct mci_base *mci_base);
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int (*set_input)(struct dvb_frontend *fe, int input);
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};
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/* defined in ddbridge-sx8.c */
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extern const struct mci_cfg ddb_max_sx8_cfg;
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int ddb_mci_cmd(struct mci *state, struct mci_command *command,
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struct mci_result *result);
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int ddb_mci_config(struct mci *state, u32 config);
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struct dvb_frontend
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*ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr,
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int (**fn_set_input)(struct dvb_frontend *fe, int input));
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#endif /* _DDBRIDGE_MCI_H_ */
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