442 lines
13 KiB
C
442 lines
13 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Hantro VPU codec driver
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*
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* Copyright 2018 Google LLC.
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* Tomasz Figa <tfiga@chromium.org>
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*/
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#ifndef HANTRO_HW_H_
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#define HANTRO_HW_H_
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#include <linux/interrupt.h>
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#include <linux/v4l2-controls.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-vp9.h>
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#include <media/videobuf2-core.h>
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#define DEC_8190_ALIGN_MASK 0x07U
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#define MB_DIM 16
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#define TILE_MB_DIM 4
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#define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM)
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#define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM)
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#define FMT_MIN_WIDTH 48
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#define FMT_MIN_HEIGHT 48
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#define FMT_HD_WIDTH 1280
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#define FMT_HD_HEIGHT 720
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#define FMT_FHD_WIDTH 1920
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#define FMT_FHD_HEIGHT 1088
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#define FMT_UHD_WIDTH 3840
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#define FMT_UHD_HEIGHT 2160
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#define FMT_4K_WIDTH 4096
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#define FMT_4K_HEIGHT 2304
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#define NUM_REF_PICTURES (V4L2_HEVC_DPB_ENTRIES_NUM_MAX + 1)
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struct hantro_dev;
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struct hantro_ctx;
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struct hantro_buf;
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struct hantro_variant;
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/**
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* struct hantro_aux_buf - auxiliary DMA buffer for hardware data
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*
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* @cpu: CPU pointer to the buffer.
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* @dma: DMA address of the buffer.
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* @size: Size of the buffer.
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* @attrs: Attributes of the DMA mapping.
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*/
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struct hantro_aux_buf {
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void *cpu;
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dma_addr_t dma;
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size_t size;
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unsigned long attrs;
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};
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/* Max. number of entries in the DPB (HW limitation). */
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#define HANTRO_H264_DPB_SIZE 16
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/**
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* struct hantro_h264_dec_ctrls
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*
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* @decode: Decode params
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* @scaling: Scaling info
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* @sps: SPS info
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* @pps: PPS info
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*/
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struct hantro_h264_dec_ctrls {
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const struct v4l2_ctrl_h264_decode_params *decode;
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const struct v4l2_ctrl_h264_scaling_matrix *scaling;
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const struct v4l2_ctrl_h264_sps *sps;
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const struct v4l2_ctrl_h264_pps *pps;
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};
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/**
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* struct hantro_h264_dec_reflists
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*
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* @p: P reflist
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* @b0: B0 reflist
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* @b1: B1 reflist
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*/
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struct hantro_h264_dec_reflists {
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struct v4l2_h264_reference p[V4L2_H264_REF_LIST_LEN];
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struct v4l2_h264_reference b0[V4L2_H264_REF_LIST_LEN];
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struct v4l2_h264_reference b1[V4L2_H264_REF_LIST_LEN];
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};
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/**
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* struct hantro_h264_dec_hw_ctx
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*
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* @priv: Private auxiliary buffer for hardware.
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* @dpb: DPB
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* @reflists: P/B0/B1 reflists
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* @ctrls: V4L2 controls attached to a run
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* @dpb_longterm: DPB long-term
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* @dpb_valid: DPB valid
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* @cur_poc: Current picture order count
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*/
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struct hantro_h264_dec_hw_ctx {
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struct hantro_aux_buf priv;
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struct v4l2_h264_dpb_entry dpb[HANTRO_H264_DPB_SIZE];
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struct hantro_h264_dec_reflists reflists;
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struct hantro_h264_dec_ctrls ctrls;
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u32 dpb_longterm;
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u32 dpb_valid;
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s32 cur_poc;
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};
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/**
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* struct hantro_hevc_dec_ctrls
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* @decode_params: Decode params
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* @scaling: Scaling matrix
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* @sps: SPS info
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* @pps: PPS info
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* @hevc_hdr_skip_length: the number of data (in bits) to skip in the
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* slice segment header syntax after 'slice type'
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* token
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*/
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struct hantro_hevc_dec_ctrls {
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const struct v4l2_ctrl_hevc_decode_params *decode_params;
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const struct v4l2_ctrl_hevc_scaling_matrix *scaling;
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const struct v4l2_ctrl_hevc_sps *sps;
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const struct v4l2_ctrl_hevc_pps *pps;
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u32 hevc_hdr_skip_length;
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};
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/**
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* struct hantro_hevc_dec_hw_ctx
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* @tile_sizes: Tile sizes buffer
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* @tile_filter: Tile vertical filter buffer
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* @tile_sao: Tile SAO buffer
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* @tile_bsd: Tile BSD control buffer
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* @ref_bufs: Internal reference buffers
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* @scaling_lists: Scaling lists buffer
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* @ref_bufs_poc: Internal reference buffers picture order count
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* @ref_bufs_used: Bitfield of used reference buffers
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* @ctrls: V4L2 controls attached to a run
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* @num_tile_cols_allocated: number of allocated tiles
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*/
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struct hantro_hevc_dec_hw_ctx {
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struct hantro_aux_buf tile_sizes;
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struct hantro_aux_buf tile_filter;
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struct hantro_aux_buf tile_sao;
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struct hantro_aux_buf tile_bsd;
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struct hantro_aux_buf ref_bufs[NUM_REF_PICTURES];
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struct hantro_aux_buf scaling_lists;
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s32 ref_bufs_poc[NUM_REF_PICTURES];
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u32 ref_bufs_used;
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struct hantro_hevc_dec_ctrls ctrls;
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unsigned int num_tile_cols_allocated;
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};
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/**
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* struct hantro_mpeg2_dec_hw_ctx
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*
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* @qtable: Quantization table
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*/
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struct hantro_mpeg2_dec_hw_ctx {
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struct hantro_aux_buf qtable;
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};
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/**
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* struct hantro_vp8_dec_hw_ctx
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*
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* @segment_map: Segment map buffer.
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* @prob_tbl: Probability table buffer.
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*/
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struct hantro_vp8_dec_hw_ctx {
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struct hantro_aux_buf segment_map;
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struct hantro_aux_buf prob_tbl;
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};
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/**
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* struct hantro_vp9_frame_info
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*
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* @valid: frame info valid flag
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* @frame_context_idx: index of frame context
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* @reference_mode: inter prediction type
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* @tx_mode: transform mode
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* @interpolation_filter: filter selection for inter prediction
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* @flags: frame flags
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* @timestamp: frame timestamp
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*/
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struct hantro_vp9_frame_info {
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u32 valid : 1;
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u32 frame_context_idx : 2;
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u32 reference_mode : 2;
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u32 tx_mode : 3;
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u32 interpolation_filter : 3;
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u32 flags;
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u64 timestamp;
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};
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#define MAX_SB_COLS 64
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#define MAX_SB_ROWS 34
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/**
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* struct hantro_vp9_dec_hw_ctx
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*
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* @tile_edge: auxiliary DMA buffer for tile edge processing
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* @segment_map: auxiliary DMA buffer for segment map
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* @misc: auxiliary DMA buffer for tile info, probabilities and hw counters
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* @cnts: vp9 library struct for abstracting hw counters access
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* @probability_tables: VP9 probability tables implied by the spec
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* @frame_context: VP9 frame contexts
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* @cur: current frame information
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* @last: last frame information
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* @bsd_ctrl_offset: bsd offset into tile_edge
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* @segment_map_size: size of segment map
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* @ctx_counters_offset: hw counters offset into misc
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* @tile_info_offset: tile info offset into misc
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* @tile_r_info: per-tile information array
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* @tile_c_info: per-tile information array
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* @last_tile_r: last number of tile rows
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* @last_tile_c: last number of tile cols
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* @last_sbs_r: last number of superblock rows
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* @last_sbs_c: last number of superblock cols
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* @active_segment: number of active segment (alternating between 0 and 1)
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* @feature_enabled: segmentation feature enabled flags
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* @feature_data: segmentation feature data
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*/
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struct hantro_vp9_dec_hw_ctx {
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struct hantro_aux_buf tile_edge;
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struct hantro_aux_buf segment_map;
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struct hantro_aux_buf misc;
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struct v4l2_vp9_frame_symbol_counts cnts;
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struct v4l2_vp9_frame_context probability_tables;
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struct v4l2_vp9_frame_context frame_context[4];
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struct hantro_vp9_frame_info cur;
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struct hantro_vp9_frame_info last;
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unsigned int bsd_ctrl_offset;
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unsigned int segment_map_size;
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unsigned int ctx_counters_offset;
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unsigned int tile_info_offset;
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unsigned short tile_r_info[MAX_SB_ROWS];
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unsigned short tile_c_info[MAX_SB_COLS];
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unsigned int last_tile_r;
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unsigned int last_tile_c;
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unsigned int last_sbs_r;
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unsigned int last_sbs_c;
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unsigned int active_segment;
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u8 feature_enabled[8];
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s16 feature_data[8][4];
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};
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/**
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* struct hantro_postproc_ctx
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*
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* @dec_q: References buffers, in decoder format.
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*/
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struct hantro_postproc_ctx {
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struct hantro_aux_buf dec_q[VB2_MAX_FRAME];
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};
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/**
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* struct hantro_postproc_ops - post-processor operations
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*
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* @enable: Enable the post-processor block. Optional.
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* @disable: Disable the post-processor block. Optional.
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* @enum_framesizes: Enumerate possible scaled output formats.
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* Returns zero if OK, a negative value in error cases.
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* Optional.
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*/
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struct hantro_postproc_ops {
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void (*enable)(struct hantro_ctx *ctx);
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void (*disable)(struct hantro_ctx *ctx);
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int (*enum_framesizes)(struct hantro_ctx *ctx, struct v4l2_frmsizeenum *fsize);
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};
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/**
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* struct hantro_codec_ops - codec mode specific operations
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*
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* @init: If needed, can be used for initialization.
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* Optional and called from process context.
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* @exit: If needed, can be used to undo the .init phase.
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* Optional and called from process context.
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* @run: Start single {en,de)coding job. Called from atomic context
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* to indicate that a pair of buffers is ready and the hardware
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* should be programmed and started. Returns zero if OK, a
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* negative value in error cases.
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* @done: Read back processing results and additional data from hardware.
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* @reset: Reset the hardware in case of a timeout.
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*/
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struct hantro_codec_ops {
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int (*init)(struct hantro_ctx *ctx);
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void (*exit)(struct hantro_ctx *ctx);
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int (*run)(struct hantro_ctx *ctx);
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void (*done)(struct hantro_ctx *ctx);
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void (*reset)(struct hantro_ctx *ctx);
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};
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/**
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* enum hantro_enc_fmt - source format ID for hardware registers.
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*
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* @ROCKCHIP_VPU_ENC_FMT_YUV420P: Y/CbCr 4:2:0 planar format
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* @ROCKCHIP_VPU_ENC_FMT_YUV420SP: Y/CbCr 4:2:0 semi-planar format
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* @ROCKCHIP_VPU_ENC_FMT_YUYV422: YUV 4:2:2 packed format (YUYV)
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* @ROCKCHIP_VPU_ENC_FMT_UYVY422: YUV 4:2:2 packed format (UYVY)
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*/
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enum hantro_enc_fmt {
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ROCKCHIP_VPU_ENC_FMT_YUV420P = 0,
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ROCKCHIP_VPU_ENC_FMT_YUV420SP = 1,
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ROCKCHIP_VPU_ENC_FMT_YUYV422 = 2,
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ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3,
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};
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extern const struct hantro_variant imx8mm_vpu_g1_variant;
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extern const struct hantro_variant imx8mq_vpu_g1_variant;
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extern const struct hantro_variant imx8mq_vpu_g2_variant;
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extern const struct hantro_variant imx8mq_vpu_variant;
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extern const struct hantro_variant px30_vpu_variant;
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extern const struct hantro_variant rk3036_vpu_variant;
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extern const struct hantro_variant rk3066_vpu_variant;
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extern const struct hantro_variant rk3288_vpu_variant;
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extern const struct hantro_variant rk3328_vpu_variant;
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extern const struct hantro_variant rk3399_vpu_variant;
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extern const struct hantro_variant rk3568_vepu_variant;
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extern const struct hantro_variant rk3568_vpu_variant;
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extern const struct hantro_variant sama5d4_vdec_variant;
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extern const struct hantro_variant sunxi_vpu_variant;
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extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
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extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
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extern const u32 hantro_vp8_dec_mc_filter[8][6];
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void hantro_watchdog(struct work_struct *work);
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void hantro_run(struct hantro_ctx *ctx);
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void hantro_irq_done(struct hantro_dev *vpu,
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enum vb2_buffer_state result);
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void hantro_start_prepare_run(struct hantro_ctx *ctx);
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void hantro_end_prepare_run(struct hantro_ctx *ctx);
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irqreturn_t hantro_g1_irq(int irq, void *dev_id);
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void hantro_g1_reset(struct hantro_ctx *ctx);
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int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
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int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx);
|
||
|
|
void hantro_h1_jpeg_enc_done(struct hantro_ctx *ctx);
|
||
|
|
void rockchip_vpu2_jpeg_enc_done(struct hantro_ctx *ctx);
|
||
|
|
|
||
|
|
dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx,
|
||
|
|
unsigned int dpb_idx);
|
||
|
|
u16 hantro_h264_get_ref_nbr(struct hantro_ctx *ctx,
|
||
|
|
unsigned int dpb_idx);
|
||
|
|
int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx);
|
||
|
|
int rockchip_vpu2_h264_dec_run(struct hantro_ctx *ctx);
|
||
|
|
int hantro_g1_h264_dec_run(struct hantro_ctx *ctx);
|
||
|
|
int hantro_h264_dec_init(struct hantro_ctx *ctx);
|
||
|
|
void hantro_h264_dec_exit(struct hantro_ctx *ctx);
|
||
|
|
|
||
|
|
int hantro_hevc_dec_init(struct hantro_ctx *ctx);
|
||
|
|
void hantro_hevc_dec_exit(struct hantro_ctx *ctx);
|
||
|
|
int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx);
|
||
|
|
int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx);
|
||
|
|
void hantro_hevc_ref_init(struct hantro_ctx *ctx);
|
||
|
|
dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, s32 poc);
|
||
|
|
int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr);
|
||
|
|
|
||
|
|
|
||
|
|
static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension)
|
||
|
|
{
|
||
|
|
return (dimension + 63) / 64;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline size_t
|
||
|
|
hantro_vp9_mv_size(unsigned int width, unsigned int height)
|
||
|
|
{
|
||
|
|
int num_ctbs;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* There can be up to (CTBs x 64) number of blocks,
|
||
|
|
* and the motion vector for each block needs 16 bytes.
|
||
|
|
*/
|
||
|
|
num_ctbs = hantro_vp9_num_sbs(width) * hantro_vp9_num_sbs(height);
|
||
|
|
return (num_ctbs * 64) * 16;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline size_t
|
||
|
|
hantro_h264_mv_size(unsigned int width, unsigned int height)
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* A decoded 8-bit 4:2:0 NV12 frame may need memory for up to
|
||
|
|
* 448 bytes per macroblock with additional 32 bytes on
|
||
|
|
* multi-core variants.
|
||
|
|
*
|
||
|
|
* The H264 decoder needs extra space on the output buffers
|
||
|
|
* to store motion vectors. This is needed for reference
|
||
|
|
* frames and only if the format is non-post-processed NV12.
|
||
|
|
*
|
||
|
|
* Memory layout is as follow:
|
||
|
|
*
|
||
|
|
* +---------------------------+
|
||
|
|
* | Y-plane 256 bytes x MBs |
|
||
|
|
* +---------------------------+
|
||
|
|
* | UV-plane 128 bytes x MBs |
|
||
|
|
* +---------------------------+
|
||
|
|
* | MV buffer 64 bytes x MBs |
|
||
|
|
* +---------------------------+
|
||
|
|
* | MC sync 32 bytes |
|
||
|
|
* +---------------------------+
|
||
|
|
*/
|
||
|
|
return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline size_t
|
||
|
|
hantro_hevc_mv_size(unsigned int width, unsigned int height)
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* A CTB can be 64x64, 32x32 or 16x16.
|
||
|
|
* Allocated memory for the "worse" case: 16x16
|
||
|
|
*/
|
||
|
|
return width * height / 16;
|
||
|
|
}
|
||
|
|
|
||
|
|
int hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx);
|
||
|
|
int rockchip_vpu2_mpeg2_dec_run(struct hantro_ctx *ctx);
|
||
|
|
void hantro_mpeg2_dec_copy_qtable(u8 *qtable,
|
||
|
|
const struct v4l2_ctrl_mpeg2_quantisation *ctrl);
|
||
|
|
int hantro_mpeg2_dec_init(struct hantro_ctx *ctx);
|
||
|
|
void hantro_mpeg2_dec_exit(struct hantro_ctx *ctx);
|
||
|
|
|
||
|
|
int hantro_g1_vp8_dec_run(struct hantro_ctx *ctx);
|
||
|
|
int rockchip_vpu2_vp8_dec_run(struct hantro_ctx *ctx);
|
||
|
|
int hantro_vp8_dec_init(struct hantro_ctx *ctx);
|
||
|
|
void hantro_vp8_dec_exit(struct hantro_ctx *ctx);
|
||
|
|
void hantro_vp8_prob_update(struct hantro_ctx *ctx,
|
||
|
|
const struct v4l2_ctrl_vp8_frame *hdr);
|
||
|
|
|
||
|
|
int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx);
|
||
|
|
void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx);
|
||
|
|
int hantro_vp9_dec_init(struct hantro_ctx *ctx);
|
||
|
|
void hantro_vp9_dec_exit(struct hantro_ctx *ctx);
|
||
|
|
void hantro_g2_check_idle(struct hantro_dev *vpu);
|
||
|
|
irqreturn_t hantro_g2_irq(int irq, void *dev_id);
|
||
|
|
|
||
|
|
#endif /* HANTRO_HW_H_ */
|