201 lines
5.1 KiB
C
201 lines
5.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Cortina Systems Gemini OF physmap add-on
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* Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
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*
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* This SoC has an elaborate flash control register, so we need to
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* detect and set it up when booting on this platform.
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*/
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#include <linux/export.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/xip.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/bitops.h>
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#include <linux/pinctrl/consumer.h>
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#include "physmap-gemini.h"
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/*
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* The Flash-relevant parts of the global status register
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* These would also be relevant for a NAND driver.
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*/
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#define GLOBAL_STATUS 0x04
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#define FLASH_TYPE_MASK (0x3 << 24)
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#define FLASH_TYPE_NAND_2K (0x3 << 24)
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#define FLASH_TYPE_NAND_512 (0x2 << 24)
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#define FLASH_TYPE_PARALLEL (0x1 << 24)
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#define FLASH_TYPE_SERIAL (0x0 << 24)
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/* if parallel */
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#define FLASH_WIDTH_16BIT (1 << 23) /* else 8 bit */
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/* if serial */
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#define FLASH_ATMEL (1 << 23) /* else STM */
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#define FLASH_SIZE_MASK (0x3 << 21)
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#define NAND_256M (0x3 << 21) /* and more */
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#define NAND_128M (0x2 << 21)
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#define NAND_64M (0x1 << 21)
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#define NAND_32M (0x0 << 21)
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#define ATMEL_16M (0x3 << 21) /* and more */
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#define ATMEL_8M (0x2 << 21)
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#define ATMEL_4M_2M (0x1 << 21)
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#define ATMEL_1M (0x0 << 21) /* and less */
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#define STM_32M (1 << 22) /* and more */
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#define STM_16M (0 << 22) /* and less */
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#define FLASH_PARALLEL_HIGH_PIN_CNT (1 << 20) /* else low pin cnt */
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struct gemini_flash {
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struct device *dev;
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struct pinctrl *p;
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struct pinctrl_state *enabled_state;
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struct pinctrl_state *disabled_state;
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};
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/* Static local state */
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static struct gemini_flash *gf;
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static void gemini_flash_enable_pins(void)
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{
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int ret;
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if (IS_ERR(gf->enabled_state))
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return;
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ret = pinctrl_select_state(gf->p, gf->enabled_state);
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if (ret)
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dev_err(gf->dev, "failed to enable pins\n");
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}
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static void gemini_flash_disable_pins(void)
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{
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int ret;
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if (IS_ERR(gf->disabled_state))
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return;
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ret = pinctrl_select_state(gf->p, gf->disabled_state);
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if (ret)
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dev_err(gf->dev, "failed to disable pins\n");
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}
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static map_word __xipram gemini_flash_map_read(struct map_info *map,
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unsigned long ofs)
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{
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map_word ret;
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gemini_flash_enable_pins();
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ret = inline_map_read(map, ofs);
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gemini_flash_disable_pins();
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return ret;
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}
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static void __xipram gemini_flash_map_write(struct map_info *map,
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const map_word datum,
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unsigned long ofs)
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{
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gemini_flash_enable_pins();
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inline_map_write(map, datum, ofs);
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gemini_flash_disable_pins();
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}
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static void __xipram gemini_flash_map_copy_from(struct map_info *map,
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void *to, unsigned long from,
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ssize_t len)
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{
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gemini_flash_enable_pins();
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inline_map_copy_from(map, to, from, len);
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gemini_flash_disable_pins();
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}
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static void __xipram gemini_flash_map_copy_to(struct map_info *map,
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unsigned long to,
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const void *from, ssize_t len)
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{
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gemini_flash_enable_pins();
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inline_map_copy_to(map, to, from, len);
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gemini_flash_disable_pins();
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}
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int of_flash_probe_gemini(struct platform_device *pdev,
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struct device_node *np,
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struct map_info *map)
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{
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struct regmap *rmap;
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struct device *dev = &pdev->dev;
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u32 val;
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int ret;
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/* Multiplatform guard */
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if (!of_device_is_compatible(np, "cortina,gemini-flash"))
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return 0;
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gf = devm_kzalloc(dev, sizeof(*gf), GFP_KERNEL);
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if (!gf)
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return -ENOMEM;
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gf->dev = dev;
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rmap = syscon_regmap_lookup_by_phandle(np, "syscon");
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if (IS_ERR(rmap)) {
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dev_err(dev, "no syscon\n");
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return PTR_ERR(rmap);
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}
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ret = regmap_read(rmap, GLOBAL_STATUS, &val);
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if (ret) {
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dev_err(dev, "failed to read global status register\n");
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return -ENODEV;
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}
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dev_dbg(dev, "global status reg: %08x\n", val);
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/*
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* It would be contradictory if a physmap flash was NOT parallel.
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*/
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if ((val & FLASH_TYPE_MASK) != FLASH_TYPE_PARALLEL) {
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dev_err(dev, "flash is not parallel\n");
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return -ENODEV;
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}
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/*
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* Complain if DT data and hardware definition is different.
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*/
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if (val & FLASH_WIDTH_16BIT) {
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if (map->bankwidth != 2)
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dev_warn(dev, "flash hardware say flash is 16 bit wide but DT says it is %d bits wide\n",
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map->bankwidth * 8);
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} else {
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if (map->bankwidth != 1)
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dev_warn(dev, "flash hardware say flash is 8 bit wide but DT says it is %d bits wide\n",
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map->bankwidth * 8);
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}
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gf->p = devm_pinctrl_get(dev);
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if (IS_ERR(gf->p)) {
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dev_err(dev, "no pinctrl handle\n");
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ret = PTR_ERR(gf->p);
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return ret;
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}
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gf->enabled_state = pinctrl_lookup_state(gf->p, "enabled");
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if (IS_ERR(gf->enabled_state))
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dev_err(dev, "no enabled pin control state\n");
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gf->disabled_state = pinctrl_lookup_state(gf->p, "disabled");
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if (IS_ERR(gf->enabled_state)) {
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dev_err(dev, "no disabled pin control state\n");
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} else {
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ret = pinctrl_select_state(gf->p, gf->disabled_state);
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if (ret)
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dev_err(gf->dev, "failed to disable pins\n");
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}
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map->read = gemini_flash_map_read;
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map->write = gemini_flash_map_write;
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map->copy_from = gemini_flash_map_copy_from;
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map->copy_to = gemini_flash_map_copy_to;
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dev_info(dev, "initialized Gemini-specific physmap control\n");
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return 0;
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}
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