41 lines
1.6 KiB
Plaintext
41 lines
1.6 KiB
Plaintext
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# SPDX-License-Identifier: GPL-2.0-only
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config FSL_FMAN
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tristate "FMan support"
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depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST
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select GENERIC_ALLOCATOR
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select PHYLINK
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select PCS_LYNX
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select CRC32
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default n
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help
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Freescale Data-Path Acceleration Architecture Frame Manager
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(FMan) support
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config DPAA_ERRATUM_A050385
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bool
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depends on ARM64 && FSL_DPAA
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default y
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help
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DPAA FMan erratum A050385 software workaround implementation:
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align buffers, data start, SG fragment length to avoid FMan DMA
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splits.
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FMAN DMA read or writes under heavy traffic load may cause FMAN
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internal resource leak thus stopping further packet processing.
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The FMAN internal queue can overflow when FMAN splits single
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read or write transactions into multiple smaller transactions
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such that more than 17 AXI transactions are in flight from FMAN
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to interconnect. When the FMAN internal queue overflows, it can
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stall further packet processing. The issue can occur with any
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one of the following three conditions:
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1. FMAN AXI transaction crosses 4K address boundary (Errata
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A010022)
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2. FMAN DMA address for an AXI transaction is not 16 byte
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aligned, i.e. the last 4 bits of an address are non-zero
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3. Scatter Gather (SG) frames have more than one SG buffer in
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the SG list and any one of the buffers, except the last
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buffer in the SG list has data size that is not a multiple
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of 16 bytes, i.e., other than 16, 32, 48, 64, etc.
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With any one of the above three conditions present, there is
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likelihood of stalled FMAN packet processing, especially under
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stress with multiple ports injecting line-rate traffic.
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