347 lines
9.3 KiB
C
347 lines
9.3 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 1999 - 2018 Intel Corporation. */
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/* PTP 1588 Hardware Clock (PHC)
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* Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
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* Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
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*/
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#include "e1000.h"
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#ifdef CONFIG_E1000E_HWTS
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#include <linux/clocksource.h>
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#include <linux/ktime.h>
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#include <asm/tsc.h>
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#endif
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/**
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* e1000e_phc_adjfine - adjust the frequency of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired frequency chance in scaled parts per million
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*
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* Adjust the frequency of the PHC cycle counter by the indicated delta from
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* the base frequency.
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*
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* Scaled parts per million is ppm but with a 16 bit binary fractional field.
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**/
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static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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struct e1000_hw *hw = &adapter->hw;
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unsigned long flags;
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u64 incvalue;
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u32 timinca;
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s32 ret_val;
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/* Get the System Time Register SYSTIM base frequency */
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ret_val = e1000e_get_base_timinca(adapter, &timinca);
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if (ret_val)
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return ret_val;
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spin_lock_irqsave(&adapter->systim_lock, flags);
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incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
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incvalue = adjust_by_scaled_ppm(incvalue, delta);
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timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
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timinca |= incvalue;
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ew32(TIMINCA, timinca);
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adapter->ptp_delta = delta;
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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return 0;
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}
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/**
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* e1000e_phc_adjtime - Shift the time of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired change in nanoseconds
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*
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* Adjust the timer by resetting the timecounter structure.
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**/
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static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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unsigned long flags;
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spin_lock_irqsave(&adapter->systim_lock, flags);
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timecounter_adjtime(&adapter->tc, delta);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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return 0;
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}
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#ifdef CONFIG_E1000E_HWTS
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#define MAX_HW_WAIT_COUNT (3)
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/**
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* e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
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* @device: current device time
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* @system: system counter value read synchronously with device time
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* @ctx: context provided by timekeeping code
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*
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* Read device and system (ART) clock simultaneously and return the corrected
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* clock values in ns.
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**/
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static int e1000e_phc_get_syncdevicetime(ktime_t *device,
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struct system_counterval_t *system,
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void *ctx)
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{
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struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
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struct e1000_hw *hw = &adapter->hw;
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unsigned long flags;
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int i;
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u32 tsync_ctrl;
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u64 dev_cycles;
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u64 sys_cycles;
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tsync_ctrl = er32(TSYNCTXCTL);
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tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
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E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
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ew32(TSYNCTXCTL, tsync_ctrl);
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for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
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udelay(1);
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tsync_ctrl = er32(TSYNCTXCTL);
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if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
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break;
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}
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if (i == MAX_HW_WAIT_COUNT)
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return -ETIMEDOUT;
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dev_cycles = er32(SYSSTMPH);
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dev_cycles <<= 32;
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dev_cycles |= er32(SYSSTMPL);
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spin_lock_irqsave(&adapter->systim_lock, flags);
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*device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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sys_cycles = er32(PLTSTMPH);
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sys_cycles <<= 32;
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sys_cycles |= er32(PLTSTMPL);
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*system = convert_art_to_tsc(sys_cycles);
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return 0;
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}
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/**
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* e1000e_phc_getcrosststamp - Reads the current system/device cross timestamp
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* @ptp: ptp clock structure
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* @xtstamp: structure containing timestamp
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*
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* Read device and system (ART) clock simultaneously and return the scaled
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* clock values in ns.
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**/
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static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
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struct system_device_crosststamp *xtstamp)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
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adapter, NULL, xtstamp);
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}
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#endif/*CONFIG_E1000E_HWTS*/
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/**
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* e1000e_phc_gettimex - Reads the current time from the hardware clock and
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* system clock
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* @ptp: ptp clock structure
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* @ts: timespec structure to hold the current PHC time
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* @sts: structure to hold the current system time
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*
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* Read the timecounter and return the correct value in ns after converting
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* it into a struct timespec.
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**/
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static int e1000e_phc_gettimex(struct ptp_clock_info *ptp,
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struct timespec64 *ts,
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struct ptp_system_timestamp *sts)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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unsigned long flags;
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u64 cycles, ns;
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spin_lock_irqsave(&adapter->systim_lock, flags);
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/* NOTE: Non-monotonic SYSTIM readings may be returned */
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cycles = e1000e_read_systim(adapter, sts);
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ns = timecounter_cyc2time(&adapter->tc, cycles);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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/**
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* e1000e_phc_settime - Set the current time on the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec containing the new time for the cycle counter
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*
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* Reset the timecounter to use a new base value instead of the kernel
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* wall timer value.
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**/
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static int e1000e_phc_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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unsigned long flags;
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u64 ns;
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ns = timespec64_to_ns(ts);
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/* reset the timecounter */
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spin_lock_irqsave(&adapter->systim_lock, flags);
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timecounter_init(&adapter->tc, &adapter->cc, ns);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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return 0;
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}
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/**
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* e1000e_phc_enable - enable or disable an ancillary feature
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* @ptp: ptp clock structure
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* @request: Desired resource to enable or disable
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* @on: Caller passes one to enable or zero to disable
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*
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* Enable (or disable) ancillary features of the PHC subsystem.
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* Currently, no ancillary features are supported.
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**/
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static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
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struct ptp_clock_request __always_unused *request,
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int __always_unused on)
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{
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return -EOPNOTSUPP;
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}
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static void e1000e_systim_overflow_work(struct work_struct *work)
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{
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struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
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systim_overflow_work.work);
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struct e1000_hw *hw = &adapter->hw;
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struct timespec64 ts;
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u64 ns;
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/* Update the timecounter */
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ns = timecounter_read(&adapter->tc);
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ts = ns_to_timespec64(ns);
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e_dbg("SYSTIM overflow check at %lld.%09lu\n",
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(long long) ts.tv_sec, ts.tv_nsec);
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schedule_delayed_work(&adapter->systim_overflow_work,
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E1000_SYSTIM_OVERFLOW_PERIOD);
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}
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static const struct ptp_clock_info e1000e_ptp_clock_info = {
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.owner = THIS_MODULE,
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.n_alarm = 0,
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.n_ext_ts = 0,
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.n_per_out = 0,
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.n_pins = 0,
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.pps = 0,
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.adjfine = e1000e_phc_adjfine,
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.adjtime = e1000e_phc_adjtime,
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.gettimex64 = e1000e_phc_gettimex,
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.settime64 = e1000e_phc_settime,
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.enable = e1000e_phc_enable,
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};
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/**
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* e1000e_ptp_init - initialize PTP for devices which support it
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* @adapter: board private structure
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*
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* This function performs the required steps for enabling PTP support.
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* If PTP support has already been loaded it simply calls the cyclecounter
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* init routine and exits.
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**/
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void e1000e_ptp_init(struct e1000_adapter *adapter)
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{
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struct e1000_hw *hw = &adapter->hw;
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adapter->ptp_clock = NULL;
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if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
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return;
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adapter->ptp_clock_info = e1000e_ptp_clock_info;
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snprintf(adapter->ptp_clock_info.name,
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sizeof(adapter->ptp_clock_info.name), "%pm",
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adapter->netdev->perm_addr);
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switch (hw->mac.type) {
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case e1000_pch2lan:
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case e1000_pch_lpt:
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case e1000_pch_spt:
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case e1000_pch_cnp:
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case e1000_pch_tgp:
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case e1000_pch_adp:
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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if ((hw->mac.type < e1000_pch_lpt) ||
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(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
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adapter->ptp_clock_info.max_adj = 24000000 - 1;
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break;
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}
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fallthrough;
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case e1000_82574:
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case e1000_82583:
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adapter->ptp_clock_info.max_adj = 600000000 - 1;
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break;
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default:
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break;
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}
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#ifdef CONFIG_E1000E_HWTS
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/* CPU must have ART and GBe must be from Sunrise Point or greater */
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if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
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adapter->ptp_clock_info.getcrosststamp =
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e1000e_phc_getcrosststamp;
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#endif/*CONFIG_E1000E_HWTS*/
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INIT_DELAYED_WORK(&adapter->systim_overflow_work,
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e1000e_systim_overflow_work);
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schedule_delayed_work(&adapter->systim_overflow_work,
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E1000_SYSTIM_OVERFLOW_PERIOD);
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adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
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&adapter->pdev->dev);
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if (IS_ERR(adapter->ptp_clock)) {
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adapter->ptp_clock = NULL;
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e_err("ptp_clock_register failed\n");
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} else if (adapter->ptp_clock) {
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e_info("registered PHC clock\n");
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}
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}
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/**
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* e1000e_ptp_remove - disable PTP device and stop the overflow check
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* @adapter: board private structure
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*
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* Stop the PTP support, and cancel the delayed work.
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**/
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void e1000e_ptp_remove(struct e1000_adapter *adapter)
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{
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if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
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return;
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cancel_delayed_work_sync(&adapter->systim_overflow_work);
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if (adapter->ptp_clock) {
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ptp_clock_unregister(adapter->ptp_clock);
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adapter->ptp_clock = NULL;
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e_info("removed PHC\n");
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}
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}
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