49 lines
1.7 KiB
C
49 lines
1.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2013 - 2018 Intel Corporation. */
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#ifndef _FM10K_COMMON_H_
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#define _FM10K_COMMON_H_
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#include "fm10k_type.h"
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#define FM10K_REMOVED(hw_addr) unlikely(!(hw_addr))
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/* PCI configuration read */
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u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg);
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/* read operations, indexed using DWORDS */
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u32 fm10k_read_reg(struct fm10k_hw *hw, int reg);
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/* write operations, indexed using DWORDS */
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#define fm10k_write_reg(hw, reg, val) \
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do { \
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u32 __iomem *hw_addr = READ_ONCE((hw)->hw_addr); \
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if (!FM10K_REMOVED(hw_addr)) \
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writel((val), &hw_addr[(reg)]); \
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} while (0)
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/* Switch register write operations, index using DWORDS */
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#define fm10k_write_sw_reg(hw, reg, val) \
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do { \
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u32 __iomem *sw_addr = READ_ONCE((hw)->sw_addr); \
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if (!FM10K_REMOVED(sw_addr)) \
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writel((val), &sw_addr[(reg)]); \
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} while (0)
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/* read ctrl register which has no clear on read fields as PCIe flush */
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#define fm10k_write_flush(hw) fm10k_read_reg((hw), FM10K_CTRL)
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s32 fm10k_get_bus_info_generic(struct fm10k_hw *hw);
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s32 fm10k_get_invariants_generic(struct fm10k_hw *hw);
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s32 fm10k_disable_queues_generic(struct fm10k_hw *hw, u16 q_cnt);
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s32 fm10k_start_hw_generic(struct fm10k_hw *hw);
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s32 fm10k_stop_hw_generic(struct fm10k_hw *hw);
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u32 fm10k_read_hw_stats_32b(struct fm10k_hw *hw, u32 addr,
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struct fm10k_hw_stat *stat);
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#define fm10k_update_hw_base_32b(stat, delta) ((stat)->base_l += (delta))
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void fm10k_update_hw_stats_q(struct fm10k_hw *hw, struct fm10k_hw_stats_q *q,
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u32 idx, u32 count);
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#define fm10k_unbind_hw_stats_32b(s) ((s)->base_h = 0)
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void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 idx, u32 count);
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s32 fm10k_get_host_state_generic(struct fm10k_hw *hw, bool *host_ready);
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#endif /* _FM10K_COMMON_H_ */
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