483 lines
12 KiB
C
483 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Marvell RVU Ethernet driver
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*
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* Copyright (C) 2021 Marvell.
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*
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*/
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#include "cn10k.h"
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#include "otx2_reg.h"
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#include "otx2_struct.h"
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static struct dev_hw_ops otx2_hw_ops = {
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.sq_aq_init = otx2_sq_aq_init,
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.sqe_flush = otx2_sqe_flush,
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.aura_freeptr = otx2_aura_freeptr,
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.refill_pool_ptrs = otx2_refill_pool_ptrs,
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};
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static struct dev_hw_ops cn10k_hw_ops = {
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.sq_aq_init = cn10k_sq_aq_init,
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.sqe_flush = cn10k_sqe_flush,
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.aura_freeptr = cn10k_aura_freeptr,
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.refill_pool_ptrs = cn10k_refill_pool_ptrs,
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};
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int cn10k_lmtst_init(struct otx2_nic *pfvf)
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{
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struct lmtst_tbl_setup_req *req;
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struct otx2_lmt_info *lmt_info;
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int err, cpu;
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if (!test_bit(CN10K_LMTST, &pfvf->hw.cap_flag)) {
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pfvf->hw_ops = &otx2_hw_ops;
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return 0;
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}
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pfvf->hw_ops = &cn10k_hw_ops;
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/* Total LMTLINES = num_online_cpus() * 32 (For Burst flush).*/
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pfvf->tot_lmt_lines = (num_online_cpus() * LMT_BURST_SIZE);
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pfvf->hw.lmt_info = alloc_percpu(struct otx2_lmt_info);
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mutex_lock(&pfvf->mbox.lock);
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req = otx2_mbox_alloc_msg_lmtst_tbl_setup(&pfvf->mbox);
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if (!req) {
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mutex_unlock(&pfvf->mbox.lock);
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return -ENOMEM;
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}
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req->use_local_lmt_region = true;
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err = qmem_alloc(pfvf->dev, &pfvf->dync_lmt, pfvf->tot_lmt_lines,
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LMT_LINE_SIZE);
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if (err) {
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mutex_unlock(&pfvf->mbox.lock);
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return err;
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}
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pfvf->hw.lmt_base = (u64 *)pfvf->dync_lmt->base;
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req->lmt_iova = (u64)pfvf->dync_lmt->iova;
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err = otx2_sync_mbox_msg(&pfvf->mbox);
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mutex_unlock(&pfvf->mbox.lock);
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for_each_possible_cpu(cpu) {
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lmt_info = per_cpu_ptr(pfvf->hw.lmt_info, cpu);
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lmt_info->lmt_addr = ((u64)pfvf->hw.lmt_base +
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(cpu * LMT_BURST_SIZE * LMT_LINE_SIZE));
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lmt_info->lmt_id = cpu * LMT_BURST_SIZE;
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}
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return 0;
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}
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EXPORT_SYMBOL(cn10k_lmtst_init);
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int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura)
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{
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struct nix_cn10k_aq_enq_req *aq;
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struct otx2_nic *pfvf = dev;
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/* Get memory to put this msg */
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aq = otx2_mbox_alloc_msg_nix_cn10k_aq_enq(&pfvf->mbox);
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if (!aq)
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return -ENOMEM;
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aq->sq.cq = pfvf->hw.rx_queues + qidx;
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aq->sq.max_sqe_size = NIX_MAXSQESZ_W16; /* 128 byte */
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aq->sq.cq_ena = 1;
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aq->sq.ena = 1;
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aq->sq.smq = otx2_get_smq_idx(pfvf, qidx);
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aq->sq.smq_rr_weight = mtu_to_dwrr_weight(pfvf, pfvf->tx_max_pktlen);
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aq->sq.default_chan = pfvf->hw.tx_chan_base;
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aq->sq.sqe_stype = NIX_STYPE_STF; /* Cache SQB */
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aq->sq.sqb_aura = sqb_aura;
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aq->sq.sq_int_ena = NIX_SQINT_BITS;
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aq->sq.qint_idx = 0;
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/* Due pipelining impact minimum 2000 unused SQ CQE's
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* need to maintain to avoid CQ overflow.
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*/
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aq->sq.cq_limit = ((SEND_CQ_SKID * 256) / (pfvf->qset.sqe_cnt));
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/* Fill AQ info */
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aq->qidx = qidx;
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aq->ctype = NIX_AQ_CTYPE_SQ;
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aq->op = NIX_AQ_INSTOP_INIT;
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return otx2_sync_mbox_msg(&pfvf->mbox);
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}
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#define NPA_MAX_BURST 16
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void cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)
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{
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struct otx2_nic *pfvf = dev;
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u64 ptrs[NPA_MAX_BURST];
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int num_ptrs = 1;
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dma_addr_t bufptr;
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/* Refill pool with new buffers */
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while (cq->pool_ptrs) {
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if (otx2_alloc_buffer(pfvf, cq, &bufptr)) {
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if (num_ptrs--)
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__cn10k_aura_freeptr(pfvf, cq->cq_idx, ptrs,
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num_ptrs);
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break;
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}
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cq->pool_ptrs--;
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ptrs[num_ptrs] = (u64)bufptr + OTX2_HEAD_ROOM;
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num_ptrs++;
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if (num_ptrs == NPA_MAX_BURST || cq->pool_ptrs == 0) {
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__cn10k_aura_freeptr(pfvf, cq->cq_idx, ptrs,
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num_ptrs);
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num_ptrs = 1;
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}
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}
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}
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void cn10k_sqe_flush(void *dev, struct otx2_snd_queue *sq, int size, int qidx)
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{
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struct otx2_lmt_info *lmt_info;
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struct otx2_nic *pfvf = dev;
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u64 val = 0, tar_addr = 0;
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lmt_info = per_cpu_ptr(pfvf->hw.lmt_info, smp_processor_id());
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/* FIXME: val[0:10] LMT_ID.
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* [12:15] no of LMTST - 1 in the burst.
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* [19:63] data size of each LMTST in the burst except first.
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*/
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val = (lmt_info->lmt_id & 0x7FF);
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/* Target address for LMTST flush tells HW how many 128bit
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* words are present.
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* tar_addr[6:4] size of first LMTST - 1 in units of 128b.
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*/
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tar_addr |= sq->io_addr | (((size / 16) - 1) & 0x7) << 4;
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dma_wmb();
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memcpy((u64 *)lmt_info->lmt_addr, sq->sqe_base, size);
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cn10k_lmt_flush(val, tar_addr);
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sq->head++;
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sq->head &= (sq->sqe_cnt - 1);
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}
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int cn10k_free_all_ipolicers(struct otx2_nic *pfvf)
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{
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struct nix_bandprof_free_req *req;
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int rc;
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if (is_dev_otx2(pfvf->pdev))
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return 0;
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mutex_lock(&pfvf->mbox.lock);
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req = otx2_mbox_alloc_msg_nix_bandprof_free(&pfvf->mbox);
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if (!req) {
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rc = -ENOMEM;
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goto out;
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}
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/* Free all bandwidth profiles allocated */
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req->free_all = true;
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rc = otx2_sync_mbox_msg(&pfvf->mbox);
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out:
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mutex_unlock(&pfvf->mbox.lock);
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return rc;
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}
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int cn10k_alloc_leaf_profile(struct otx2_nic *pfvf, u16 *leaf)
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{
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struct nix_bandprof_alloc_req *req;
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struct nix_bandprof_alloc_rsp *rsp;
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int rc;
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req = otx2_mbox_alloc_msg_nix_bandprof_alloc(&pfvf->mbox);
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if (!req)
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return -ENOMEM;
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req->prof_count[BAND_PROF_LEAF_LAYER] = 1;
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rc = otx2_sync_mbox_msg(&pfvf->mbox);
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if (rc)
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goto out;
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rsp = (struct nix_bandprof_alloc_rsp *)
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otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
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if (!rsp->prof_count[BAND_PROF_LEAF_LAYER]) {
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rc = -EIO;
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goto out;
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}
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*leaf = rsp->prof_idx[BAND_PROF_LEAF_LAYER][0];
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out:
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if (rc) {
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dev_warn(pfvf->dev,
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"Failed to allocate ingress bandwidth policer\n");
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}
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return rc;
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}
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int cn10k_alloc_matchall_ipolicer(struct otx2_nic *pfvf)
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{
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struct otx2_hw *hw = &pfvf->hw;
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int ret;
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mutex_lock(&pfvf->mbox.lock);
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ret = cn10k_alloc_leaf_profile(pfvf, &hw->matchall_ipolicer);
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mutex_unlock(&pfvf->mbox.lock);
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return ret;
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}
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#define POLICER_TIMESTAMP 1 /* 1 second */
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#define MAX_RATE_EXP 22 /* Valid rate exponent range: 0 - 22 */
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static void cn10k_get_ingress_burst_cfg(u32 burst, u32 *burst_exp,
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u32 *burst_mantissa)
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{
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int tmp;
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/* Burst is calculated as
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* (1+[BURST_MANTISSA]/256)*2^[BURST_EXPONENT]
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* This is the upper limit on number tokens (bytes) that
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* can be accumulated in the bucket.
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*/
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*burst_exp = ilog2(burst);
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if (burst < 256) {
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/* No float: can't express mantissa in this case */
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*burst_mantissa = 0;
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return;
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}
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if (*burst_exp > MAX_RATE_EXP)
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*burst_exp = MAX_RATE_EXP;
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/* Calculate mantissa
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* Find remaining bytes 'burst - 2^burst_exp'
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* mantissa = (remaining bytes) / 2^ (burst_exp - 8)
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*/
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tmp = burst - rounddown_pow_of_two(burst);
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*burst_mantissa = tmp / (1UL << (*burst_exp - 8));
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}
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static void cn10k_get_ingress_rate_cfg(u64 rate, u32 *rate_exp,
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u32 *rate_mantissa, u32 *rdiv)
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{
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u32 div = 0;
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u32 exp = 0;
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u64 tmp;
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/* Figure out mantissa, exponent and divider from given max pkt rate
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*
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* To achieve desired rate HW adds
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* (1+[RATE_MANTISSA]/256)*2^[RATE_EXPONENT] tokens (bytes) at every
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* policer timeunit * 2^rdiv ie 2 * 2^rdiv usecs, to the token bucket.
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* Here policer timeunit is 2 usecs and rate is in bits per sec.
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* Since floating point cannot be used below algorithm uses 1000000
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* scale factor to support rates upto 100Gbps.
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*/
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tmp = rate * 32 * 2;
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if (tmp < 256000000) {
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while (tmp < 256000000) {
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tmp = tmp * 2;
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div++;
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}
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} else {
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for (exp = 0; tmp >= 512000000 && exp <= MAX_RATE_EXP; exp++)
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tmp = tmp / 2;
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if (exp > MAX_RATE_EXP)
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exp = MAX_RATE_EXP;
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}
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*rate_mantissa = (tmp - 256000000) / 1000000;
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*rate_exp = exp;
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*rdiv = div;
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}
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int cn10k_map_unmap_rq_policer(struct otx2_nic *pfvf, int rq_idx,
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u16 policer, bool map)
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{
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struct nix_cn10k_aq_enq_req *aq;
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aq = otx2_mbox_alloc_msg_nix_cn10k_aq_enq(&pfvf->mbox);
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if (!aq)
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return -ENOMEM;
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/* Enable policing and set the bandwidth profile (policer) index */
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if (map)
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aq->rq.policer_ena = 1;
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else
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aq->rq.policer_ena = 0;
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aq->rq_mask.policer_ena = 1;
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aq->rq.band_prof_id = policer;
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aq->rq_mask.band_prof_id = GENMASK(9, 0);
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/* Fill AQ info */
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aq->qidx = rq_idx;
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aq->ctype = NIX_AQ_CTYPE_RQ;
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aq->op = NIX_AQ_INSTOP_WRITE;
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return otx2_sync_mbox_msg(&pfvf->mbox);
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}
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int cn10k_free_leaf_profile(struct otx2_nic *pfvf, u16 leaf)
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{
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struct nix_bandprof_free_req *req;
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req = otx2_mbox_alloc_msg_nix_bandprof_free(&pfvf->mbox);
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if (!req)
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return -ENOMEM;
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req->prof_count[BAND_PROF_LEAF_LAYER] = 1;
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req->prof_idx[BAND_PROF_LEAF_LAYER][0] = leaf;
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return otx2_sync_mbox_msg(&pfvf->mbox);
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}
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int cn10k_free_matchall_ipolicer(struct otx2_nic *pfvf)
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{
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struct otx2_hw *hw = &pfvf->hw;
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int qidx, rc;
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mutex_lock(&pfvf->mbox.lock);
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/* Remove RQ's policer mapping */
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for (qidx = 0; qidx < hw->rx_queues; qidx++)
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cn10k_map_unmap_rq_policer(pfvf, qidx,
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hw->matchall_ipolicer, false);
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rc = cn10k_free_leaf_profile(pfvf, hw->matchall_ipolicer);
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|
mutex_unlock(&pfvf->mbox.lock);
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
int cn10k_set_ipolicer_rate(struct otx2_nic *pfvf, u16 profile,
|
||
|
|
u32 burst, u64 rate, bool pps)
|
||
|
|
{
|
||
|
|
struct nix_cn10k_aq_enq_req *aq;
|
||
|
|
u32 burst_exp, burst_mantissa;
|
||
|
|
u32 rate_exp, rate_mantissa;
|
||
|
|
u32 rdiv;
|
||
|
|
|
||
|
|
/* Get exponent and mantissa values for the desired rate */
|
||
|
|
cn10k_get_ingress_burst_cfg(burst, &burst_exp, &burst_mantissa);
|
||
|
|
cn10k_get_ingress_rate_cfg(rate, &rate_exp, &rate_mantissa, &rdiv);
|
||
|
|
|
||
|
|
/* Init bandwidth profile */
|
||
|
|
aq = otx2_mbox_alloc_msg_nix_cn10k_aq_enq(&pfvf->mbox);
|
||
|
|
if (!aq)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
/* Set initial color mode to blind */
|
||
|
|
aq->prof.icolor = 0x03;
|
||
|
|
aq->prof_mask.icolor = 0x03;
|
||
|
|
|
||
|
|
/* Set rate and burst values */
|
||
|
|
aq->prof.cir_exponent = rate_exp;
|
||
|
|
aq->prof_mask.cir_exponent = 0x1F;
|
||
|
|
|
||
|
|
aq->prof.cir_mantissa = rate_mantissa;
|
||
|
|
aq->prof_mask.cir_mantissa = 0xFF;
|
||
|
|
|
||
|
|
aq->prof.cbs_exponent = burst_exp;
|
||
|
|
aq->prof_mask.cbs_exponent = 0x1F;
|
||
|
|
|
||
|
|
aq->prof.cbs_mantissa = burst_mantissa;
|
||
|
|
aq->prof_mask.cbs_mantissa = 0xFF;
|
||
|
|
|
||
|
|
aq->prof.rdiv = rdiv;
|
||
|
|
aq->prof_mask.rdiv = 0xF;
|
||
|
|
|
||
|
|
if (pps) {
|
||
|
|
/* The amount of decremented tokens is calculated according to
|
||
|
|
* the following equation:
|
||
|
|
* max([ LMODE ? 0 : (packet_length - LXPTR)] +
|
||
|
|
* ([ADJUST_MANTISSA]/256 - 1) * 2^[ADJUST_EXPONENT],
|
||
|
|
* 1/256)
|
||
|
|
* if LMODE is 1 then rate limiting will be based on
|
||
|
|
* PPS otherwise bps.
|
||
|
|
* The aim of the ADJUST value is to specify a token cost per
|
||
|
|
* packet in contrary to the packet length that specifies a
|
||
|
|
* cost per byte. To rate limit based on PPS adjust mantissa
|
||
|
|
* is set as 384 and exponent as 1 so that number of tokens
|
||
|
|
* decremented becomes 1 i.e, 1 token per packeet.
|
||
|
|
*/
|
||
|
|
aq->prof.adjust_exponent = 1;
|
||
|
|
aq->prof_mask.adjust_exponent = 0x1F;
|
||
|
|
|
||
|
|
aq->prof.adjust_mantissa = 384;
|
||
|
|
aq->prof_mask.adjust_mantissa = 0x1FF;
|
||
|
|
|
||
|
|
aq->prof.lmode = 0x1;
|
||
|
|
aq->prof_mask.lmode = 0x1;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Two rate three color marker
|
||
|
|
* With PEIR/EIR set to zero, color will be either green or red
|
||
|
|
*/
|
||
|
|
aq->prof.meter_algo = 2;
|
||
|
|
aq->prof_mask.meter_algo = 0x3;
|
||
|
|
|
||
|
|
aq->prof.rc_action = NIX_RX_BAND_PROF_ACTIONRESULT_DROP;
|
||
|
|
aq->prof_mask.rc_action = 0x3;
|
||
|
|
|
||
|
|
aq->prof.yc_action = NIX_RX_BAND_PROF_ACTIONRESULT_PASS;
|
||
|
|
aq->prof_mask.yc_action = 0x3;
|
||
|
|
|
||
|
|
aq->prof.gc_action = NIX_RX_BAND_PROF_ACTIONRESULT_PASS;
|
||
|
|
aq->prof_mask.gc_action = 0x3;
|
||
|
|
|
||
|
|
/* Setting exponent value as 24 and mantissa as 0 configures
|
||
|
|
* the bucket with zero values making bucket unused. Peak
|
||
|
|
* information rate and Excess information rate buckets are
|
||
|
|
* unused here.
|
||
|
|
*/
|
||
|
|
aq->prof.peir_exponent = 24;
|
||
|
|
aq->prof_mask.peir_exponent = 0x1F;
|
||
|
|
|
||
|
|
aq->prof.peir_mantissa = 0;
|
||
|
|
aq->prof_mask.peir_mantissa = 0xFF;
|
||
|
|
|
||
|
|
aq->prof.pebs_exponent = 24;
|
||
|
|
aq->prof_mask.pebs_exponent = 0x1F;
|
||
|
|
|
||
|
|
aq->prof.pebs_mantissa = 0;
|
||
|
|
aq->prof_mask.pebs_mantissa = 0xFF;
|
||
|
|
|
||
|
|
/* Fill AQ info */
|
||
|
|
aq->qidx = profile;
|
||
|
|
aq->ctype = NIX_AQ_CTYPE_BANDPROF;
|
||
|
|
aq->op = NIX_AQ_INSTOP_WRITE;
|
||
|
|
|
||
|
|
return otx2_sync_mbox_msg(&pfvf->mbox);
|
||
|
|
}
|
||
|
|
|
||
|
|
int cn10k_set_matchall_ipolicer_rate(struct otx2_nic *pfvf,
|
||
|
|
u32 burst, u64 rate)
|
||
|
|
{
|
||
|
|
struct otx2_hw *hw = &pfvf->hw;
|
||
|
|
int qidx, rc;
|
||
|
|
|
||
|
|
mutex_lock(&pfvf->mbox.lock);
|
||
|
|
|
||
|
|
rc = cn10k_set_ipolicer_rate(pfvf, hw->matchall_ipolicer, burst,
|
||
|
|
rate, false);
|
||
|
|
if (rc)
|
||
|
|
goto out;
|
||
|
|
|
||
|
|
for (qidx = 0; qidx < hw->rx_queues; qidx++) {
|
||
|
|
rc = cn10k_map_unmap_rq_policer(pfvf, qidx,
|
||
|
|
hw->matchall_ipolicer, true);
|
||
|
|
if (rc)
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
out:
|
||
|
|
mutex_unlock(&pfvf->mbox.lock);
|
||
|
|
return rc;
|
||
|
|
}
|