302 lines
8.8 KiB
C
302 lines
8.8 KiB
C
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/*
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* Copyright (c) 2012 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/mlx4/device.h>
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#include <linux/clocksource.h>
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#include "mlx4_en.h"
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/* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
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*/
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static u64 mlx4_en_read_clock(const struct cyclecounter *tc)
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{
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struct mlx4_en_dev *mdev =
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container_of(tc, struct mlx4_en_dev, cycles);
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struct mlx4_dev *dev = mdev->dev;
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return mlx4_read_clock(dev) & tc->mask;
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}
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u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
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{
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u64 hi, lo;
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struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
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lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
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hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
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return hi | lo;
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}
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u64 mlx4_en_get_hwtstamp(struct mlx4_en_dev *mdev, u64 timestamp)
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{
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unsigned int seq;
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u64 nsec;
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do {
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seq = read_seqbegin(&mdev->clock_lock);
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nsec = timecounter_cyc2time(&mdev->clock, timestamp);
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} while (read_seqretry(&mdev->clock_lock, seq));
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return ns_to_ktime(nsec);
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}
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void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
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struct skb_shared_hwtstamps *hwts,
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u64 timestamp)
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{
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memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
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hwts->hwtstamp = mlx4_en_get_hwtstamp(mdev, timestamp);
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}
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/**
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* mlx4_en_remove_timestamp - disable PTP device
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* @mdev: board private structure
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*
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* Stop the PTP support.
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**/
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void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev)
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{
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if (mdev->ptp_clock) {
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ptp_clock_unregister(mdev->ptp_clock);
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mdev->ptp_clock = NULL;
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mlx4_info(mdev, "removed PHC\n");
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}
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}
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#define MLX4_EN_WRAP_AROUND_SEC 10UL
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/* By scheduling the overflow check every 5 seconds, we have a reasonably
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* good chance we wont miss a wrap around.
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* TOTO: Use a timer instead of a work queue to increase the guarantee.
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*/
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#define MLX4_EN_OVERFLOW_PERIOD (MLX4_EN_WRAP_AROUND_SEC * HZ / 2)
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void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
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{
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bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
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MLX4_EN_OVERFLOW_PERIOD);
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unsigned long flags;
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if (timeout) {
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write_seqlock_irqsave(&mdev->clock_lock, flags);
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timecounter_read(&mdev->clock);
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write_sequnlock_irqrestore(&mdev->clock_lock, flags);
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mdev->last_overflow_check = jiffies;
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}
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}
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/**
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* mlx4_en_phc_adjfine - adjust the frequency of the hardware clock
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* @ptp: ptp clock structure
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* @scaled_ppm: Desired frequency change in scaled parts per million
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*
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* Adjust the frequency of the PHC cycle counter by the indicated scaled_ppm
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* from the base frequency.
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*
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* Scaled parts per million is ppm with a 16-bit binary fractional field.
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**/
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static int mlx4_en_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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u32 mult;
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unsigned long flags;
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struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
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ptp_clock_info);
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mult = (u32)adjust_by_scaled_ppm(mdev->nominal_c_mult, scaled_ppm);
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write_seqlock_irqsave(&mdev->clock_lock, flags);
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timecounter_read(&mdev->clock);
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mdev->cycles.mult = mult;
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write_sequnlock_irqrestore(&mdev->clock_lock, flags);
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return 0;
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}
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/**
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* mlx4_en_phc_adjtime - Shift the time of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired change in nanoseconds
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*
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* Adjust the timer by resetting the timecounter structure.
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**/
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static int mlx4_en_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
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ptp_clock_info);
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unsigned long flags;
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write_seqlock_irqsave(&mdev->clock_lock, flags);
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timecounter_adjtime(&mdev->clock, delta);
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write_sequnlock_irqrestore(&mdev->clock_lock, flags);
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return 0;
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}
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/**
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* mlx4_en_phc_gettime - Reads the current time from the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec structure to hold the current time value
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*
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* Read the timecounter and return the correct value in ns after converting
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* it into a struct timespec.
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**/
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static int mlx4_en_phc_gettime(struct ptp_clock_info *ptp,
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struct timespec64 *ts)
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{
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struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
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ptp_clock_info);
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unsigned long flags;
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u64 ns;
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write_seqlock_irqsave(&mdev->clock_lock, flags);
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ns = timecounter_read(&mdev->clock);
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write_sequnlock_irqrestore(&mdev->clock_lock, flags);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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/**
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* mlx4_en_phc_settime - Set the current time on the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec containing the new time for the cycle counter
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*
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* Reset the timecounter to use a new base value instead of the kernel
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* wall timer value.
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**/
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static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
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ptp_clock_info);
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u64 ns = timespec64_to_ns(ts);
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unsigned long flags;
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/* reset the timecounter */
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write_seqlock_irqsave(&mdev->clock_lock, flags);
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timecounter_init(&mdev->clock, &mdev->cycles, ns);
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write_sequnlock_irqrestore(&mdev->clock_lock, flags);
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return 0;
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}
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/**
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* mlx4_en_phc_enable - enable or disable an ancillary feature
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* @ptp: ptp clock structure
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* @request: Desired resource to enable or disable
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* @on: Caller passes one to enable or zero to disable
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*
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* Enable (or disable) ancillary features of the PHC subsystem.
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* Currently, no ancillary features are supported.
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**/
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static int mlx4_en_phc_enable(struct ptp_clock_info __always_unused *ptp,
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struct ptp_clock_request __always_unused *request,
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int __always_unused on)
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{
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return -EOPNOTSUPP;
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}
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static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
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.owner = THIS_MODULE,
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.max_adj = 100000000,
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.n_alarm = 0,
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.n_ext_ts = 0,
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.n_per_out = 0,
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.n_pins = 0,
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.pps = 0,
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.adjfine = mlx4_en_phc_adjfine,
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.adjtime = mlx4_en_phc_adjtime,
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.gettime64 = mlx4_en_phc_gettime,
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.settime64 = mlx4_en_phc_settime,
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.enable = mlx4_en_phc_enable,
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};
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/* This function calculates the max shift that enables the user range
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* of MLX4_EN_WRAP_AROUND_SEC values in the cycles register.
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*/
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static u32 freq_to_shift(u16 freq)
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{
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u32 freq_khz = freq * 1000;
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u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;
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u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1);
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/* calculate max possible multiplier in order to fit in 64bit */
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u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);
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/* This comes from the reverse of clocksource_khz2mult */
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return ilog2(div_u64(max_mul * freq_khz, 1000000));
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}
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void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
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{
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struct mlx4_dev *dev = mdev->dev;
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unsigned long flags;
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/* mlx4_en_init_timestamp is called for each netdev.
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* mdev->ptp_clock is common for all ports, skip initialization if
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* was done for other port.
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*/
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if (mdev->ptp_clock)
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return;
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seqlock_init(&mdev->clock_lock);
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memset(&mdev->cycles, 0, sizeof(mdev->cycles));
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mdev->cycles.read = mlx4_en_read_clock;
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mdev->cycles.mask = CLOCKSOURCE_MASK(48);
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mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock);
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mdev->cycles.mult =
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clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
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mdev->nominal_c_mult = mdev->cycles.mult;
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write_seqlock_irqsave(&mdev->clock_lock, flags);
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timecounter_init(&mdev->clock, &mdev->cycles,
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ktime_to_ns(ktime_get_real()));
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write_sequnlock_irqrestore(&mdev->clock_lock, flags);
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/* Configure the PHC */
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mdev->ptp_clock_info = mlx4_en_ptp_clock_info;
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snprintf(mdev->ptp_clock_info.name, 16, "mlx4 ptp");
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mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info,
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&mdev->pdev->dev);
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if (IS_ERR(mdev->ptp_clock)) {
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mdev->ptp_clock = NULL;
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mlx4_err(mdev, "ptp_clock_register failed\n");
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} else if (mdev->ptp_clock) {
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mlx4_info(mdev, "registered PHC clock\n");
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}
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}
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