421 lines
9.1 KiB
C
421 lines
9.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/pci.h>
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#include "ionic.h"
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#include "ionic_bus.h"
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#include "ionic_lif.h"
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#include "ionic_debugfs.h"
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/* Supported devices */
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static const struct pci_device_id ionic_id_table[] = {
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{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
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{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
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{ 0, } /* end of table */
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};
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MODULE_DEVICE_TABLE(pci, ionic_id_table);
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int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
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{
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return pci_irq_vector(ionic->pdev, num);
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}
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const char *ionic_bus_info(struct ionic *ionic)
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{
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return pci_name(ionic->pdev);
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}
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int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
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{
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return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
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PCI_IRQ_MSIX);
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}
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void ionic_bus_free_irq_vectors(struct ionic *ionic)
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{
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if (!ionic->nintrs)
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return;
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pci_free_irq_vectors(ionic->pdev);
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}
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static int ionic_map_bars(struct ionic *ionic)
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{
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struct pci_dev *pdev = ionic->pdev;
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struct device *dev = ionic->dev;
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struct ionic_dev_bar *bars;
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unsigned int i, j;
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bars = ionic->bars;
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ionic->num_bars = 0;
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for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
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if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
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continue;
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bars[j].len = pci_resource_len(pdev, i);
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/* only map the whole bar 0 */
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if (j > 0) {
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bars[j].vaddr = NULL;
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} else {
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bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
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if (!bars[j].vaddr) {
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dev_err(dev,
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"Cannot memory-map BAR %d, aborting\n",
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i);
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return -ENODEV;
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}
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}
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bars[j].bus_addr = pci_resource_start(pdev, i);
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bars[j].res_index = i;
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ionic->num_bars++;
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j++;
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}
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return 0;
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}
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static void ionic_unmap_bars(struct ionic *ionic)
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{
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struct ionic_dev_bar *bars = ionic->bars;
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unsigned int i;
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for (i = 0; i < IONIC_BARS_MAX; i++) {
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if (bars[i].vaddr) {
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iounmap(bars[i].vaddr);
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bars[i].bus_addr = 0;
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bars[i].vaddr = NULL;
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bars[i].len = 0;
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}
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}
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}
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void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
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{
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return pci_iomap_range(ionic->pdev,
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ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
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(u64)page_num << PAGE_SHIFT, PAGE_SIZE);
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}
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void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
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{
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iounmap(page);
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}
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static void ionic_vf_dealloc_locked(struct ionic *ionic)
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{
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struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR };
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struct ionic_vf *v;
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int i;
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if (!ionic->vfs)
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return;
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for (i = ionic->num_vfs - 1; i >= 0; i--) {
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v = &ionic->vfs[i];
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if (v->stats_pa) {
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vfc.stats_pa = 0;
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ionic_set_vf_config(ionic, i, &vfc);
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dma_unmap_single(ionic->dev, v->stats_pa,
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sizeof(v->stats), DMA_FROM_DEVICE);
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v->stats_pa = 0;
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}
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}
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kfree(ionic->vfs);
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ionic->vfs = NULL;
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ionic->num_vfs = 0;
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}
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static void ionic_vf_dealloc(struct ionic *ionic)
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{
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down_write(&ionic->vf_op_lock);
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ionic_vf_dealloc_locked(ionic);
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up_write(&ionic->vf_op_lock);
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}
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static int ionic_vf_alloc(struct ionic *ionic, int num_vfs)
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{
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struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR };
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struct ionic_vf *v;
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int err = 0;
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int i;
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down_write(&ionic->vf_op_lock);
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ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL);
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if (!ionic->vfs) {
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err = -ENOMEM;
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goto out;
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}
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for (i = 0; i < num_vfs; i++) {
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v = &ionic->vfs[i];
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v->stats_pa = dma_map_single(ionic->dev, &v->stats,
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sizeof(v->stats), DMA_FROM_DEVICE);
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if (dma_mapping_error(ionic->dev, v->stats_pa)) {
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v->stats_pa = 0;
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err = -ENODEV;
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goto out;
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}
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ionic->num_vfs++;
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/* ignore failures from older FW, we just won't get stats */
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vfc.stats_pa = cpu_to_le64(v->stats_pa);
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ionic_set_vf_config(ionic, i, &vfc);
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}
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out:
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if (err)
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ionic_vf_dealloc_locked(ionic);
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up_write(&ionic->vf_op_lock);
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return err;
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}
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static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs)
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{
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struct ionic *ionic = pci_get_drvdata(pdev);
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struct device *dev = ionic->dev;
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int ret = 0;
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if (ionic->lif &&
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test_bit(IONIC_LIF_F_FW_RESET, ionic->lif->state))
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return -EBUSY;
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if (num_vfs > 0) {
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ret = pci_enable_sriov(pdev, num_vfs);
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if (ret) {
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dev_err(dev, "Cannot enable SRIOV: %d\n", ret);
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goto out;
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}
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ret = ionic_vf_alloc(ionic, num_vfs);
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if (ret) {
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dev_err(dev, "Cannot alloc VFs: %d\n", ret);
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pci_disable_sriov(pdev);
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goto out;
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}
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ret = num_vfs;
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} else {
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pci_disable_sriov(pdev);
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ionic_vf_dealloc(ionic);
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}
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out:
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return ret;
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}
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static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct device *dev = &pdev->dev;
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struct ionic *ionic;
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int num_vfs;
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int err;
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ionic = ionic_devlink_alloc(dev);
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if (!ionic)
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return -ENOMEM;
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ionic->pdev = pdev;
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ionic->dev = dev;
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pci_set_drvdata(pdev, ionic);
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mutex_init(&ionic->dev_cmd_lock);
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/* Query system for DMA addressing limitation for the device. */
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err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
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if (err) {
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dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting. err=%d\n",
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err);
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goto err_out_clear_drvdata;
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}
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ionic_debugfs_add_dev(ionic);
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/* Setup PCI device */
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err = pci_enable_device_mem(pdev);
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if (err) {
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dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
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goto err_out_debugfs_del_dev;
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}
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err = pci_request_regions(pdev, IONIC_DRV_NAME);
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if (err) {
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dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
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goto err_out_pci_disable_device;
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}
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pcie_print_link_status(pdev);
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err = ionic_map_bars(ionic);
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if (err)
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goto err_out_pci_release_regions;
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/* Configure the device */
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err = ionic_setup(ionic);
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if (err) {
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dev_err(dev, "Cannot setup device: %d, aborting\n", err);
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goto err_out_unmap_bars;
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}
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pci_set_master(pdev);
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err = ionic_identify(ionic);
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if (err) {
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dev_err(dev, "Cannot identify device: %d, aborting\n", err);
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goto err_out_teardown;
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}
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ionic_debugfs_add_ident(ionic);
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err = ionic_init(ionic);
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if (err) {
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dev_err(dev, "Cannot init device: %d, aborting\n", err);
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goto err_out_teardown;
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}
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/* Configure the ports */
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err = ionic_port_identify(ionic);
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if (err) {
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dev_err(dev, "Cannot identify port: %d, aborting\n", err);
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goto err_out_reset;
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}
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err = ionic_port_init(ionic);
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if (err) {
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dev_err(dev, "Cannot init port: %d, aborting\n", err);
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goto err_out_reset;
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}
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/* Allocate and init the LIF */
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err = ionic_lif_size(ionic);
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if (err) {
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dev_err(dev, "Cannot size LIF: %d, aborting\n", err);
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goto err_out_port_reset;
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}
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err = ionic_lif_alloc(ionic);
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if (err) {
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dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err);
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goto err_out_free_irqs;
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}
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err = ionic_lif_init(ionic->lif);
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if (err) {
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dev_err(dev, "Cannot init LIF: %d, aborting\n", err);
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goto err_out_free_lifs;
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}
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init_rwsem(&ionic->vf_op_lock);
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num_vfs = pci_num_vf(pdev);
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if (num_vfs) {
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dev_info(dev, "%d VFs found already enabled\n", num_vfs);
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err = ionic_vf_alloc(ionic, num_vfs);
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if (err)
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dev_err(dev, "Cannot enable existing VFs: %d\n", err);
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}
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err = ionic_devlink_register(ionic);
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if (err) {
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dev_err(dev, "Cannot register devlink: %d\n", err);
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goto err_out_deinit_lifs;
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}
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err = ionic_lif_register(ionic->lif);
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if (err) {
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dev_err(dev, "Cannot register LIF: %d, aborting\n", err);
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goto err_out_deregister_devlink;
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}
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mod_timer(&ionic->watchdog_timer,
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round_jiffies(jiffies + ionic->watchdog_period));
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return 0;
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err_out_deregister_devlink:
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ionic_devlink_unregister(ionic);
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err_out_deinit_lifs:
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ionic_vf_dealloc(ionic);
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ionic_lif_deinit(ionic->lif);
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err_out_free_lifs:
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ionic_lif_free(ionic->lif);
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ionic->lif = NULL;
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err_out_free_irqs:
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ionic_bus_free_irq_vectors(ionic);
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err_out_port_reset:
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ionic_port_reset(ionic);
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err_out_reset:
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ionic_reset(ionic);
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err_out_teardown:
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ionic_dev_teardown(ionic);
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pci_clear_master(pdev);
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/* Don't fail the probe for these errors, keep
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* the hw interface around for inspection
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*/
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return 0;
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err_out_unmap_bars:
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ionic_unmap_bars(ionic);
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err_out_pci_release_regions:
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pci_release_regions(pdev);
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err_out_pci_disable_device:
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pci_disable_device(pdev);
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err_out_debugfs_del_dev:
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ionic_debugfs_del_dev(ionic);
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err_out_clear_drvdata:
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mutex_destroy(&ionic->dev_cmd_lock);
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ionic_devlink_free(ionic);
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return err;
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}
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static void ionic_remove(struct pci_dev *pdev)
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{
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struct ionic *ionic = pci_get_drvdata(pdev);
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del_timer_sync(&ionic->watchdog_timer);
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if (ionic->lif) {
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||
|
|
ionic_lif_unregister(ionic->lif);
|
||
|
|
ionic_devlink_unregister(ionic);
|
||
|
|
ionic_lif_deinit(ionic->lif);
|
||
|
|
ionic_lif_free(ionic->lif);
|
||
|
|
ionic->lif = NULL;
|
||
|
|
ionic_bus_free_irq_vectors(ionic);
|
||
|
|
}
|
||
|
|
|
||
|
|
ionic_port_reset(ionic);
|
||
|
|
ionic_reset(ionic);
|
||
|
|
ionic_dev_teardown(ionic);
|
||
|
|
pci_clear_master(pdev);
|
||
|
|
ionic_unmap_bars(ionic);
|
||
|
|
pci_release_regions(pdev);
|
||
|
|
pci_disable_device(pdev);
|
||
|
|
ionic_debugfs_del_dev(ionic);
|
||
|
|
mutex_destroy(&ionic->dev_cmd_lock);
|
||
|
|
ionic_devlink_free(ionic);
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct pci_driver ionic_driver = {
|
||
|
|
.name = IONIC_DRV_NAME,
|
||
|
|
.id_table = ionic_id_table,
|
||
|
|
.probe = ionic_probe,
|
||
|
|
.remove = ionic_remove,
|
||
|
|
.sriov_configure = ionic_sriov_configure,
|
||
|
|
};
|
||
|
|
|
||
|
|
int ionic_bus_register_driver(void)
|
||
|
|
{
|
||
|
|
return pci_register_driver(&ionic_driver);
|
||
|
|
}
|
||
|
|
|
||
|
|
void ionic_bus_unregister_driver(void)
|
||
|
|
{
|
||
|
|
pci_unregister_driver(&ionic_driver);
|
||
|
|
}
|