358 lines
8.5 KiB
C
358 lines
8.5 KiB
C
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// SPDX-License-Identifier: BSD-3-Clause-Clear
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/*
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* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "core.h"
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#include "debug.h"
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static int ath12k_dbring_bufs_replenish(struct ath12k *ar,
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struct ath12k_dbring *ring,
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struct ath12k_dbring_element *buff,
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gfp_t gfp)
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{
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struct ath12k_base *ab = ar->ab;
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struct hal_srng *srng;
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dma_addr_t paddr;
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void *ptr_aligned, *ptr_unaligned, *desc;
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int ret;
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int buf_id;
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u32 cookie;
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srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
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lockdep_assert_held(&srng->lock);
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ath12k_hal_srng_access_begin(ab, srng);
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ptr_unaligned = buff->payload;
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ptr_aligned = PTR_ALIGN(ptr_unaligned, ring->buf_align);
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paddr = dma_map_single(ab->dev, ptr_aligned, ring->buf_sz,
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DMA_FROM_DEVICE);
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ret = dma_mapping_error(ab->dev, paddr);
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if (ret)
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goto err;
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spin_lock_bh(&ring->idr_lock);
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buf_id = idr_alloc(&ring->bufs_idr, buff, 0, ring->bufs_max, gfp);
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spin_unlock_bh(&ring->idr_lock);
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if (buf_id < 0) {
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ret = -ENOBUFS;
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goto err_dma_unmap;
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}
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desc = ath12k_hal_srng_src_get_next_entry(ab, srng);
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if (!desc) {
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ret = -ENOENT;
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goto err_idr_remove;
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}
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buff->paddr = paddr;
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cookie = u32_encode_bits(ar->pdev_idx, DP_RXDMA_BUF_COOKIE_PDEV_ID) |
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u32_encode_bits(buf_id, DP_RXDMA_BUF_COOKIE_BUF_ID);
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ath12k_hal_rx_buf_addr_info_set(desc, paddr, cookie, 0);
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ath12k_hal_srng_access_end(ab, srng);
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return 0;
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err_idr_remove:
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spin_lock_bh(&ring->idr_lock);
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idr_remove(&ring->bufs_idr, buf_id);
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spin_unlock_bh(&ring->idr_lock);
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err_dma_unmap:
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dma_unmap_single(ab->dev, paddr, ring->buf_sz,
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DMA_FROM_DEVICE);
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err:
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ath12k_hal_srng_access_end(ab, srng);
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return ret;
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}
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static int ath12k_dbring_fill_bufs(struct ath12k *ar,
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struct ath12k_dbring *ring,
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gfp_t gfp)
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{
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struct ath12k_dbring_element *buff;
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struct hal_srng *srng;
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struct ath12k_base *ab = ar->ab;
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int num_remain, req_entries, num_free;
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u32 align;
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int size, ret;
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srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
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spin_lock_bh(&srng->lock);
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num_free = ath12k_hal_srng_src_num_free(ab, srng, true);
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req_entries = min(num_free, ring->bufs_max);
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num_remain = req_entries;
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align = ring->buf_align;
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size = sizeof(*buff) + ring->buf_sz + align - 1;
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while (num_remain > 0) {
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buff = kzalloc(size, gfp);
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if (!buff)
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break;
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ret = ath12k_dbring_bufs_replenish(ar, ring, buff, gfp);
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if (ret) {
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ath12k_warn(ab, "failed to replenish db ring num_remain %d req_ent %d\n",
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num_remain, req_entries);
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kfree(buff);
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break;
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}
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num_remain--;
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}
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spin_unlock_bh(&srng->lock);
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return num_remain;
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}
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int ath12k_dbring_wmi_cfg_setup(struct ath12k *ar,
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struct ath12k_dbring *ring,
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enum wmi_direct_buffer_module id)
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{
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struct ath12k_wmi_pdev_dma_ring_cfg_arg arg = {0};
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int ret;
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if (id >= WMI_DIRECT_BUF_MAX)
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return -EINVAL;
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arg.pdev_id = DP_SW2HW_MACID(ring->pdev_id);
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arg.module_id = id;
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arg.base_paddr_lo = lower_32_bits(ring->refill_srng.paddr);
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arg.base_paddr_hi = upper_32_bits(ring->refill_srng.paddr);
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arg.head_idx_paddr_lo = lower_32_bits(ring->hp_addr);
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arg.head_idx_paddr_hi = upper_32_bits(ring->hp_addr);
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arg.tail_idx_paddr_lo = lower_32_bits(ring->tp_addr);
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arg.tail_idx_paddr_hi = upper_32_bits(ring->tp_addr);
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arg.num_elems = ring->bufs_max;
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arg.buf_size = ring->buf_sz;
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arg.num_resp_per_event = ring->num_resp_per_event;
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arg.event_timeout_ms = ring->event_timeout_ms;
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ret = ath12k_wmi_pdev_dma_ring_cfg(ar, &arg);
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if (ret) {
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ath12k_warn(ar->ab, "failed to setup db ring cfg\n");
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return ret;
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}
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return 0;
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}
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int ath12k_dbring_set_cfg(struct ath12k *ar, struct ath12k_dbring *ring,
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u32 num_resp_per_event, u32 event_timeout_ms,
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int (*handler)(struct ath12k *,
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struct ath12k_dbring_data *))
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{
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if (WARN_ON(!ring))
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return -EINVAL;
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ring->num_resp_per_event = num_resp_per_event;
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ring->event_timeout_ms = event_timeout_ms;
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ring->handler = handler;
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return 0;
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}
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int ath12k_dbring_buf_setup(struct ath12k *ar,
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struct ath12k_dbring *ring,
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struct ath12k_dbring_cap *db_cap)
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{
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struct ath12k_base *ab = ar->ab;
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struct hal_srng *srng;
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int ret;
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srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
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ring->bufs_max = ring->refill_srng.size /
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ath12k_hal_srng_get_entrysize(ab, HAL_RXDMA_DIR_BUF);
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ring->buf_sz = db_cap->min_buf_sz;
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ring->buf_align = db_cap->min_buf_align;
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ring->pdev_id = db_cap->pdev_id;
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ring->hp_addr = ath12k_hal_srng_get_hp_addr(ab, srng);
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ring->tp_addr = ath12k_hal_srng_get_tp_addr(ab, srng);
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ret = ath12k_dbring_fill_bufs(ar, ring, GFP_KERNEL);
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return ret;
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}
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int ath12k_dbring_srng_setup(struct ath12k *ar, struct ath12k_dbring *ring,
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int ring_num, int num_entries)
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{
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int ret;
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ret = ath12k_dp_srng_setup(ar->ab, &ring->refill_srng, HAL_RXDMA_DIR_BUF,
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ring_num, ar->pdev_idx, num_entries);
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if (ret < 0) {
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ath12k_warn(ar->ab, "failed to setup srng: %d ring_id %d\n",
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ret, ring_num);
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goto err;
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}
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return 0;
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err:
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ath12k_dp_srng_cleanup(ar->ab, &ring->refill_srng);
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return ret;
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}
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int ath12k_dbring_get_cap(struct ath12k_base *ab,
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u8 pdev_idx,
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enum wmi_direct_buffer_module id,
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struct ath12k_dbring_cap *db_cap)
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{
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int i;
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if (!ab->num_db_cap || !ab->db_caps)
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return -ENOENT;
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if (id >= WMI_DIRECT_BUF_MAX)
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return -EINVAL;
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for (i = 0; i < ab->num_db_cap; i++) {
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if (pdev_idx == ab->db_caps[i].pdev_id &&
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id == ab->db_caps[i].id) {
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*db_cap = ab->db_caps[i];
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return 0;
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}
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}
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return -ENOENT;
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}
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int ath12k_dbring_buffer_release_event(struct ath12k_base *ab,
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struct ath12k_dbring_buf_release_event *ev)
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{
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struct ath12k_dbring *ring = NULL;
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struct hal_srng *srng;
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struct ath12k *ar;
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struct ath12k_dbring_element *buff;
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struct ath12k_dbring_data handler_data;
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struct ath12k_buffer_addr desc;
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u8 *vaddr_unalign;
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u32 num_entry, num_buff_reaped;
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u8 pdev_idx, rbm;
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u32 cookie;
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int buf_id;
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int size;
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dma_addr_t paddr;
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int ret = 0;
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pdev_idx = le32_to_cpu(ev->fixed.pdev_id);
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if (pdev_idx >= ab->num_radios) {
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ath12k_warn(ab, "Invalid pdev id %d\n", pdev_idx);
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return -EINVAL;
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}
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if (ev->fixed.num_buf_release_entry !=
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ev->fixed.num_meta_data_entry) {
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ath12k_warn(ab, "Buffer entry %d mismatch meta entry %d\n",
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ev->fixed.num_buf_release_entry,
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ev->fixed.num_meta_data_entry);
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return -EINVAL;
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}
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ar = ab->pdevs[pdev_idx].ar;
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rcu_read_lock();
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if (!rcu_dereference(ab->pdevs_active[pdev_idx])) {
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ret = -EINVAL;
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goto rcu_unlock;
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}
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switch (ev->fixed.module_id) {
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case WMI_DIRECT_BUF_SPECTRAL:
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break;
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default:
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ring = NULL;
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ath12k_warn(ab, "Recv dma buffer release ev on unsupp module %d\n",
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ev->fixed.module_id);
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break;
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}
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if (!ring) {
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ret = -EINVAL;
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goto rcu_unlock;
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}
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srng = &ab->hal.srng_list[ring->refill_srng.ring_id];
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num_entry = le32_to_cpu(ev->fixed.num_buf_release_entry);
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size = sizeof(*buff) + ring->buf_sz + ring->buf_align - 1;
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num_buff_reaped = 0;
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spin_lock_bh(&srng->lock);
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while (num_buff_reaped < num_entry) {
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desc.info0 = ev->buf_entry[num_buff_reaped].paddr_lo;
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desc.info1 = ev->buf_entry[num_buff_reaped].paddr_hi;
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handler_data.meta = ev->meta_data[num_buff_reaped];
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num_buff_reaped++;
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ath12k_hal_rx_buf_addr_info_get(&desc, &paddr, &cookie, &rbm);
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buf_id = u32_get_bits(cookie, DP_RXDMA_BUF_COOKIE_BUF_ID);
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spin_lock_bh(&ring->idr_lock);
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buff = idr_find(&ring->bufs_idr, buf_id);
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if (!buff) {
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spin_unlock_bh(&ring->idr_lock);
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continue;
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}
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idr_remove(&ring->bufs_idr, buf_id);
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spin_unlock_bh(&ring->idr_lock);
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dma_unmap_single(ab->dev, buff->paddr, ring->buf_sz,
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DMA_FROM_DEVICE);
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if (ring->handler) {
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vaddr_unalign = buff->payload;
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handler_data.data = PTR_ALIGN(vaddr_unalign,
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ring->buf_align);
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handler_data.data_sz = ring->buf_sz;
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ring->handler(ar, &handler_data);
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}
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memset(buff, 0, size);
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ath12k_dbring_bufs_replenish(ar, ring, buff, GFP_ATOMIC);
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}
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spin_unlock_bh(&srng->lock);
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rcu_unlock:
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rcu_read_unlock();
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return ret;
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}
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void ath12k_dbring_srng_cleanup(struct ath12k *ar, struct ath12k_dbring *ring)
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{
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ath12k_dp_srng_cleanup(ar->ab, &ring->refill_srng);
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}
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void ath12k_dbring_buf_cleanup(struct ath12k *ar, struct ath12k_dbring *ring)
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{
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struct ath12k_dbring_element *buff;
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int buf_id;
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spin_lock_bh(&ring->idr_lock);
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idr_for_each_entry(&ring->bufs_idr, buff, buf_id) {
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idr_remove(&ring->bufs_idr, buf_id);
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dma_unmap_single(ar->ab->dev, buff->paddr,
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ring->buf_sz, DMA_FROM_DEVICE);
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kfree(buff);
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}
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idr_destroy(&ring->bufs_idr);
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spin_unlock_bh(&ring->idr_lock);
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}
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